Hanbit HMF1M32M4GL-75 Flash-rom module 4mbyte (1m x 32-bit),72pin-simm, 5v Datasheet

HANBit
HMF1M32M4GL
FLASH-ROM MODULE 4MByte (1M x 32-Bit),72pin-SIMM, 5V
Part No. HMF1M32M4GL
GENERAL DESCRIPTION
The HMF1M32M4GL is a high-speed flash read only memory (FROM) module containing 1,048,576 words organized in a
x32bit configuration. The module consists of four 1M x 8 FROM mounted on a 72 -pin, single-sided, FR4-printed circuit board.
The HMF1M32M4GL is entirely pin and command set compatible with JEDEC single-power-supply flash standard.
Commands are written to the command register using standard microprocessor write timings.
Register contents serve as input to an internal state-machine, which controls the erase and programming circuitry. Write
cycles also internally latch addresses and data needed for the programming and erase operations. Reading data out of the
device is similar to reading from 12.0V flash or EPROM devices.
Four chip enable inputs, (/WE0, /WE1, /WE2, /WE3) are used to enable the module’s 8bits independently. Output enable
(/OE) and write enable (/WE) can set the memory input and output.
When FROM module is disable condition the module is becoming power standb y mode, system designer can get low-power
design. All module components may be powered from a single +5V DC power supply and all inputs
and outputs are TTL-compatible.
PIN ASSIGNMENT
FEATURES
w Access time : 75, 90 and 120ns
w High-density 4MByte design
w High-reliability, low-power design
PIN
SYMBOL
PIN
SYMBOL
PIN
SYMBOL
1
Vss
25
DQ17
49
/BANK-E0
2
NC
26
DQ18
50
A18
3
DQ0
27
DQ19
51
A17
w Single + 5V ± 0.5V power supply
4
DQ1
28
DQ20
52
A16
w Easy memory expansion
5
DQ2
29
DQ21
53
A15
6
DQ3
30
Vcc
54
A14
7
DQ4
31
DQ22
55
A13
8
DQ5
32
DQ23
56
A12
w Low profile 72-pin SIMM
9
DQ6
33
/WE2
57
A11
w Minimum 1,000,000 write/erase cycle
10
Vcc
34
NC
58
A10
11
DQ7
35
DQ24
59
Vcc
12
/WE0
36
DQ25
60
A9
w Sector group protection
13
RY-/BY
37
DQ26
61
A8
w Temporary sector group unprotection
14
DQ8
38
DQ27
62
A7
w The used device is AM29F080
15
DQ9
39
Vss
63
A6
16
DQ10
40
DQ28
64
A5
17
DQ11
41
DQ29
65
A4
18
DQ12
42
DQ30
66
A3
19
DQ13
43
DQ31
67
A2
20
DQ14
44
/WE3
68
A1
21
DQ15
45
NC
69
A0
NC
w All inputs and outputs are TTL-compatible
w FR4-PCB design
w Sector erase architecture
OPTIONS
MARKING
w Timing
75ns access
-75
90ns access
-90
22
/WE1
46
/Reset
70
120ns access
-120
23
NC
47
A19
71
NC
24
DQ16
48
/OE
72
Vss
w Packages
72-pin SIMM
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REV.02(August,2002)
M
72-PIN SIMM
TOP VIEW
1
HANBit Electronics Co., Ltd.
HANBit
HMF1M32M4GL
FUNCTIONAL BLOCK DIAGRAM
32
DQ0 - DQ31
20
A0 - A19
A0-19
DQ 0-7
/WE0
/WE
U1
/OE
/CE
RY-BY
/Reset
A0-19
DQ 8-15
/WE1
/WE
U2
/OE
/CE
RY-BY
/Reset
A0-19
/WE2
/WE
DQ16-23
U3
/OE
/CE
RY-BY
/Reset
A0-19
DQ24-31
/WE3
/WE
/OE
/OE
/BANK-E0
RY-/BY
/Reset
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REV.02(August,2002)
U4
/CE
RY-BY
/Reset
2
HANBit Electronics Co., Ltd.
HANBit
HMF1M32M4GL
TRUTH TABLE
MODE
/OE
/CE
/WE
DQ
POWER
STANDBY
X
H
X
HIGH-Z
STANDBY
NOT SELECTED
H
L
H
HIGH-Z
ACTIVE
READ
L
L
H
Q
ACTIVE
WRITE or ERASE
X
L
L
D
ACTIVE
NOTE: X means don’t care
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
RATING
VIN,OUT
-2.0V to +7.0V
Voltage with respect to ground Vcc
VCC
-2.0V to +7.0V
Storage Temperature
TSTG
-65oC to +125oC
Voltage with respect to ground all other pins
Operating Temperature
TA
-55oC to +125 oC
w Stresses greater than those listed under " Absolute Maximum Ratings" may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at these or any other conditions above those indicated
in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
SYMBOL
MIN
Vcc for ±5% device Supply Voltages
VCC
4.75V
5.25V
Vcc for ± 10% device Supply Voltages
Vcc
4.5V
5.5V
Ground
VSS
0
PARAMETER
TYP.
MAX
0
0
DC AND OPERATING CHARACTERISTICS (0oC ≤ TA ≤ 70 oC ; Vcc = 5V ± 0.5V )
PARAMETER
TEST CONDITIONS
SYMBOL
MIN
MAX
UNITS
Input Leakage Current
Vcc=Vcc max, V IN= GND to Vcc
IL1
±1.0
µA
Output Leakage Current
Vcc=Vcc max, VOUT= GND to Vcc
IL0
±1.0
µA
Output High Voltage
IOH = -2.5mA, Vcc = Vcc min
VOH
Output Low Voltage
IOL = 12mA, Vcc =Vcc min
VOL
0.45
V
Vcc Active Current for Read(1)
/CE = VIL, /OE=VIH,
ICC1
40
mA
/CE = VIL, /OE=VIH
ICC2
60
mA
/CE= VIH
ICC3
1.0
mA
4.2
V
2.4
V
Vcc Active Current for Program
or Erase(2)
Vcc Standby Current
Low Vcc Lock-Out Voltage
VLKO
3.2
Notes:
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REV.02(August,2002)
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HANBit Electronics Co., Ltd.
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HMF1M32M4GL
1. The Icc current listed is typically less than than 2mA/MHz, with /OE at V IH.
2. Icc active while embedded algorithm (program or erase) is in progress
3. Maximum Icc current specifications are tested with Vcc =Vcc max
ERASE AND PROGRAMMING PERFORMANCE
LIMITS
PARAMETER
UNIT
MIN.
TYP.
COMMENTS
MAX.
Excludes 00H programming
Sector Erase Time
-
1
8
sec
prior to erasure
Byte Programming Time
-
7
300
Excludes system-level
µs
overhead
Excludes system-level
Chip Programming Time
-
7.2
21.6
sec
overhead
CAPACITANCE
PARAMETER
PARAMETER
SYMBOL
DESCRIPTION
CIN
TEST SETUP
MIN
MAX
UNIT
VIN = 0
6
7.5
pF
VOUT = 0
8.5
12
pF
VIN = 0
7.5
9
pF
Input Capacitance
COUT
Output Capacitance
CIN2
Control Pin Capacitance
Notes : Test conditions TA = 25o C, f=1.0 MHz.
AC CHARACTERISTICS
u Read Only Operations Characteristics
PARAMETER
SYMBOLS
JEDEC
STANDARD
tAVAV
tRC
tAVQV
tACC
DESCRIPTION
-75
-90
UNIT
Min
70
90
ns
Max
70
90
ns
Max
70
90
ns
TEST SETUP
Read Cycle Time
/CE = V IL
Address to Output Delay
/OE = VIL
tELQV
tCE
Chip Enable to Output Delay
/OE = VIL
tGLQV
tOE
Chip Enable to Output Delay
Max
40
40
ns
tEHQZ
tDF
Chip Enable to Output High-Z
Max
20
20
ns
tGHQZ
tDF
Output Enable to Output High-Z
Max
20
20
ns
tAXQX
tQH
Min
0
0
ns
Output Hold Time From Addresses,
/CE or /OE, Whichever Occurs First
TEST SPECIFICATIONS
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REV.02(August,2002)
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HMF1M32M4GL
TEST CONDITION
75
ALL OTHERS
Output load
UNIT
1TTL gate
Output load capacitance,
30
100
pF
5
20
ns
0.0 - 3.0
0.45-2.4
V
Input timing measurement reference levels
1.5
0.8, 2.0
V
Output timing measurement reference levels
1.5
0.8, 2.0
V
CL (Including jig capacitance)
Input rise and full times
Input pulse levels
5.0V
2.7kΩ
IN3064
or Equivalent
Device
Under
Test
CL
6.2kΩ
Diodes = IN3064
or Equivalent
Note : CL = 100pF including jig capacitance
u Erase/Program Operations
PARAMETER SYMBOLS
DESCRIPTION
-75
-90
UNIT
Min
70
90
ns
Address Setup Time
Min
0
0
ns
tAH
Address Hold Time
Min
40
45
ns
tDVWH
tDS
Data Setup Time
Min
40
45
ns
tWHDX
tDH
Data Hold Time
Min
0
0
ns
tOES
Output Enable Setup Time
Min
0
0
ns
tGHWL
tGHWL
Read Recover Time Before Write
Min
0
0
ns
tELWL
tCS
/CE Setup Time
Min
0
0
ns
tWHEH
tCH
/CE Hold Time
Min
0
0
ns
JEDEC
STANDARD
tAVAV
tWC
Write Cycle Time
tAVWL
tAS
tWLAX
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HMF1M32M4GL
tWLWH
tWP
Write Pulse Width
Min
40
45
ns
tWHWL
tWPH
Write Pulse Width High
Min
20
20
ns
tWHWH1
tWHWH1
Byte Programming Operation
Typ
7
7
µs
tWHWH2
tWHWH2
Sector Erase Operation (Note1)
Typ
1
1
sec
Vcc set up time
Min
50
50
µs
-75
-90
UNIT
tVCS
Notes :
1. This does not include the preprogramming time
2. This timing is only for Sector Protect operations
u Erase/Program Operations
Alternate /CE Controlled Writes
PARAMETER SYMBOLS
DESCRIPTION
JEDEC
STANDARD
tAVAV
tWC
Write Cycle Time
Min
70
90
ns
tAVWL
tAS
Address Setup Time
Min
0
0
ns
tWLAX
tAH
Address Hold Time
Min
40
45
ns
tDVWH
tDS
Data Setup Time
Min
40
45
ns
tWHDX
tDH
Data Hold Time
Min
0
0
ns
tOES
Output Enable Setup Time
Min
0
0
ns
tGHWL
tGHWL
Read Recover Time Before Write
Min
0
0
ns
tELWL
tCS
/CE Setup Time
Min
0
0
ns
tWHEH
tCH
/CE Hold Time
Min
0
0
ns
tWLWH
tWP
Write Pulse Width
Min
40
45
ns
tWHWL
tWPH
Write Pulse Width High
Min
20
20
ns
tWHWH1
tWHWH1
Byte Programming Operation
Typ
7
7
µs
tWHWH2
tWHWH2
Sector Erase Operation (Note1)
Typ
1
1
sec
Notes :
1. This does not include the preprogramming time
2. This timing is only for Sector Protect operations
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REV.02(August,2002)
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HMF1M32M4GL
u READ OPERATIONS TIMING
u RESET TIMING
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HMF1M32M4GL
u PROGRAM OPERATIONS TIMING
u CHIP/SECTOR ERASE OPERATION TIMINGS
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HMF1M32M4GL
u DATA# POLLING TIMES(DURING EMBEDDED ALGORITHMS)
u TOGGLE# BIT TIMINGS (DURING EMBEDDED ALGORITHMS)
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REV.02(August,2002)
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HMF1M32M4GL
u SECTOR PROTECT UNPROTECT TIMEING DIAGRAM
u ALTERNATE CE# CONTROLLED WRITE OPERATING TIMINGS
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HMF1M32M4GL
PACKAGE DIMENSIONS
108mm
3.2
6.35 mm
72
1
2.03 mm
6.35 mm
1.02 mm
1.27 mm
3.34 mm
95.25 mm
2.54 mm
MIN
0.25 mm MAX
1.27
1.27(±0.08)
Gold: 1.04±0.10 mm
Solder: 0.914±0.10 mm
(Solder & Gold Plating)
ORDERING INFORMATION
Part Number
Density
Org.
Package
HMF1M32M4GL-75
4MByte
1M×32bit
72Pin-SIMM
HMF1M32M4GL-90
4MByte
1M×32bit
HMF1M32M4GL-120
4MByte
1M×32bit
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REV.02(August,2002)
Component
Vcc
SPEED
4EA
5.0V
75ns
72Pin-SIMM
4EA
5.0V
90ns
72Pin-SIMM
4EA
5.0V
120ns
11
Number
HANBit Electronics Co., Ltd.
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