Cadeka CLC2550 Low power, low offset, 2v to 36v comparator Datasheet

Data Sheet
A m p l i fy t h e H u m a n E x p e r i e n c e
Comlinear CLC2550, CLC4550
®
Low Power, Low Offset, 2V to 36V Comparators
The COMLINEAR CLC2550 (dual) and CLC4550 (quad) are precision voltage
comparators with a typical offset of 2mV and high gain (200V/mV). These
comparators also offer an input common-mode voltage range that includes
ground.
The COMLINEAR CLC2550, and CLC4550 operate from a wide supply voltage
range of ±1V to ±18V, or from a single supply range of 2V to 36V. These
comparators are available in Pb-free, RoHS compliant SOIC-8 and SOIC-14
packages. They operate over the industrial temperature range of -40°C to
+85°C.
Typical Application - One Shot Multivibrator
VCC
1MΩ
APPLICATIONS
n Battery charger
n Cordless telephone
n Switching power supply
n DC-DC module
n PC motherboard
n Communication equipment
n Widerange VCO
n Squarewave and time delay generators
n MOS clock timers
n High voltage digital logic gates
n Multivibrators
10kΩ
100pF
–
+VIN
1/4
CLCx550A
1MΩ
VOUT
+
0.001µF
1MΩ
Comlinear CLC2550, CLC4550 Low Power, Low Offset, 2V to 36V Comparators
General Description
FEATURES
n 2mV input offset voltage
n 25nA input bias current
n ±5nA input offset current
n 0.9mA supply current
n CMIR includes ground
n 200mV output saturation voltage at 4mA
n 2V to 36V single supply voltage range
n ±1V to ±18V dual supply voltage range
n Open collector output
n Differential input voltage range equals
the power supply voltage
n CLC2550: improved replacement for
industry standard LM393
n CLC4550: Improved replacement for
industry standard LM339
n CLC2550: Pb-free SOIC-8
n CLC4550: Pb-free SOIC-14
Rev 1A
Ordering Information
Part Number
Package
Pb-Free
RoHS Compliant
Operating Temperature Range
Packaging Method
CLC2550ISO8X
SOIC-8
Yes
Yes
-40°C to +85°C
Reel
CLC4550ISO14X
SOIC-14
Yes
Yes
-40°C to +85°C
Reel
Moisture sensitivity level for all parts is MSL-1.
©2007-2009 CADEKA Microcircuits LLC www.cadeka.com
Data Sheet
CLC2550 Pin Configuration
8
+VS
-IN1
2
7
OUT2
+IN1
3
6
-IN2
-V S
4
5
+IN2
Pin No.
Pin Name
Description
1
OUT1
Output, channel 1
2
-IN1
Negative input, channel 1
3
+IN1
Positive input, channel 1
4
-VS
5
+IN2
Positive input, channel 2
6
-IN2
Negative input, channel 2
7
OUT2
Output, channel 2
8
+VS
Comlinear CLC2550, CLC4550 Low Power, Low Offset, 2V to 36V Comparators
OUT1
1
CLC2550 Pin Configuration
Negative supply
Positive supply
CLC4550 Pin Configuration
CLC4550 Pin Configuration
Pin No.
Pin Name
Description
1
OUT1
Output, channel 1
2
-IN1
Negative input, channel 1
3
+IN1
Positive input, channel 1
4
+VS
Positive supply
5
+IN2
Positive input, channel 2
1
14
OUT4
-IN1
2
13
-IN4
+IN1
3
12
+IN4
6
-IN2
Negative input, channel 2
+VS
4
11
-VS
7
OUT2
Output, channel 2
+IN2
5
10
+IN3
8
OUT3
Output, channel 3
9
-IN3
Negative input, channel 3
-IN2
6
9
-IN3
10
+IN3
Positive input, channel 3
7
8
OUT3
11
-VS
12
+IN4
Positive input, channel 4
13
-IN4
Negative input, channel 4
14
OUT4
Output, channel 4
OUT1
OUT2
Negative supply
Rev 1A
©2007-2009 CADEKA Microcircuits LLC www.cadeka.com
2
Data Sheet
Absolute Maximum Ratings
The safety of the device is not guaranteed when it is operated above the “Absolute Maximum Ratings”. The device
should not be operated at these “absolute” limits. Adhere to the “Recommended Operating Conditions” for proper device function. The information contained in the Electrical Characteristics tables and Typical Performance plots reflect the
operating conditions noted on the tables and plots.
Supply Voltage
Differential Input Voltage
Input Voltage
Input Current (VIN < -0.3V) (1)
Output Short Circuit Current to Ground
Power Dissipation (TA = 25°C) - SOIC-8
Power Dissipation (TA = 25°C) - SOIC-14
Min
Max
Unit
0
40
40
40
50
V
V
V
mA
660
890
mW
mW
-0.3
Continuous
Notes:
1. This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is also lateral NPN parasitic transistor action on the IC chip. This
transistor action can cause the output voltages of the comparators to go to the V+ voltage level (or to ground for a large overdrive) for the time duration that an input is
driven negative. This is not destructive and normal output states will re-establish when the input voltage, which was negative, again returns to a value greater than -0.3
VDC (at 25°C).
Reliability Information
Parameter
Junction Temperature
Storage Temperature Range
Lead Temperature (Soldering, 10s)
Package Thermal Resistance
SOIC-8
SOIC-14
Min
Typ
-65
Max
Unit
150
150
260
°C
°C
°C
100
88
°C/W
°C/W
Notes:
Package thermal resistance (qJA), JDEC standard, multi-layer test boards, still air.
Recommended Operating Conditions
Parameter
Operating Temperature Range
Supply Voltage Range
Min
-40
2 (±1)
Typ
Max
Unit
+85
36 (±18)
°C
V
Comlinear CLC2550, CLC4550 Low Power, Low Offset, 2V to 36V Comparators
Parameter
Rev 1A
©2007-2009 CADEKA Microcircuits LLC www.cadeka.com
3
Data Sheet
Electrical Characteristics
TA = 25°C (if bold, TA = -40 to +85°C), Vs = +5V, -Vs = GND unless otherwise noted.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
2
5
mV
7
mV
25
250
nA
400
nA
DC Performance
Input Offset Voltage
VOUT = 1.4V, RS = 0Ω, VS = 5V to 30V
Ib
Input Bias Current
VCM = 0V
IOS
Input Offset Current
VCM = 0V
CMIR
Common Mode Input Range (3)
+VS = 30V
0
VG
Voltage Gain
+VS = 15V, RL = ≥15kΩ, VOUT = 1V to 11V
50
5
Supply Current, CLC2550
0.6
RL = ∞, +VS = 5V
IS
1.2
RL = ∞, +VS = 30V
Supply Current, CLC4550
0.9
RL = ∞, +VS = 5V
nA
nA
+VS
- 1.5
V
200
0.7
RL = ∞, +VS = 30V
50
200
V/mV
1.7
mA
3.0
mA
1.0
mA
2.0
mA
2.5
mA
3.0
mA
2.0
mA
3.0
mA
Time Domain Response
tRLS
Large Signal Response Time
tR
Response Time
VIN = TTL logic swing, VREF = 1.4V, VRL = 5V,
RL = 5.1kΩ
200
ns
VRL = 5V, RL = 5.1kΩ, 5mV overdrive
1.3
μs
VRL = 5V, RL = 5.1kΩ, 10mV overdrive
0.9
μs
VRL = 5V, RL = 5.1kΩ, 15mV overdrive
0.8
μs
16
mA
Output Characteristics
ISINK
Output Sink Current
ILEAK
Output Leakage Current
VSAT
Saturation Voltage
VIN+ = 0V, VIN- = 1V, VOUT = 1.5V
VIN+ = 1V, VIN- = 0V, VOUT = 5V
6.0
0.1
VIN+ = 1V, VIN- = 0V, VOUT = 30V
VIN+ = 0V, VIN- = 1V, ISINK ≤ 4mA
200
nA
1
μA
400
mV
500
mV
Notes:
1. 100% tested at 25°C
2. Limits over the full temperature range are guaranteed by design.
3. The input common mode voltage of either input signal voltage should be kept > 0.3V at 25°C. The upper end of the common-mode voltage range is +VS - 1.5V at
25°C, but either or both inputs can go to +18V without damages, independent of the magnitude of VS.
Comlinear CLC2550, CLC4550 Low Power, Low Offset, 2V to 36V Comparators
VIO
Rev 1A
©2007-2009 CADEKA Microcircuits LLC www.cadeka.com
4
Data Sheet
Typical Performance Characteristics
TA = 25°C, Vs = +5V, -Vs = GND unless otherwise noted.
Supply Current vs. Supply Voltage (CLC2550)
1.6
0.9
1.5
1.4
-40°C
Supply Current (mA)
0.7
25°C
0.6
0.5
85°C
0.4
0.3
0.2
1.2
1.1
25°C
1
0.9
85°C
0.8
0.7
0.1
0.6
0
0
4
8
12
16
20
24
28
0.5
32
0
Supply Voltage (V)
4
8
12
20
24
28
32
36
32
36
Supply Voltage vs. Input Bias Current (CLC4550)
80
70
60
Input Bias Current (nA)
70
60
-40°C
50
25°C
40
85°C
30
50
-40°C
40
25°C
30
85°C
20
10
20
0
0
4
8
12
16
20
24
28
32
0
4
8
12
Supply Voltage (V)
20
24
28
Output Sink Current vs. Saturation Voltage (CLC4550)
85°C
25°C
0.01
1
0.1
85°C
25°C
Rev 1A
Saturation Voltage (V)
1
0.1
16
Supply Voltage (V)
Output Sink Current vs. Saturation Voltage (CLC2550)
Saturation Voltage (V)
16
Supply Voltage (V)
Supply Voltage vs. Input Bias Current (CLC2550)
Input Bias Current (nA)
-40°C
1.3
0.01
-40°C
-40°C
0.001
0.001
0.01
0.1
1
Output Sink Current (mA)
©2007-2009 CADEKA Microcircuits LLC 10
0.01
0.1
Comlinear CLC2550, CLC4550 Low Power, Low Offset, 2V to 36V Comparators
1
0.8
Supply Current (mA)
Supply Current vs. Supply Voltage (CLC4550)
1
10
Output Sink Current (mA)
www.cadeka.com
5
Data Sheet
Typical Performance Characteristics
TA = 25°C, Vs = +5V, -Vs = GND unless otherwise noted.
Response Time vs. Input Overdrive - Positive (CLC2550)
7
4
Input
0.05
2.5
5mV Overdrive
10mV Overdrive
0
0.4
0.8
1.2
1.6
4
0.05
10mV Overdrive
-0.5
0
0.4
0.8
0.05
1.6
2
Response Time vs. Input Overdrive - Negative (CLC4550)
7
0.05
7
Input
Input
5.5
10mV Overdrive
20mV Overdrive
-0.1
2.5
50mV Overdrive
-0.15
1
-0.2
0.8
1.2
1.6
5mV Overdrive
-0.05
4
10mV Overdrive
20mV Overdrive
-0.1
2.5
50mV Overdrive
-0.15
-0.5
0.4
5.5
1
-0.2
2
-0.5
0
0.4
Time (us)
0.8
1.2
1.6
2
Time (us)
LS Response Time vs. Input Overdrive - Pos. (CLC2550)
LS Response Time vs. Input Overdrive - Pos. (CLC4550)
5.5
5.5
5.5
5.5
4.5
4.5
4.5
4.5
2.5
2.5
2.5
1.5
1.5
0.5
1.5
1.5
0.5
0.5
0.5
-0.5
-0.5
-0.5
0
0.2
0.4
0.6
Time (us)
©2007-2009 CADEKA Microcircuits LLC 0.8
1
3.5
Output
-0.5
0
0.2
0.4
0.6
0.8
1
Time (us)
www.cadeka.com
6
Rev 1A
Input Voltage (V)
Output
2.5
Input
3.5
Output Voltage (V)
3.5
Output Voltage (V)
Input
3.5
Output Voltage (V)
4
Output Voltage (V)
5mV Overdrive
-0.05
0
Input Voltage (V)
0
Input Voltage (V)
1.2
Time (us)
Response Time vs. Input Overdrive - Negative (CLC2550)
Input Voltage (V)
1
-0.05
2
Time (us)
0
2.5
5mV Overdrive
Input
0
-0.5
0
50mV Overdrive
0.1
1
-0.05
5.5
20mV Overdrive
Output Voltage (V)
50mV Overdrive
0.1
7
0.15
Input Voltage (V)
5.5
20mV Overdrive
Output Voltage (V)
Input Voltage (V)
0.15
0.2
Comlinear CLC2550, CLC4550 Low Power, Low Offset, 2V to 36V Comparators
0.2
Response Time vs. Input Overdrive - Positive (CLC4550)
Data Sheet
Typical Performance Characteristics - Continued
TA = 25°C, Vs = +5V, -Vs = GND unless otherwise noted.
LS Response Time vs. Input Overdrive - Neg. (CLC4550)
5.5
5.5
5.5
4.5
4.5
4.5
4.5
2.5
2.5
Input
1.5
1.5
0.5
-0.5
0
0.2
0.4
0.6
0.8
Input Voltage (V)
3.5
Output
3.5
3.5
Output
2.5
2.5
Input
1.5
1.5
0.5
0.5
0.5
-0.5
-0.5
1
Output Voltage (V)
3.5
-0.5
0
0.2
0.4
Time (us)
0.6
0.8
1
Time (us)
Functional Block Diagram
VCC
+Input
Q2
Q1
Q3
Q4
Output
Q8
-Input
Q7
Q5
Q6
Comlinear CLC2550, CLC4550 Low Power, Low Offset, 2V to 36V Comparators
5.5
Output Voltage (V)
Input Voltage (V)
LS Response Time vs. Input Overdrive - Neg. (CLC2550)
Rev 1A
©2007-2009 CADEKA Microcircuits LLC www.cadeka.com
7
Data Sheet
Application Information
All pins of any unused comparators should be tied to the
negative supply. The bias network of the CLCx550 series
establishes a drain current which is independent of the
magnitude of the power supply voltage over the range
of 2V DC to 30V DC. It is usually unnecessary to use a
bypass capacitor across the power supply line.
The differential input voltage may be larger than V+ without damaging the device. Protection should be provided
to prevent the input voltages from going negative more
than −0.3V DC (at 25°C). An input clamp diode can be
used as shown in the applications section.
©2007-2009 CADEKA Microcircuits LLC General layout and supply bypassing play major roles
in high frequency performance. CADEKA has evaluation
boards to use as a guide for high frequency layout and as
an aid in device testing and characterization. Follow the
steps below as a basis for high frequency layout:
• Include 6.8µF and 0.1µF ceramic capacitors for power
supply decoupling
• Place the 6.8µF capacitor within 0.75 inches of the power pin
• Place the 0.1µF capacitor within 0.1 inches of the power pin
• Remove the ground plane under and around the part,
especially near the input and output pins to reduce parasitic capacitance
• Minimize all trace lengths to reduce series inductances
Refer to the evaluation board layouts below for more information.
Evaluation Board Information
The following evaluation boards are available to aid in the
testing and layout of these devices:
Evaluation Board #
CEB006
CEB018
Products
CLC2550
CLC4550
Evaluation Board Schematics
Evaluation board schematics and layouts are shown in
Figures 9-14. These evaluation boards are built for dualsupply operation. Follow these steps to use the board in a
single-supply application:
1. Short -Vs to ground.
2. Use C3 and C4, if the -VS pin of the amplifier is not
directly connected to the ground plane.
www.cadeka.com
8
Rev 1A
The output of the CLCx550 series is the uncommitted
collector of a grounded-emitter NPN output transistor.
Many collectors can be tied together to provide an output
OR’ing function. An output pull-up resistor can be connected to any available power supply voltage within the
permitted supply voltage range and there is no restriction
on this voltage due to the magnitude of the voltage which
is applied to the V+ terminal of the CLCx550 package.
The output can also be used as a simple SPST switch to
ground (when a pull-up resistor is not used). The amount
of current which the output device can sink is limited by
the drive available (which is independent of V+) and the β
of this device. When the maximum current limit is reached
(approximately 16 mA), the output transistor will come
out of saturation and the output voltage will rise very rapidly. The output saturation voltage is limited by the ap-
Layout Considerations
Comlinear CLC2550, CLC4550 Low Power, Low Offset, 2V to 36V Comparators
The CLCx550 series are high gain, wide bandwidth devices which, like most comparators, can easily oscillate
if the output lead is inadvertently allowed to capacitively
couple to the inputs via stray capacitance. This shows up
only during the output voltage transition intervals as the
comparator changes states. Power supply bypassing is not
required to solve this problem. Standard PC board layout
is helpful as it reduces stray input-output coupling. Reducing this input resistors to < 10kΩ reduces the feedback
signal levels and finally, adding even a small amount (1
to 10mV) of positive feedback (hysteresis) causes such a
rapid transition that oscillations due to stray feedback are
not possible. Simply socketing the IC and attaching resistors to the pins will cause input-output oscillations during
the small transition intervals unless hysteresis is used. If
the input signal is a pulse waveform, with relatively fast
rise and fall times, hysteresis is not required.
proximately 60Ω RSAT of the output transistor. The low
offset voltage of the output transistor (1 mV) allows the
output to clamp essentially to ground level for small load
currents.
Data Sheet
Comlinear CLC2550, CLC4550 Low Power, Low Offset, 2V to 36V Comparators
Figure 11. CEB006 Bottom View
Figure 9. CEB006 Schematic
Figure 10. CEB006 Top View
Rev 1A
Figure 12. CEB018 Schematic
©2007-2009 CADEKA Microcircuits LLC www.cadeka.com
9
Data Sheet
5V
3
+
+VIN
100kΩ
VOUT
+VREF
–
Comlinear CLC2550, CLC4550 Low Power, Low Offset, 2V to 36V Comparators
1/4
CLCx550A
12
Figure 16. Driving CMOS
VCC
Figure 13. CEB018 Top View
1MΩ
10kΩ
100pF
–
+VIN
1/4
CLCx550A
1MΩ
VOUT
+
0.001µF
1MΩ
Figure 17. One Shot Multivibrator
Figure 14. CEB018 Bottom View
VCC
Typical Applications
4.3kΩ
100kΩ
VCC
75pF
–
3kΩ
+VIN
1/4
CLCx550
+
VOUT
–
VOUT
100kΩ
100kΩ
Rev 1A
+VREF
1/4
CLCx550A
+
VIN
100kΩ
Figure 15. Basic Comparator
Figure 18. Squarewave Oscillator
©2007-2009 CADEKA Microcircuits LLC www.cadeka.com
10
Data Sheet
Mechanical Dimensions
SOIC-8 Package
Comlinear CLC2550, CLC4550 Low Power, Low Offset, 2V to 36V Comparators
SOIC-14 Package
Rev 1A
For additional information regarding our products, please visit CADEKA at: cadeka.com
CADEKA Headquarters Loveland, Colorado
T: 970.663.5452
T: 877.663.5452 (toll free)
CADEKA, the CADEKA logo design, COMLINEAR, the COMLINEAR logo design, and ARCTIC are trademarks or registered trademarks of
CADEKA Microcircuits LLC. All other brand and product names may be trademarks of their respective companies.
CADEKA reserves the right to make changes to any products and services herein at any time without notice. CADEKA does not assume any
responsibility or liability arising out of the application or use of any product or service described herein, except as expressly agreed to in
writing by CADEKA; nor does the purchase, lease, or use of a product or service from CADEKA convey a license under any patent rights,
copyrights, trademark rights, or any other of the intellectual property rights of CADEKA or of third parties.
Copyright ©2007-2009 by CADEKA Microcircuits LLC. All rights reserved.
A m p l i fy t h e H u m a n E x p e r i e n c e
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