TI1 LM5019 100v, 100ma constant on-time synchronous buck regulator Datasheet

LM5019
100V, 100mA Constant On-Time Synchronous Buck
Regulator
General Description
Features
The LM5019 is a 100V, 100mA synchronous step-down regulator with integrated high side and low side MOSFETs. The
constant-on-time (COT) control scheme employed in the
LM5019 requires no loop compensation, provides excellent
transient response, and enables very low step-down ratios.
The on-time varies inversely with the input voltage resulting
in nearly constant frequency over the input voltage range. A
high voltage startup regulator provides bias power for internal
operation of the IC and for integrated gate drivers.
A peak current limit circuit protects against overload conditions. The undervoltage lockout (UVLO) circuit allows the
input undervoltage threshold and hysteresis to be independently programmed. Other protection features include thermal shutdown and bias supply undervoltage lockout.
The LM5019 is available in LLP-8 and PSOP-8 plastic packages.
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Wide 9V to 100V Input Range
Integrated 100V, High and Low Side Switches
No Schottky Required
Constant On-Time Control
No Loop Compensation Required
Ultra-Fast Transient Response
Nearly Constant Operating Frequency
Intelligent Peak Current Limit
Adjustable Output Voltage from 1.225V
Precision 2% Feedback Reference
Frequency Adjustable to 1MHz
Adjustable Undervoltage Lockout
Remote Shutdown
Thermal Shutdown
Packages
■ LLP-8
■ PSOP-8
Applications
■
■
■
■
Smart Power Meters
Telecommunication Systems
Automotive Electronics
Isolated Bias Supply
Typical Application
30181701
FIGURE 1.
© 2012 Texas Instruments Incorporated
301817 SNVS788B
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LM5019 100V, 100mA Constant On-Time Synchronous Buck Regulator
February 6, 2012
LM5019
Connection Diagram
30181703
Top View (Connect Exposed Pad to RTN)
30181702
Top View (Connect Exposed Pad to RTN)
Ordering Information
Order Number
Package Type
Package Drawing
Supplied As
LM5019MR
PSOP-8
MRA08A
1000 Units on Tape and Reel
LM5019SD
LLP-8
SDC08B
1000 Units on Tape and Reel
Pin Descriptions
Pin
Name
1
RTN
2
VIN
3
UVLO
4
Description
Application Information
Ground
Ground connection of the integrated circuit.
Input Voltage
Operating input range is 9V to 100V.
Input Pin of Undervoltage Comparator
Resistor divider from VIN to UVLO to GND programs
the undervoltage detection threshold. An internal
current source is enabled when UVLO is above
1.225V to provide hysteresis. When UVLO pin is
pulled below 0.66V externally, the parts goes in
shutdown mode.
RON
On-Time Control
A resistor between this pin and VIN sets the switch ontime as a function of VIN. Minimum recommended ontime is 100ns at max input voltage.
5
FB
Feedback
This pin is connected to the inverting input of the
internal regulation comparator. The regulation level is
1.225V.
6
VCC
Output From the Internal High Voltage Series Pass The internal VCC regulator provides bias supply for the
Regulator. Regulated at 7.6V
gate drivers and other internal circuitry. A 1.0μF
decoupling capacitor is recommended.
7
BST
Bootstrap Capacitor
An external capacitor is required between the BST
and SW pins (0.01μF ceramic). The BST pin capacitor
is charged by the VCC regulator through an internal
diode when the SW pin is low.
8
SW
Switching Node
Power switching node. Connect to the output inductor
and bootstrap capacitor.
EP
Exposed Pad
Exposed pad must be connected to RTN pin. Connect
to system ground plane on application board for
reduced thermal resistance.
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If Military/Aerospace specified devices are required,
please contact the Texas Instruments Sales Office/
Distributors for availability and specifications.
VIN, UVLO to RTN
SW to RTN
BST to VCC
BST to SW
RON to RTN
VCC to RTN
-0.3V to 100V
-1.5V to VIN +0.3V
100V
13V
-0.3V to 100V
-0.3V to 13V
Operating Ratings
LM5019
FB to RTN
ESD Rating (Human Body Model(Note
5)
Lead Temperature (Note 2)
Storage Temperature Range
Absolute Maximum Ratings (Note 1)
-0.3V to 5V
2kV
200°C
-55°C to +150°C
(Note 1)
VIN Voltage
Operating Junction Temperature
9V to 100V
−40°C to +125°C
Electrical Characteristics
Specifications with standard typeface are for TJ = 25°C, and those with boldface type apply over full Operating Junction Temperature range. VIN = 48V, unless otherwise stated. See (Note 3).
Symbol
VCC
Parameter
Conditions
Min
Typ
Max
Units
6.25
7.6
8.55
V
4.5
4.9
Supply
VCC Reg
VCC Regulator Output
VIN = 48V, ICC = 20mA
VCC Current Limit
VIN = 48V(Note 4)
VCC Undervoltage Lockout
Voltage (VCC Increasing)
mA
26
4.15
VCC Undervoltage Hysteresis
V
300
mV
VCC Drop Out Voltage
VIN = 9V, ICC = 20mA
2.3
V
IIN Operating Current
Non-Switching, FB = 3V
1.75
IIN Shutdown Current
UVLO = 0V
50
225
µA
Buck Switch RDS(ON)
ITEST = 200mA, BST-SW =
7V
0.8
1.8
Ω
Synchronous RDS(ON)
ITEST = 200mA
0.45
1
Ω
Gate Drive UVLO
VBST − VSW Rising
3
3.6
mA
Switch Characteristics
2.4
Gate Drive UVLO Hysteresis
260
V
mV
Current Limit
Current Limit Threshold
150
Current Limit Response Time
Time to Switch Off
Off-Time Generator (Test 1)
Off-Time Generator (Test 2)
240
300
mA
150
ns
FB = 0.1V, VIN = 48V
12
µs
FB = 1V, VIN = 48V
2.5
µs
On-Time Generator
TON Test 1
VIN = 32V, RON = 100k
270
350
460
ns
TON Test 2
VIN = 48V, RON = 100k
188
250
336
ns
TON Test 3
VIN = 75V, RON = 250k
250
370
500
ns
TON Test 4
VIN = 10V, RON = 250k
1880
3200
4425
ns
3
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LM5019
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Minimum Off-Time
Minimum Off-Timer
FB = 0V
144
ns
Regulation and Overvoltage Comparators
FB Regulation Level
Internal Reference Trip
Point for Switch ON
FB Overvoltage Threshold
Trip Point for Switch OFF
1.2
FB Bias Current
1.225
1.25
V
1.62
V
60
nA
Undervoltage Sensing Function
UV Threshold
UV Rising
1.19
1.225
1.26
V
UV Hysteresis Input Current
UV = 2.5V
-10
-20
-29
µA
Remote Shutdown Threshold
Voltage at UVLO Falling
0.32
0.66
V
110
mV
Thermal Shutdown Temp.
165
°C
Thermal Shutdown Hysteresis
20
°C
PSOP-8
40
°C/W
LLP-8
40
°C/W
Remote Shutdown Hysteresis
Thermal Shutdown
Tsd
Thermal Resistance
θJA
Junction to Ambient
Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the
device is intended to be functional. For guaranteed specifications and test conditions, see the Electrical Characteristics. The RTN pin is the GND reference
electrically connected to the substrate.
Note 2: For detailed information on soldering plastic PSOP package, refer to the Packaging Data Book available from National Semiconductor Corporation. Max
solder time not to exceed 4 seconds.
Note 3: All limits are guaranteed by design. All electrical characteristics having room temperature limits are tested during production at TA = 25°C. All hot and
cold limits are guaranteed by correlating the electrical characteristics to process and temperature variations and applying statistical process control.
Note 4: VCC provides self bias for the internal gate drive and control circuits. Device thermal limitations limit external loading.
Note 5: The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin.
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LM5019
Typical Performance Characteristics
Efficiency at 240kHz, 10V
VCC vs VIN
30181705
30181704
VCC vs ICC
ICC vs External VCC
30181707
30181706
TOFF (ILIM) vs VFB and VIN
TON vs VIN and RON
30181708
30181709
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LM5019
IIN vs VIN (Operating, Non Switching)
IIN vs VIN (Shutdown)
30181711
30181710
Switching Frequency vs VIN
30181712
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LM5019
Block Diagram
30181713
FIGURE 2. Functional Block Diagram
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LM5019
Functional Description
The LM5019 step-down switching regulator features all the
functions needed to implement a low cost, efficient, buck converter capable of supplying up to 100mA to the load. This high
voltage regulator contains 100V, N-channel buck and synchronous switches, is easy to implement, and is provided in
thermally enhanced PSOP-8 and LLP-8 packages. The regulator operation is based on a constant on-time control
scheme using an on-time inversely proportional to VIN. This
control scheme does not require loop compensation. The current limit is implemented with a forced off-time inversely proportional to VOUT. This scheme ensures short circuit protection while providing minimum foldback. The simplified block
diagram of the LM5019 is shown in Figure 2, Functional Block
Diagram.
The LM5019 can be applied in numerous applications to efficiently regulate down higher voltages. This regulator is well
suited for 48V telecom and 42V automotive power bus
ranges. Protection features include: thermal shutdown, undervoltage lockout, minimum forced off-time, and an intelligent current limit.
The output voltage (VOUT) is set by two external resistors
(RFB1, RFB2). The regulated output voltage is calculated as
follows:
This regulator regulates the output voltage based on ripple
voltage at the feedback input, requiring a minimum amount of
ESR for the output capacitor (COUT). A minimum of 25mV of
ripple voltage at the feedback pin (FB) is required for the
LM5019. In cases where the capacitor ESR is too small, additional series resistance may be required (RC in Figure 3 Low
Ripple Output Configuration).
For applications where lower output voltage ripple is required
the output can be taken directly from a low ESR output capacitor, as shown in Figure 3 Low Ripple Output Configuration. However, RC slightly degrades the load regulation.
Control Overview
The LM5019 buck regulator employs a control principle based
on a comparator and a one-shot on-timer, with the output
voltage feedback (FB) compared to an internal reference
(1.225V). If the FB voltage is below the reference the internal
buck switch is turned on for the one-shot timer period, which
is a function of the input voltage and the programming resistor
(RON). Following the on-time the switch remains off until the
FB voltage falls below the reference, but never before the
minimum off-time forced by the minimum off-time one-shot
timer. When the FB pin voltage falls below the reference and
the minimum off-time one-shot period expires, the buck
switch is turned on for another on-time one-shot period. This
will continue until regulation is achieved and the FB voltage
is approximately equal to 1.225V (typ).
In a synchronous buck converter, the low side (sync) FET is
‘on’ when the high side (buck) FET is ‘off’. The inductor current
ramps up when the high side switch is ‘on’ and ramps down
when the high side switch is ‘off’. There is no diode emulation
feature in this IC, and therefore, the inductor current may
ramp in the negative direction at light load. This causes the
converter to operate in continuous conduction mode (CCM)
regardless of the output loading. The operating frequency remains relatively constant with load and line variations. The
operating frequency can be calculated as follows:
VCC Regulator
The LM5019 contains an internal high voltage linear regulator
with a nominal output of 7.6V. The input pin (VIN) can be connected directly to the line voltages up to 100V. The VCC
regulator is internally current limited to 30mA. The regulator
sources current into the external capacitor at VCC. This regulator supplies current to internal circuit blocks including the
synchronous MOSFET driver and the logic circuits. When the
voltage on the VCC pin reaches the undervoltage lockout
threshold of 4.5V, the IC is enabled.
The VCC regulator contains an internal diode connection to
the BST pin to replenish the charge in the gate drive boot
capacitor when SW pin is low.
At high input voltages, the power dissipated in the high voltage regulator is significant and can limit the overall achievable
output power. As an example, with the input at 48V and
switching at high frequency, the VCC regulator may supply up
to 7mA of current resulting in 48V x 7mA = 336mW of power
dissipation. If the VCC voltage is driven externally by an alternate voltage source, between 8V and 13V, the internal regulator is disabled. This reduces the power dissipation in the IC.
30181717
FIGURE 3. Low Ripple Output Configuration
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N-Channel Buck Switch and Driver
The feedback voltage at FB is compared to an internal 1.225V
reference. In normal operation, when the output voltage is in
regulation, an on-time period is initiated when the voltage at
FB falls below 1.225V. The high side switch will stay on for
the on-time, causing the FB voltage to rise above 1.225V. After the on-time period, the high side switch will stay off until
the FB voltage again falls below 1.225V. During start-up, the
FB voltage will be below 1.225V at the end of each on-time,
causing the high side switch to turn on immediately after the
minimum forced off-time of 144ns. The high side switch can
be turned off before the on-time is over, if the peak current in
the inductor reaches the current limit threshold.
The LM5019 integrates an N-Channel Buck switch and associated floating high voltage gate driver. The gate driver
circuit works in conjunction with an external bootstrap capacitor and an internal high voltage diode. A 0.01uF ceramic
capacitor connected between the BST pin and the SW pin
provides the voltage to the driver during the on-time. During
each off-time, the SW pin is at approximately 0V, and the
bootstrap capacitor charges from VCC through the internal
diode. The minimum off-timer, set to 144ns, ensures a minimum time each cycle to recharge the bootstrap capacitor.
Overvoltage Comparator
The feedback voltage at FB is compared to an internal 1.62V
reference. If the voltage at FB rises above 1.62V the on-time
pulse is immediately terminated. This condition can occur if
the input voltage and/or the output load changes suddenly.
The high side switch will not turn on again until the voltage at
FB falls below 1.225V.
The LM5019 provides an internal synchronous N-Channel
MOSFET rectifier. This MOSFET provides a path for the inductor current to flow when the high-side MOSFET is turned
off.
The synchronous rectifier has no diode emulation mode, and
is designed to keep the regulator in continuous conduction
mode even during light loads which would otherwise result in
discontinuous operation.
On-Time Generator
Undervoltage Detector
The on-time for the LM5019 is determined by the RON resistor,
and is inversely proportional to the input voltage (VIN), resulting in a nearly constant frequency as VIN is varied over its
range. The on-time equation for the LM5019 is:
The LM5019 contains a dual level Undervoltage Lockout (UVLO) circuit. When the UVLO pin voltage is below 0.66V, the
controller is in a low current shutdown mode. When the UVLO
pin voltage is greater than 0.66V but less than 1.225V, the
controller is in standby mode. In standby mode the VCC bias
regulator is active while the regulator output is disabled. When
the VCC pin exceeds the VCC undervoltage threshold and the
UVLO pin voltage is greater than 1.225V, normal operation
begins. An external set-point voltage divider from VIN to GND
can be used to set the minimum operating voltage of the regulator.
UVLO hysteresis is accomplished with an internal 20μA current source that is switched on or off into the impedance of
the set-point divider. When the UVLO threshold is exceeded,
the current source is activated to quickly raise the voltage at
the UVLO pin. The hysteresis is equal to the value of this current times the resistance RUV2.
Synchronous Rectifier
See figure “TON vs VIN and RON” in the section “Performance
Curves”. RON should be selected for a minimum on-time (at
maximum VIN) greater than 100ns, for proper operation. This
requirement limits the maximum switching frequency for high
VIN.
Current Limit
The LM5019 contains an intelligent current limit off-timer. If
the current in the buck switch exceeds 240mA the present
cycle is immediately terminated, and a non-resetable off-timer
is initiated. The length of off-time is controlled by the FB voltage and the input voltage VIN. As an example, when FB = 0V
and VIN = 48V, the maximum off-time is set to 16μs. This condition occurs when the output is shorted, and during the initial
part of start-up. This amount of time ensures safe short circuit
operation up to the maximum input voltage of 100V.
In cases of overload where the FB voltage is above zero volts
(not a short circuit) the current limit off-time is reduced. Reducing the off-time during less severe overloads reduces the
amount of foldback, recovery time, and start-up time. The offtime is calculated from the following equation:
UVLO
VCC
Mode
Description
<0.66V
Shutdown VCC Regulator
Disabled.
Switcher Disabled.
0.66V – 1.225V
Standby
VCC Regulator
Enabled
Switcher Disabled.
VCC <4.5V Standby
VCC Regulator
Enabled.
Switcher Disabled.
>1.225V
VCC >4.5V Operating VCC enabled.
Switcher enabled.
If the UVLO pin is wired directly to the VIN pin, the regulator
will begin operation once the VCC undervoltage is satisfied.
The current limit protection feature is peak limited. The maximum average output will be less than the peak.
9
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LM5019
Regulation Comparator
LM5019
30181721
FIGURE 4. UVLO Resistor Setting
When activated, typically at 165°C, the controller is forced into
a low power reset state, disabling the buck switch and the
VCC regulator. This feature prevents catastrophic failures from
accidental device overheating. When the junction temperature reduces below 145°C (typical hysteresis = 20°C), the
VCC regulator is enabled, and normal operation is resumed.
Thermal Protection
The LM5019 should be operated so the junction temperature
does not exceed 150°C during normal operation. An internal
Thermal Shutdown circuit is provided to protect the LM5019
in the event of a higher than normal junction temperature.
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SELECTION OF EXTERNAL COMPONENTS
Selection of external components is illustrated through a design example. The design example specifications are as follows:
where K = 1 x 10–10. Operation at high switching frequency
results in lower efficiency while providing the smallest solution. For this example a 400kHz was selected, resulting in
RON = 246kΩ. Selecting a standard value for RON = 237kΩ
results in a nominal frequency of 416kHz.
Buck Converter Design Specifications
Input Voltage Range
12.5V to 95V
Output Voltage
10V
Maximum Load Current
100mA
Switching Frequency
400kHz
Inductor Selection:
The inductance selection is a compromise between solution
size, output ripple, and efficiency. The peak inductor current
at maximum load current should be smaller than the minimum
current limit of 150mA. The maximum permissible peak to
peak inductor ripple is:
RFB1, RFB2:
VOUT = VFB x (RFB2/RFB1 + 1), and since VFB = 1.225V, the
ratio of RFB2 to RFB1 calculates as 7:1. Standard values of
6.98kΩ and 1.00kΩ are chosen. Other values could be used
as long as the 7:1 ratio is maintained.
ΔIL = 2*(ILIM(min) - IOUT(max) = 2*50 = 100mA
The minimum inductance is given by:
Frequency Selection:
At the minimum input voltage, the maximum switching frequency of LM5019 is restricted by the forced minimum offtime (TOFF(MIN)) as given by:
Resulting in L=215µH. A standard value of 220µH is selected.
For proper operation the inductor saturation current should be
higher than the peak encountered in the application. For robust short circuit protection, the inductor saturation current
should be higher than the maximum current limit of 300mA.
Similarly, at maximum input voltage, the maximum switching
frequency of LM5019 is restricted by the minimum TON as
given by:
30181722
FIGURE 5. Reference Schematic for Selection of External Components
11
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LM5019
Resistor RON sets the nominal switching frequency based on
the following equations:
Application Information
LM5019
Input Capacitor:
Input capacitor should be large enough to limit the input voltage ripple:
Output Capacitor:
The output capacitor is selected to minimize the capacitive
ripple across it. The maximum ripple is observed at maximum
input voltage and is given by:
choosing a ΔVIN = 0.5V gives a minimum CIN = 0.12μF. A
standard value of 1μF is selected. The input capacitor should
be rated for the maximum input voltage under all conditions.
A 100V, X7R dielectric should be selected for this design.
Input capacitor should be placed directly across VIN and RTN
(pin 2 and 1) of the IC. If it is not possible to place all of the
input capacitor close to the IC, a 0.1μF capacitor should be
placed near the IC to provide a bypass path for the high frequency component of the switching current. This helps limit
the switching noise.
where ΔVripple is the voltage ripple across the capacitor. Substituting ΔVripple = 10mV gives COUT = 2.94μF. A 4.7μF standard value is selected. An X5R or X7R type capacitor with a
voltage rating 16V or higher should be selected.
Series Ripple Resistor RC:
The series resistor should be selected to produce sufficient
ripple at the feedback node. The ripple produced by RC is
proportional to the inductor current ripple, and therefore RC
should be chosen for minimum inductor current ripple which
occurs at minimum input voltage. The RC is calculated by the
equation:
UVLO Resistors:
The UVLO resistors RFB1 and RFB2 set the UVLO threshold
and hysteresis according to the following relationship:
and
This gives an RC of greater than or equal to 10.8Ω. Selecting
RC = 11Ω results in ~1V of maximum output voltage ripple.
For applications requiring lower output voltage ripple, Type II
or Type III ripple injection circuits should be used as described
in the section “Ripple Configuration”.
where IHYS = 20μA. Setting UVLO hysteresis of 2.5V and UVLO rising threshold of 12V results in RUV1 = 14.53kΩ and
RUV2 = 125kΩ. Selecting standard value of RUV1 = 14kΩ and
RUV2 = 125kΩ results in UVLO thresholds and hysteresis of
12.4V and 2.5V respectively.
VCC and Bootstrap Capacitor:
The VCC capacitor provides charge to bootstrap capacitor as
well as internal circuitry and low side gate driver. The Bootstrap capacitor provides charge to high side gate driver. A
good value for CVCC is 1μF. A good value for CBST is 0.01μF.
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Capacitive ripple caused by the inductor current ripple
charging/discharging the output capacitor.
2. Resistive ripple caused by the inductor current ripple
flowing through the ESR of the output capacitor.
The capacitive ripple is not in phase with the inductor current.
As a result, the capacitive ripple does not decrease monotonically during the off-time. The resistive ripple is in phase
with the inductor current and decreases monotonically during
the off-time. The resistive ripple must exceed the capacitive
ripple at the output node (VOUT) for stable operation. If this
condition is not satisfied unstable switching behavior is observed in COT converters, with multiple on-time bursts in
close succession followed by a long off-time.
Type 3 ripple method uses Rr and Cr and the switch node
(SW) voltage to generate a triangular ramp. This triangular
ramp is ac coupled using Cac to the feedback node (FB). Since
this circuit does not use the output voltage ripple, it is ideally
suited for applications where low output voltage ripple is required. See application note AN-1481 for more details for
each ripple generation method.
RIPPLE CONFIGURATION
LM5019 uses Constant-On-Time (COT) control scheme, in
which the on-time is terminated by an on-timer, and the offtime is terminated by the feedback voltage (VFB) falling below
the reference voltage (VREF). Therefore, for stable operation,
the feedback voltage must decrease monotonically, in phase
with the inductor current during the off-time. Furthermore, this
change in feedback voltage (VFB) during off-time must be
large enough to suppress any noise component present at the
feedback node.
Table 1 shows three different methods for generating appropriate voltage ripple at the feedback node. Type 1 and Type
2 ripple circuits couple the ripple at the output of the converter
to the feedback node (FB). The output voltage ripple has two
components:
30181733
FIGURE 6. Final Schematic for 12V to 95V Input, and 10V, 100mA Output Buck Converter
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LM5019
1.
APPLICATION CIRCUIT: 12V TO 95V INPUT AND 10V,
100mA OUTPUT BUCK CONVERTER
The application schematic of a buck supply is shown in Figure
6 below. For output voltage (VOUT) above the maximum regulation threshold of VCC (8.3V, see electrical characteristics),
the VCC pin can be connected to VOUT through a diode (D2),
as shown below, for higher efficiency and lower power dissipation in the IC.
LM5019
Type 1
Lowest Cost Configuration
Type 2
Reduced Ripple Configuration
LAYOUT RECOMMENDATION
A proper layout is essential for optimum performance of the
circuit. In particular, the following guidelines should be observed:
1. CIN: The loop consisting of input capacitor (CIN), VIN pin,
and RTN pin carries switching currents. Therefore, the
input capacitor should be placed close to the IC, directly
across VIN and RTN pins and the connections to these
two pins should be direct to minimize the loop area. In
general it is not possible to accommodate all of input
capacitance near the IC. A good practice is to use a
0.1μF or 0.47μF capacitor directly across the VIN and
RTN pins close to the IC, and the remaining bulk
capacitor as close as possible (Refer to Figure 7
Placement of Bypass Capacitors).
2. CVCC and CBST: The VCC and bootstrap (BST) bypass
capacitors supply switching currents to the high and low
3.
4.
Type 3
Minimum Ripple Configuration
side gate drivers. These two capacitors should also be
placed as close to the IC as possible, and the connecting
trace length and loop area should be minimized (See
Figure 7 Placement of Bypass Capacitors).
The Feedback trace carries the output voltage
information and a small ripple component that is
necessary for proper operation of LM5019. Therefore,
care should be taken while routing the feedback trace to
avoid coupling any noise to this pin. In particular,
feedback trace should not run close to magnetic
components, or parallel to any other switching trace.
SW trace: The SW node switches rapidly between VIN
and GND every cycle and is therefore a possible source
of noise. The SW node area should be minimized. In
particular, the SW node should not be inadvertently
connected to a copper plane or pour.
30181740
FIGURE 7. Placement of Bypass Capacitors
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LM5019
Physical Dimensions inches (millimeters) unless otherwise noted
PSOP–8 Outline Drawing
NS Package Number MRA08A
8-Lead LLP Package
NS Package Number SDC08B
15
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LM5019 100V, 100mA Constant On-Time Synchronous Buck Regulator
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