LINER LTC1874 Dual constant frequency current mode step-down dc/dc controller Datasheet

LTC1874
Dual Constant Frequency
Current Mode Step-Down
DC/DC Controller
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FEATURES
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DESCRIPTIO
The LTC®1874 is a dual constant frequency current mode
step-down DC/DC controller with excellent AC and DC load
and line regulation. Each controller has an accurate
undervoltage lockout that shuts down the individual controller when the input voltage falls below 2.0V.
High Efficiency: Up to 94%
High Output Currents Easily Achieved
Wide VIN Range: 2.5V to 9.8V
Constant Frequency 550kHz Operation
Burst ModeTM Operation at Light Load
Low Dropout: 100% Duty Cycle
0.8V Reference Allows Low Output Voltages
Current Mode Operation for Excellent
Line and Load Transient Response
Low Quiescent Current: 270µA (Each Controller)
Separate Shutdown Pin for Each Controller
Shutdown Mode Draws Only
8µA Supply Current (Each Controller)
±2.5% Reference Accuracy
Available in 16-Lead Narrow SSOP
Each Controller Functions Independent of the Other
The LTC1874 boasts ±2.5% output voltage accuracy and
consumes only 270µA of quiescent current per controller.
The LTC1874 is configured with Burst Mode operation,
which enhances efficiency at low output current for applications where efficiency is a prime consideration.
To further maximize the life of a battery source, each
external P-channel MOSFET is turned on continuously in
dropout (100% duty cycle). In shutdown, each controller
draws a mere 8µA. High constant operating frequency of
550kHz allows the use of small external inductors.
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APPLICATIO S
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1- or 2-Cell Lithium-Ion-Powered Applications
Personal Information Appliances
Portable Computers
Distributed 3.3V, 2.5V or 1.8V Power Systems
, LTC and LT are registered trademarks of Linear Technology Corporation.
Burst Mode is a trademark of Linear Technology Corporation.
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The LTC1874 is available in a small footprint 16-lead
narrow SSOP.
TYPICAL APPLICATION
VIN
3.5V
TO 9.5V
CIN
10µF
16V
×2
VOUT1
3.3V
1A
C1, C2: SANYO POSCAP 6TPA47M
CIN: TAIYO YUDEN CERAMIC
EMK325BJ106MNT (× 2)
D1, D2: MBRM120
L1, L2: COILCRAFT D01608C-472
M1, M2: Si3443DV
R1, R2: DALE 0.25W
249k
R1
0.04Ω
1
2
3
L1 M1
4.7µH
+
C1
D1
47µF
6V
4
10k
13
220pF
14
15
80.6k
16
LTC1874
8
PVIN2
VIN1
7
SENSE1– PGATE2
6
PGND2
GND1
5
ITH/RUN2
VFB1
12
VFB2
ITH/RUN1
11
PGND1
GND2
10
PGATE1 SENSE2 –
9
PVIN1
VIN2
R2
0.04Ω
M2
L2
4.7µH
10k
D2
220pF
+
C2
47µF
6V
VOUT2
1.8V
1A
100k
80.6k
1874 TA01
Figure 1. LTC1874 3.5V-9.5V Input to 3.3V/1A and 1.8V/1A Dual Step-Down Converter
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LTC1874
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ABSOLUTE MAXIMUM RATINGS
PACKAGE/ORDER INFORMATION
(Note 1)
Input Supply Voltage (VIN, PVIN) ...............– 0.3V to 10V
SENSE –, PGATE Voltages ............. – 0.3V to (VIN + 0.3V)
VFB, ITH/RUN Voltages ..............................– 0.3V to 2.4V
PGATE Peak Output Current (< 10µs) ....................... 1A
Storage Ambient Temperature Range ... – 65°C to 150°C
Operating Temperature Range (Note 2) .. – 40°C to 85°C
Junction Temperature (Note 3) ............................. 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
TOP VIEW
VIN1
1
16 PVIN1
SENSE1–
2
15 PGATE1
GND1
3
14 PGND1
VFB1
4
13 ITH/RUN1
ITH/RUN2
5
12 VFB2
PGND2
6
11 GND2
PGATE2
7
10 SENSE2 –
PVIN2
8
9
ORDER PART
NUMBER
LTC1874EGN
GN PART MARKING
VIN2
1874
GN PACKAGE
16-LEAD NARROW PLASTIC SSOP
TJMAX = 150°C, θJA = 135°C/ W
Consult factory for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
All specifications apply to each controller. The ● denotes specifications that
apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 4.2V unless otherwise specified.
(Note 2)
PARAMETER
CONDITIONS
Input DC Supply Current (Per Controller)
Normal Operation
Sleep Mode
Shutdown
UVLO
Typicals at VIN = 4.2V (Note 4)
2.4V ≤ VIN ≤ 9.8V
2.4V ≤ VIN ≤ 9.8V
2.4V ≤ VIN ≤ 9.8V, VITH/RUN = 0V
VIN < UVLO Threshold
MIN
Undervoltage Lockout Threshold
VIN Falling
VIN Rising
●
Shutdown Threshold (at ITH/RUN)
●
TYP
MAX
UNITS
270
230
8
6
420
370
22
10
µA
µA
µA
µA
1.55
1.85
2.0
2.3
2.35
2.40
V
V
0.15
0.35
0.55
V
0.25
0.5
0.85
µA
0.780
0.770
0.800
0.800
0.820
0.830
V
V
Start-Up Current Source
VITH/RUN = 0V
Regulated Feedback Voltage
TA = 0°C to 70°C (Note 5)
TA = – 40°C to 85°C (Note 5)
Output Voltage Line Regulation
2.4V ≤ VIN ≤ 9.8V (Note 5)
0.05
mV/V
Output Voltage Load Regulation
ITH/RUN Sinking 5µA (Note 5)
ITH/RUN Sourcing 5µA (Note 5)
2.5
2.5
mV/µA
mV/µA
VFB Input Current
(Note 5)
10
50
Overvoltage Protect Threshold
Measured at VFB
0.860
0.895
●
●
0.820
Overvoltage Protect Hysteresis
Oscillator Frequency
20
VFB = 0.8V
VFB = 0V
500
550
120
nA
V
mV
650
kHz
kHz
Gate Drive Rise Time
CLOAD = 3000pF
40
ns
Gate Drive Fall Time
CLOAD = 3000pF
40
ns
Peak Current Sense Voltage
(Note 6)
120
mV
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The LTC1874E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formula:
TJ = TA + (PD • θJA°C/W)
2
Note 4: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency.
Note 5: Each controller in the LTC1874 is individually tested in a feedback
loop that servos VFB to the output of the error amplifier.
Note 6: Peak current sense voltage is reduced dependent upon duty cycle
to a percentage of value as given in Figure 2.
LTC1874
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TYPICAL PERFORMANCE CHARACTERISTICS
Reference Voltage
vs Temperature
10
VIN = 4.2V
8
810
805
800
795
790
785
6
2.16
4
2.12
0
–2
–4
–6
5 25 45 65 85 105 125
TEMPERATURE (°C)
5 25 45 65 85 105 125
TEMPERATURE (°C)
2.04
2.00
1.96
1.84
–55 –35 –15
5 25 45 65 85 105 125
TEMPERATURE (°C)
1874 G02
Maximum (VIN – SENSE –) Voltage
vs Duty Cycle
1874 G03
Shutdown Threshold
vs Temperature
600
VIN = 4.2V
TA = 25°C
120
2.08
1.88
–10
–55 –35 –15
1874 G01
130
VIN FALLING
1.92
–8
560
VIN = 4.2V
520
110
ITH/RUN VOLTAGE (mV)
775
–55 –35 –15
2.20
2
780
TRIP VOLTAGE (mV)
VFB VOLTAGE (mV)
815
2.24
VIN = 4.2V
TRIP VOLTAGE (V)
820
NORMALIZED FREQUENCY (%)
825
Undervoltage Lockout Trip
Voltage vs Temperature
Normalized Oscillator Frequency
vs Temperature
100
90
80
70
440
400
360
320
280
60
50
20
480
240
30
40
50 60 70 80
DUTY CYCLE (%)
90
100
1874 G04
200
–55 –35 –15
5 25 45 65 85 105 125
TEMPERATURE (°C)
1874 G05
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PIN FUNCTIONS
VIN1 (Pin 1): Main Supply Pin for Controller #1. This pin
delivers the Input DC Supply Current (listed in the Electrical Characteristics table) plus a small amount of logic
switching current. Must be connected to PVIN1 (Pin 16)
and closely decoupled to GND1 (Pin 3).
VIN2 (Pin 9): Main Supply Pin for Controller #2. This pin
delivers the Input DC Supply Current (listed in the Electrical Characteristics table) plus a small amount of logic
switching current. Must be connected to PVIN2 (Pin 8) and
closely decoupled to GND2 (Pin 11).
SENSE1 – (Pin 2): The Negative Input to the Current
Comparator of Controller #1.
SENSE2– (Pin 10): The Negative Input to the Current
Comparator of Controller #2.
GND1 (Pin 3): Signal Ground for Controller #1. Must be
connected to PGND1 (Pin 14).
GND2 (Pin 11): Signal Ground for Controller #2. Must be
connected to PGND2 (Pin 6).
VFB1 (Pin 4): Receives the feedback voltage from an
external resistive divider across the output of Controller
#1.
VFB2 (Pin 12): Receives the feedback voltage from an
external resistive divider across the output of Controller
#2.
ITH/RUN2 (Pin 5): This pin performs two functions. It
serves as the error amplifier compensation point as well as
the run control input of Controller #2. The current comparator threshold increases with this control voltage.
Nominal voltage range for this pin is 0.7V to 1.9V. Forcing
this pin below 0.35V causes Controller #2 to be shut down.
In shutdown, all functions of Controller #2 are disabled
and PGATE2 (Pin 7) is held high.
ITH/RUN1 (Pin 13): This pin performs two functions. It
serves as the error amplifier compensation point as well as
the run control input of Controller #1. The current comparator threshold increases with this control voltage.
Nominal voltage range for this pin is 0.7V to 1.9V. Forcing
this pin below 0.35V causes Controller #1 to be shut down.
In shutdown, all functions of Controller #1 are disabled
and PGATE1 (Pin 15) is held high.
PGND2 (Pin 6): Power Ground for Controller #2. Must be
connected to GND2 (Pin 11).
PGND1 (Pin 14): Power Ground for Controller #1. Must be
connected to GND1 (Pin 3).
PGATE2 (Pin 7): Gate Drive for the External P-Channel
MOSFET of Controller #2. This pin swings from 0V to the
voltage of PVIN2.
PGATE1 (Pin 15): Gate Drive for the External P-Channel
MOSFET of Controller #1. This pin swings from 0V to the
voltage of PVIN1.
PVIN2 (Pin 8): Power Supply Pin for Controller #2. This pin
delivers the dynamic switching current that drives the gate
of the external P-channel MOSFET of Controller #2. Must
be connected to VIN2 (Pin 9) and closely decoupled to
PGND2 (Pin 6).
PVIN1 (Pin 16): Power Supply Pin for Controller #1. This
pin delivers the dynamic switching current that drives the
gate of the external P-channel MOSFET of Controller #1.
Must be connected to VIN1 (Pin 1) and closely decoupled
to PGND1 (Pin 14).
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FUNCTIONAL DIAGRA
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VIN1
SENSE1–
1
2
Controller #1
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PVIN1
ICMP
16
–
RS1
R
Q
S
SLOPE
COMP
OSC
PGATE1
SWITCHING
LOGIC AND
BLANKING
CIRCUIT
15
PGND1
14
–
FREQ
FOLDBACK
BURST
CMP
+
0.3V
+
SHORT-CIRCUIT
DETECT
SLEEP
–
0.15V
OVP
+
–
VREF
+
60mV
+
VREF
0.8V
VIN
EAMP
0.5µA
VFB1
+
–
4
VIN
VIN
0.3V
–
0.35V
+
SHDN
CMP
VREF
0.8V
VOLTAGE
REFERENCE
–
GND1
SHDN
UV
3
UNDERVOLTAGE
LOCKOUT
1.2V
13
ITH/RUN1
VIN2
SENSE2 –
9
10
Controller #2
PVIN2
8
PGATE2
7
GND2
11
PGND2
CONTROLLER #2 IS THE SAME AS CONTROLLER #1
6
VFB2
12
1874FD
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ITH/RUN2
5
LTC1874
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OPERATIO (Refer to Functional Diagram)
The LTC1874 is a dual, constant frequency current mode
switching regulator. The two switching regulators function identically but independent of each other. The following description of operation is written for a single
switching regulator.
high, turning off the external MOSFET. The sleep signal
goes low when the ITH/RUN voltage goes above 0.925V
and the controller resumes normal operation. The next
oscillator cycle will turn the external MOSFET on and the
switching cycle repeats.
Main Control Loop
Dropout Operation
During normal operation, the external P-channel power
MOSFET is turned on by the oscillator and turned off when
the current comparator (ICMP) resets the RS latch. The
peak inductor current at which ICMP resets the RS latch is
controlled by the voltage on the ITH/RUN pin, which is the
output of the error amplifier EAMP. An external resistive
divider connected between VOUT and ground allows the
EAMP to receive an output feedback voltage VFB. When the
load current increases, it causes a slight decrease in VFB
relative to the 0.8V reference, which in turn causes the
ITH/RUN voltage to increase until the average inductor
current matches the new load current.
When the input supply voltage decreases towards the
output voltage, the rate of change of inductor current
during the ON cycle decreases. This reduction means that
the external P-channel MOSFET will remain on for more
than one oscillator cycle since the inductor current has not
ramped up to the threshold set by EAMP. Further reduction in input supply voltage will eventually cause the
P-channel MOSFET to be turned on 100%, i.e., DC. The
output voltage will then be determined by the input voltage
minus the voltage drop across the MOSFET, the sense
resistor and the inductor.
The main control loop is shut down by pulling the ITH/RUN
pin low. Releasing ITH/RUN allows an internal 0.5µA
current source to charge up the external compensation
network. When the ITH/RUN pin reaches 0.35V, the main
control loop is enabled with the ITH/RUN voltage then
pulled up to its zero current level of approximately 0.7V.
As the external compensation network continues to charge
up, the corresponding output current trip level follows,
allowing normal operation.
Comparator OVP guards against transient overshoots
greater than 7.5% by turning off the external P-channel
power MOSFET and keeping it off until the fault is
removed.
Burst Mode Operation
The controller enters Burst Mode operation at low load
currents. In this mode, the peak current of the inductor is
set as if VITH/RUN = 1V (at low duty cycles) even though
the voltage at the ITH/RUN pin is at a lower value. If the
inductor’s average current is greater than the load requirement, the voltage at the ITH/RUN pin will drop. When the
ITH/RUN voltage goes below 0.85V, the sleep signal goes
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Undervoltage Lockout
To prevent operation of the P-channel MOSFET below safe
input voltage levels, an undervoltage lockout is incorporated into the controller. When the input supply voltage
drops below approximately 2.0V, the P-channel MOSFET
and all circuitry is turned off except the undervoltage
block, which draws only several microamperes.
Short-Circuit Protection
When the output is shorted to ground, the frequency of the
oscillator will be reduced to about 120kHz. This lower
frequency allows the inductor current to safely discharge,
thereby preventing current runaway. The oscillator’s frequency will gradually increase to its designed rate when
the feedback voltage again approaches 0.8V.
Overvoltage Protection
As a further protection, the overvoltage comparator in the
controller will turn the external MOSFET off when the
feedback voltage has risen 7.5% above the reference
voltage of 0.8V. This comparator has a typical hysteresis
of 20mV.
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OPERATIO
110
Slope Compensation and Inductor’s Peak Current
100
The inductor’s peak current is determined by:
VITH – 0.7
(
10 RSENSE
)
when the controller is operating below 40% duty cycle.
However, once the duty cycle exceeds 40%, slope compensation begins and effectively reduces the peak inductor
current. The amount of reduction is given by the curves in
Figure 2.
SF = IOUT/IOUT(MAX) (%)
IPK =
90
80
70
60
50
IRIPPLE = 0.4IPK
AT 5% DUTY CYCLE
IRIPPLE = 0.2IPK
AT 5% DUTY CYCLE
40
30
20
VIN = 4.2V
10
0
10 20 30 40 50 60 70 80 90 100
DUTY CYCLE (%)
1874 F02
Figure 2. Percentage of Maximum Output Current vs Duty Cycle
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APPLICATIO S I FOR ATIO
The basic LTC1874 application circuit is shown in
Figure 1. External component selection for each controller is driven by the load requirement and begins with the
selection of L1 and RSENSE (= R1). Next, the power
MOSFET (M1) and the output diode (D1) are selected
followed by CIN and COUT (= C1).
RSENSE Selection for Output Current
RSENSE is chosen based on the required output current.
With the current comparator monitoring the voltage developed across RSENSE, the threshold of the comparator
determines the inductor’s peak current. The output current the controller can provide is given by:
IOUT =
0.12V IRIPPLE
−
RSENSE
2
where IRIPPLE is the inductor peak-to-peak ripple current
(see Inductor Value Calculation section).
A reasonable starting point for setting ripple current is
IRIPPLE = (0.4)(IOUT). Rearranging the above equation, it
becomes:
RSENSE =
1
for Duty Cycle < 40%
10 IOUT
( )( )
However, for operation that is above 40% duty cycle, slope
compensation effect has to be taken into consideration to
select the appropriate value to provide the required amount
of current. Using Figure 2, the value of RSENSE is:
RSENSE =
SF
(10)(IOUT )(100)
where SF is the “slope factor.”
Inductor Value Calculation
The operating frequency and inductor selection are interrelated in that higher operating frequencies permit the use
of a smaller inductor for the same amount of inductor
ripple current. However, this is at the expense of efficiency
due to an increase in MOSFET gate charge losses.
The inductance value also has a direct effect on ripple
current. The ripple current, IRIPPLE, decreases with higher
inductance or frequency and increases with higher VIN or
VOUT. The inductor’s peak-to-peak ripple current is given
by:
IRIPPLE =
VIN − VOUT  VOUT + VD 


 VIN + VD 
fL
()
where f is the operating frequency. Accepting larger values
of IRIPPLE allows the use of low inductances, but results in
higher output voltage ripple and greater core losses. A
reasonable starting point for setting ripple current is
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APPLICATIO S I FOR ATIO
IRIPPLE = 0.4(IOUT(MAX)). Remember, the maximum IRIPPLE
occurs at the maximum input voltage.
In Burst Mode operation on an LTC1874 controller, the
ripple current is normally set such that the inductor
current is continuous during the burst periods. Therefore,
the peak-to-peak ripple current must not exceed:
IRIPPLE ≤
0.03V
RSENSE
This implies a minimum inductance of:
LMIN =
VIN − VOUT  VOUT + VD 
 0.03   VIN + VD 
f

 RSENSE 
(Use VIN(MAX) = VIN)
A smaller value than L MIN could be used in the circuit;
however, the inductor current will not be continuous
during burst periods.
Inductor Core Selection
Once the value of inductor is known, an off the shelf
inductor can be selected. The inductor should be rated for
the calculated peak current. Some manufacturers specify
both peak saturation current and peak RMS current. Make
sure that the RMS current meets your continuous load
requirements. Also, you may want to compare the DC
resistance of different inductors in order to optimize the
efficiency.
Inductor core losses are usually not specified and you will
need to evaluate them yourself. Usually, the core losses
are not a problem because the inductors operate with
relatively low magnetic flux swings. The best way to
evaluate the core losses is by measuring the converters
efficiency. Converter efficiency will reveal the difference in
both DC current losses and core losses.
Off the shelf inductors are available from numerous manufacturers. Some of the most common manufacturers are
Coilcraft, Coiltronics, Panasonic, Toko, Tokin, Murata and
Sumida.
8
Power MOSFET Selection
The main selection criteria for the power MOSFET are the
threshold voltage VGS(TH), the “on” resistance RDS(ON),
reverse transfer capacitance CRSS and total gate charge.
Since the controller is designed for operation down to low
input voltages, a logic level threshold MOSFET (RDS(ON)
guaranteed at VGS = 2.5V) is required for applications that
work close to this voltage. When these MOSFETs are used,
make sure that the input supply to the controller is less
than the absolute maximum VGS rating, typically 8V.
The required minimum RDS(ON) of the MOSFET is governed by its allowable power dissipation. For applications
that may operate the controller in dropout, i.e., 100% duty
cycle, at its worst case the required RDS(ON) is given by:
R DS(ON)
DC=100%
=
PP
(IOUT(MAX)) (1+ δp)
2
where PP is the allowable power dissipation and δp is the
temperature dependency of RDS(ON). (1 + δp) is generally
given for a MOSFET in the form of a normalized RDS(ON) vs
temperature curve, but δp = 0.005/°C can be used as an
approximation for low voltage MOSFETs.
In applications where the maximum duty cycle is less than
100% and the controller is in continuous mode, the
RDS(ON) is governed by:
R DS(ON) ≅
PP
(DC )IOUT (1+ δp)
2
where DC is the maximum operating duty cycle of the
controller.
Output Diode Selection
The catch diode carries load current during the off-time.
The average diode current is therefore dependent on the
MOSFET duty cycle. At high input voltages the diode
conducts most of the time. As VIN approaches VOUT the
diode conducts only a small fraction of the time. The most
stressful condition for the diode is when the output is
LTC1874
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APPLICATIO S I FOR ATIO
short-circuited. Under this condition the diode must safely
handle IPEAK at close to 100% duty cycle. Therefore, it is
important to adequately specify the diode peak current and
average power dissipation so as not to exceed the diode
ratings.
Under normal load conditions, the average current conducted by the diode is:
V −V 
ID =  IN OUT  IOUT
 VIN + VD 
The allowable forward voltage drop in the diode is calculated from the maximum short-circuit current as:
VF ≈
PD
ISC(MAX)
where PD is the allowable power dissipation and will be
determined by efficiency and/or thermal requirements.
Schottky diodes are a good choice for low forward drop
and fast switching times. Remember to keep lead length
short and observe proper grounding (see Board Layout
Checklist) to avoid ringing and increased dissipation.
CIN and COUT Selection
In continuous mode, the source current of the P-channel
MOSFET is a square wave of duty cycle (VOUT + VD)/
(VIN + VD). To prevent large voltage transients, a low ESR
input capacitor sized for the maximum RMS current must
be used. The maximum RMS capacitor current is given by:
CIN Required IRMS ≈ IMAX
[V (V
OUT
IN − VOUT
This formula has a maximum at VIN = 2VOUT, where IRMS
= IOUT /2. This simple worst-case condition is commonly
used for design because even significant deviations do not
offer much relief. Several capacitors may be paralleled to
meet the size or height requirements in the design. Due to
the high operating frequency of the controller, ceramic
capacitors can also be used for CIN. Always consult the
manufacturer if there is any question.
The selection of COUT is driven by the required effective
series resistance (ESR). Typically, once the ESR requirement is satisfied, the capacitance is adequate for filtering.
The output ripple (∆VOUT) is approximated by:

1 
∆VOUT ≈ IRIPPLE ESR +

4 fC OUT 

where f is the operating frequency, COUT is the output
capacitance and IRIPPLE is the ripple current in the inductor. The output ripple is highest at maximum input voltage
since ∆IL increases with input voltage.
Once the ESR requirement for COUT has been met, the
RMS current rating generally far exceeds the IRIPPLE(P-P)
requirement. Multiple capacitors may have to be paralleled to meet the ESR or RMS current handling requirements of the application. Aluminum electrolytic and dry
tantalum capacitors are both available in surface mount
configurations. An excellent choice of tantalum capacitors
are the AVX TPS and KEMET T510 series of surface mount
tantalum capacitors.
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VIN
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APPLICATIO S I FOR ATIO
105
Although the controller can function down to approximately 2.0V, the maximum allowable output current is
reduced when VIN decreases below 3V. Figure 3 shows the
amount of change as the supply is reduced down to 2V.
Also shown in Figure 3 is the effect of VIN on VREF as VIN
goes below 2.3V.
100
NORMALIZED VOLTAGE (%)
Low Supply Operation
VREF
VITH
95
90
85
80
Setting Output Voltage
The controller develops a 0.8V reference voltage between
the feedback (VFB) terminal and ground (see Figure 4). By
selecting resistor R1, a constant current is caused to flow
through R1 and R2 to set the overall output voltage. The
regulated output voltage is determined by:
75
2.0
2.2
3.0
2.4
2.6
2.8
INPUT VOLTAGE (V)
1874 F03
Figure 3. Line Regulation of VREF and VITH
 R2 
VOUT = 0.8V 1 + 
 R1 
VOUT
1/2 LTC1874
For most applications, an 80k resistor is suggested for R1.
To prevent stray pickup, locate resistors R1 and R2 close
to the LTC1874.
VFB1
R2
4
R1
GND1
3
1874F04
Foldback Current Limiting
As described in the Output Diode Selection, the worstcase dissipation occurs with a short-circuited output
when the diode conducts the current limit value almost
continuously. To prevent excessive heating in the diode,
foldback current limiting can be added to reduce the
current in proportion to the severity of the fault.
Foldback current limiting is implemented by adding diodes DFB1 and DFB2 between the output and the ITH/RUN
pin as shown in Figure 5. In a hard short (VOUT = 0V), the
current will be reduced to approximately 50% of the
maximum output current.
10
Figure 4. Setting Output Voltage
1/2 LTC1874
VOUT
R2
13
ITH /RUN1 VFB1
4
+
DFB1
R1
GND1
3
DFB2
1874 F05
Figure 5. Foldback Current Limiting
LTC1874
U
W
U U
APPLICATIO S I FOR ATIO
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1874. These items are illustrated graphically for a
single controller in the layout diagram in Figure 6. Check
the following in your layout:
1. Is the Schottky diode closely connected between power
ground (PGND) and the drain of the external MOSFET?
2. Does the (+) plate of CIN connect to the sense resistor
as closely as possible? This capacitor provides AC
current to the MOSFET.
3. Is the input decoupling capacitor (0.1µF) connected
closely between VIN and signal ground (GND)?
5. Is the trace from SENSE – to the SENSE resistor kept
short? Does the trace connect close to RSENSE?
6. Keep the switching node PGATE away from sensitive
small signal nodes.
7. Does the VFB pin connect directly to the feedback
resistors? The resistive divider R1 and R2 must be
connected between the (+) plate of COUT and signal
ground.
8. PVIN must connect to VIN and PGND must connect to
GND. Isolate high current power paths from signal
power and signal ground where possible in the layout.
An unbroken ground plane is recommended.
4. Connect the end of RSENSE as close to VIN as possible.
The VIN pin is the SENSE + of the current comparator.
VIN
+
CIN
L1
RSENSE
SW
VOUT
M1
+
R2
COUT
D1
1
2
0.1µF
3
4
R1
1/2 LTC1874
VIN
SENSE –
GND
VFB
PVIN
PGATE
PGND
ITH/RUN
16
15
14
13
RITH
CITH
1874 F06
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 6. LTC1874 Layout Diagram (See PC Board Layout Checklist)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LTC1874
U
TYPICAL APPLICATIO
LTC1874 2.5V–8.5V Input to 3.3V/1A and 1.8V/1A Dual Converter
VIN
2.5V TO 8.5V
CIN
10µF
16V
×2
R1
0.03Ω
1
2
C1, C2: SANYO POSCAP 6TPA47M
CIN: TAIYO YUDEN CERAMIC
EMK325BJ106MNT (× 2)
D1: 15MQ040N
D2: MBRM120
L1: BH-ELECTRONICS BH511-1012
L2: COILTRONICS UP2B-4R7
M1, M2: Si3443DV
R1, R2: DALE 0.25W
VOUT1
3.3V
1A
249k
L1
+
•
C1
47µF
×2
3
M1
4
•
10k
D1
L1A
13
220pF 14
15
16
80.6k
LTC1874
8
VIN1
PVIN2
7
SENSE1– PGATE2
6
GND1
PGND2
5
VFB1
ITH/RUN2
12
ITH/RUN1
VFB2
11
GND2
PGND1
10
PGATE1 SENSE2 –
9
VIN2
PVIN1
R2
0.082Ω
M2
L2
4.7µH
+
10k
D2
220pF
VOUT2
1.8V
1A
C2
47µF
6V
100k
80.6k
1874 TA02
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
GN Package
16-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
0.189 – 0.196*
(4.801 – 4.978)
0.015 ± 0.004
× 45°
(0.38 ± 0.10)
0.007 – 0.0098
(0.178 – 0.249)
0.053 – 0.068
(1.351 – 1.727)
0.004 – 0.0098
(0.102 – 0.249)
0.009
(0.229)
REF
16 15 14 13 12 11 10 9
0° – 8° TYP
0.016 – 0.050
(0.406 – 1.270)
0.008 – 0.012
(0.203 – 0.305)
0.0250
(0.635)
BSC
0.229 – 0.244
(5.817 – 6.198)
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.150 – 0.157**
(3.810 – 3.988)
GN16 (SSOP) 1098
1
2 3
4
5 6
7
8
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No RSENSE is a trademark of Linear Technology Corporation.
12
Linear Technology Corporation
1874f LT/TP 0201 4K • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com
 LINEAR TECHNOLOGY CORPORATION 2000