NCN5150 Wired M-BUS Slave Transceiver Description The NCN5150 is a single-chip integrated slave transceiver for use in two-wire Meter Bus (M-BUS) slave devices and repeaters. The transceiver provides all of the functions needed to satisfy the European Standards EN 13757−2 and EN 1434−3 describing the physical layer requirements for M-BUS. It includes a programmable power level of up to 2 (SOIC version) or 6 (NQFP version) unit loads, which are available for use in external circuits through a 3.3 V LDO regulator. The NCN5150 can provide communication up to the maximum M-BUS communication speed of 38,400 baud (half-duplex). Features • Single-chip MBUS Transceiver • UART Communication Speeds Up to 38,400 baud • Integrated 3.3 V VDD LDO Regulator with Extended Peak Current • • • • • • • • • • • Capability of 15 mA Supports Powering Slave Device from the Bus or from External Power Supply Adjustable I/O Levels Adjustable Constant Current Sink up to 2 or 6 Unit Loads Depending on the Package Low Bus Voltage Operation Extended Current Budget for External Circuits: at least 0.88 mA Polarity Independent Power-Fail Function Fast Startup − No External Transistor Required on STC Pin Industrial Ambient Temperature Range of −40°C to +85°C Available in: ♦ 16-pin SOIC (Pin-to-Pin Compatible with TSS721A) ♦ 20-pin QFN These are Pb-free Devices http://onsemi.com NQFP−20 MN SUFFIX CASE 485E SOIC−16 D SUFFIX CASE 751B MARKING DIAGRAMS 20 1 NCN 5150 ALYW G NQFP−20 16 NCN5150 ALYYWWG 1 SOIC−16 A L Y, YY W, WW G or G = Assembly Location = Wafer Lot (optional) = Year = Work Week = Pb-free Package ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet. Typical Applications • Multi-energy Utility Meters ♦ ♦ ♦ ♦ Water Gas Electricity Heating systems Related Standards − European Standard EN 13757−2, EN 1434−3 For more information visit www.m-bus.com © Semiconductor Components Industries, LLC, 2013 September, 2013 − Rev. 2 1 Publication Order Number: NCN5150/D VDD 19 BUSL2 RX 20 RXI RIS NCN5150 18 17 16 VB GND 1 15 BUSL1 2 14 VS BUSL2 3 VB 4 12 TX 5 11 NCN5150 1 16 BUSL1 2 15 GND STC 3 14 RIS RIDD 4 13 RXI PFb 5 12 RX SC 6 11 VDD TXI 7 10 VS TX 8 9 VIO 13 VIO 6 7 8 9 STC RIDD PFb SC QFN20 TXI 10 NCN5150 SOIC16 Figure 1. Pin Out NCN5150 in 20-pin NQFP and 16 Pin SOIC (Top View) Table 1. NCN5150 PINOUT Pin Number Signal Name Type NCN5150 SOIC NCN5150 QFN BUSL1 Bus 16 2 BUSL2 Bus 1 3 Pin Description MBUS line. Connect to bus through 220 W series resistors. Connections are polarity independent VB Power 2 4 Rectified bus voltage STC Output 3 6 Storage capacitor pin. Connect to bulk storage capacitor (minimum 10 mF, maximum 330 mF−2,700 mF − see Table 9) RIDD Input 4 7 Mark current adjustment pin. Connect to programming resistor PFb Output 5 8 Power Fail, active low SC Output 6 9 Mark bus voltage level storage capacitor pin. Connect to ceramic capacitor (typically 220 nF) TXI Output 7 11 UART Data output (inverted) TX Output 8 12 UART Data output VIO Input 9 13 I/O pins (RX, RXI, TX, TXI, PFb) high level voltage VS Output 10 14 Gate driver for PMOS switch between bus powered operation and external power supply VDD Power 11 16 Voltage regulator output. Connect to minimum 1 mF decoupling capacitor RX Input 12 17 UART Data input RXI Input 13 18 UART Data input (inverted) RIS Input 14 20 Modulation current adjustment pin GND Ground 15 1 Ground NC NC − 5, 10, 15, 19 EP Ground − EP Not connected pins. Tie to GND Exposed Pad. Tie to GND http://onsemi.com 2 NCN5150 PFb VIO VIO Buffer Power Fail Detect VIO_BUF VB_INT BUSL1 VB CS1 BUSL2 RIDD VIO_BUF STC VS VS Driver TX Receiver STC Voltage Monitor SC TXI ECHO RXI VDD 3.3 V LDO STC Clamp Transmitter RX CS_TX Thermal Shutdown POR RIS NCN5150 GND Figure 2. NCN5150 Block Diagram Table 2. ABSOLUTE MAXIMUM RATINGS (Note 1) Symbol Parameter Min Max Unit TJ Junction Temperature −40 +150 °C TS Storage Temperature −55 +150 °C VBUS VTX, VTXI VRX, VRXI, VIO Bus Voltage (|BUSL1 − BUSL2|) −50 50 V Voltage on Pin TX, TXI −0.3 7.5 V Voltage on Pin RX, RXI, VIO −0.3 5.5 V ESDHBM ESD Rating − Human Body Model 4.0 − kV ESDMM ESD Rating − Machine Model 250 − V ESDCDM ESD Rating − Charged Device Model 750 − V Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. All voltages are referenced to GND. http://onsemi.com 3 NCN5150 Table 3. THERMAL CHARACTERISTICS Rating Symbol Typical Value Unit Thermal Characteristics, SOIC−16 − Thermal Resistance, Junction-to-Air RθJA 125 °C/W Thermal Characteristics, QFN−20 − Thermal Resistance, Junction-to-Air RθJA 42 °C/W NOTE: Rq,JA obtained with 1S0P (SOIC) or 2S2P (QFN) test boards according to JEDEC JESD51 standard. Table 4. RECOMMENDED OPERATING CONDITIONS (Notes 2 and 3) Symbol TA VBUS VIO Parameter Ambient Temperature Bus Voltage (|VBUSL1 − VBUS2|) Min Max Unit −40 +85 °C 1−2 Unit Loads 9.2 42 V 3−6 Unit Loads 9.7 42 V 2.5 3.8 V VIO Pin Voltage (Note 4) 2. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area. 3. All voltages are referenced to GND. 4. VSTC must be at least 1V higher than VIO for proper operation. Table 5. ELECTRICAL CHARACTERISTICS (Note 5) Symbol Voltage drop over bus rectifier (VBUS − VB) (RIDD (Note 6) = 4.02 kW) DVCS Voltage drop over CS1 (VB − VSTC) IBUS DIBUS ISTC DISTC, space Total Current Drawn from the Bus, Mark State − RIDD (Note 6) = 30 kW − 1.32 1.50 RIDD (Note 6) = 13 kW − 2.71 3.00 RIDD (Note 6) = 8.45 kW − 4.10 4.50 RIDD (Note 6) = 6.19 kW − 5.50 6.00 RIDD (Note 6) = 4.87 kW − 6.80 7.50 RIDD (Note 6) = 4.02 kW − 8.22 9.00 − 0.2 2 % RIDD (Note 6) = 30 kW 0.88 1.05 1.20 mA RIDD (Note 6) = 13 kW 2.10 2.35 2.60 3.10 3.60 4.00 RIDD (Note 6) = 6.19 kW 4.20 4.80 5.40 RIDD (Note 6) = 4.87 kW 5.30 6.10 6.90 RIDD (Note 6) = 4.02 kW 6.50 7.45 8.40 − 200 − mA Threshold Voltage on VB to Trigger PFb (Note 7) VRIDD Voltage on RIDD Pin VVS, OH Voltage on VS during High State (VSTC > VSTC, VDD ON, IVS = −5 mA) RVS, PD Pull-down Resistor on VS during Low State (VDD > 2 V, VSTC > VS) mA RIDD (Note 6) = 8.45 kW Clamp Voltage on Pin STC (IDD < ISTC) PFb Voltage Low (Note 8) (IPFb = 50 mA) V − − Current Drawn by the VIO Pin PFb Voltage High (IPFb = −100 mA) V − Internal Supply Current (RIDD (Note 6) = 13 kW, RX/RXI = mark) VPFb, OL Unit 1.25 1.70 Additional Current Available for the Application when Transmitting a Space VPFb, OH Max − 1.30 IIO VB, PFb Typ − RIDD (Note 6) ≥ 13 kW Bus Current Stability (over DVBUS = 10 V, RX/RXI = mark) Idle Current Available for the Application to Draw from STC and VDD (Including Current Drawn from IO Pins) Min RIDD (Note 6) ≤ 4.02 kW ICC VSTC, clamp 5. 6. 7. 8. Parameter DVBR All voltages are referenced to GND. Resistor with 1% accuracy. PFb comparator has a 70 mV hysteresis. PFb pin is pulled down with an on-chip resistor of typically 2 MW. http://onsemi.com 4 − 359 500 mA −0.5 − 0.5 mA 6.0 6.5 7.0 V VSTC + 0.3 − VSTC + 0.8 V VIO − 0.6 − VIO V 0 − 0.6 V 1.15 1.20 1.25 V VSTC − 0.4 − VSTC V 50 100 150 kW NCN5150 Table 6. VDD REGULATOR ELECTRICAL CHARACTERISTICS (Note 9) Parameter Symbol Min Typ Max Unit VDD Voltage on VDD (Note 10 ) (IDD < 15 mA) 3.1 3.3 3.6 V IDD Peak Current that can be Supplied by VDD (Note 11) 15 − − mA IDD, OFF VBUS = 0 V, VSTC = 0 V −0.5 − 0.5 mA VPOR, ON Power-on Reset Threshold, Release 2.65 2.85 3.15 V VPOR, OFF Power-on Reset Threshold, Reset 2.55 2.75 3.00 V VSTC, VDD ON Threshold Voltage on Pin STC to Turn On VDD Regulator, Pull the VS Pin High and Enable the PF Function 5.6 6.0 6.4 V VSTC, VDD OFF Threshold Voltage on Pin STC to Turn Off VDD Regulator and Pull the PFb and VS Pins Low 3.7 4.0 4.3 V 9. All voltages are referenced to GND. 10. Including output resistance of VDD. 11. Average current draw limited by ISTC. Table 7. RECEIVER ELECTRICAL CHARACTERISTICS (Note 12) Parameter Min Typ Max Unit VSC − 8.2 − VSC − 5.7 V − − VB V Mark Level Storage Capacitor Charge Current −40 −25 −15 mA Mark Level Storage Capacitor Discharge Current 0.3 0.6 −0.033 × ISC, charge mA Charge/Discharge Current Ratio 30 40 − VIO − 0.6 − VIO V (ITX/ITXI = 100 mA) 0 − 0.35 V (ITX = 1.1 mA) 0 − 1.5 V 0 − 16 mA Symbol VT VSC ISC, charge ISC, discharge CDR Receiver Threshold Voltage Mark Level Storage Capacitor Voltage VTX, OH, VTXI, OH TX/TXI High-level Voltage (ITX/ITXI = −100 mA) (Note 13) VTX, OL, VTXI, OL TX/TXI Low-level Voltage ITX, ITXI VTX = 7.5 V, VSTC = 6 V 12. All voltages are referenced to GND. 13. VSTC must be at least 1 V higher than VIO for proper operation. Table 8. TRANSMITTER ELECTRICAL CHARACTERISTICS (Note 14) Symbol Parameter IMC Space Level Modulating Current (RRIS = 100 W (Note 15)) Min Typ Max Unit 12.5 15.0 18.0 mA VRIS Voltage on RIS Pin 1.2 1.4 1.6 V VRX, IH, VRXI, IH RX/RXI Input High VIO − 0.8 − 5.5 V VRX, IL, VRXI, IL RX/RXI Input Low 0 − 0.8 V Current Drawn or Sourced from RX/RXI Pins (Note 16) (VIO = 3 V) ±6 − ±30 mA IRX, IRXI 14. All voltages are referenced to GND. 15. Resistor with 1% accuracy. 16. Including internal pull-up resistor on RX and internal pull-down resistor on RXI. http://onsemi.com 5 NCN5150 APPLICATION SCHEMATICS VS VIO VDD CVDD U1 NCN5150 TXI VB TX TVS1 BUSL1 RX mC RBUS1 BUSL2 MBUS RBUS2 RXI PFb RIS SC RIS GND RIDD CSC STC RIDD CSTC Figure 3. General Application Schematic VS VIO VDD CVDD U1 NCN5150 TXI VB TX mC RBUS1 BUSL2 TVS1 BUSL1 RX RBUS2 RXI PFb RIS SC RIS GND CSC RIDD RIDD STC CSTC Figure 4. Application Schematic with External Power Supply (Battery) http://onsemi.com 6 MBUS NCN5150 APPLICATION SCHEMATICS Q1 VS VIO VDD RBUS1 CVDD BUSL2 U1 NCN5150 TXI TX BUSL1 RX mC MBUS TVS1 VB RBUS2 RXI PFb RIS SC RIS GND RIDD CSC STC RIDD CSTC Figure 5. Application Schematic with Backup External Power Supply VS VSTC VIO 2.2 kW 15 kW 15 kW U3 VDD CVDD BUSL2 U1 TXI TX NCN5150 VB RBUS1 MBUS TVS1 BUSL1 RX RBUS2 RXI PFb mC 620 W U2 RIS SC GND RIDD STC V STC RIS CSC RIDD Figure 6. Optically Isolated Application Schematic http://onsemi.com 7 CSTC NCN5150 Table 9. TYPICAL BILL OF MATERIALS Reference Designator Value (Typical) Tolerance Manufacturer Part Number U1 − − ON Semiconductor NCN5150 TVS1 40 V − ON Semiconductor 1SMA40CAT3G CVDD > 1 mF −20%, +80% RIS 100 W 1% CSC 220 nF −20%, +80% RBUS1, RBUS2 220 W 10% 30 kW 1% 2 UL 13 kW 1% 3 UL 8.45 kW 1% 4 UL 6.19 kW 1% 5 UL 4.87 kW 1% 6 UL 4.02 kW 1% 1 UL ≤ 330 mF 10% 2 UL ≤ 820 mF 10% 3 UL ≤ 1,200 mF 10% 4 UL ≤ 1,500 mF 10% 5 UL ≤ 2,200 mF 10% 6 UL ≤ 2,700 mF 10% RIDD CSTC 1 UL APPLICATION INFORMATION Communication speeds allowed by the M-BUS standard are 300, 600, 2400, 4800, 9600, 19200 and 38400 baud, all of which are supported by the NCN5150. The NCN5150 is a slave transceiver for use in the meter bus (M-BUS) protocol. The bus connection is fully polarity independent. The transceiver will translate the bus voltage modulation from master-to-slave communication to TTL UART communication, and in the other direction translate UART voltage levels to bus current modulation. The transceiver also integrates a voltage regulator for utilizing the current drawn in this way from the bus, and an early power fail warning. The transceiver also supports an external power supply and the I/O high level can be set to match the slave sensor circuit. A complete block diagram is shown in Figure 2. Each section will be explained in more detail below. The bus should be connected to the pins BUSL1 and BUSL2 through series resistors to limit the current drawn from the bus in case of failure (according to the M-BUS standard). Typically, two 220 W resistors are used for this purpose. Since the M-BUS connection is polarity independent, the NCN5150 will first rectify the bus voltage through an active diode bridge. Meter Bus Protocol Slave Power Supply (Bus Powered) Bus Connection and Rectification A slave device can be powered by the M-BUS or from an external supply. The M-BUS standard requires the slave to draw a fixed current from the bus. This is accomplished by the constant current source CS1. This current is used to charge the external storage capacitor CSTC. The current drawn from the bus is defined by the programming resistor RIDD. The bus current can be chosen in increments of 1.5 mA called unit loads. Table 5 list the different values of programming resistors needed for different unit loads, as well as the current drawn from the bus (IBUS) and the current that can be drawn from the STC pin (ISTC). ISTC is slightly less than IBUS to account for the internal power consumption of the NCN5150. The RIDD resistor used must be at least 1% M-BUS is a European standard for communication and powering of utility meters and other sensors. Communication from master to slave is achieved by voltage-level signaling. The master will apply a nominal +36 V to the bus in idle state, or when transmitting a logical 1 (“mark”). When transmitting a logical 0 (“space”), the master will drop the bus voltage to a nominal +24 V. Communication from the slave to the master is achieved by current modulation. In idle mode or when transmitting a logical 1 (“mark”), the slave will draw a fixed current from the bus. When transmitting a logical 0 (“space”), the slave will draw an extra nominal 15 mA from the bus. M-BUS uses a half-duplex 11-bit UART frame format, with 1 start bit, 8 data bits, 1 even parity bit, and a stop bit. http://onsemi.com 8 NCN5150 accurate. Note that using 5 and 6 Unit Loads is not covered by the M-BUS standard. When the voltage on the STC pin reaches VSTC, VDD ON the LDO is turned on, and will regulate the voltage on the VDD pin to 3.3 V, drawing current from the storage capacitor. A decoupling capacitor of minimum 1 mF is required on the VDD pin for stability of the regulator. On the STC pin, a minimum capacitance of 10 mF is required. Furthermore, the ratio CSTC/CVDD must be larger than 9. The voltage on the STC pin is clamped to VSTC, clamp by a shunt regulator, which will dissipate any excess current that is not used by the NCN5150 or external circuits. VBUS VMARK = [21 V, 42 V] VT = VMARK − 6 V VSPACE = VMARK − 12 V t VTX VIO t VTXI VIO t Slave Power Supply (External) Figure 7. Communication, Master to Slave In case the external sensor circuit consumes more than the allowed bus current or the sensor should be kept operational when the bus is not present, an external power supply, such as a battery, is required. When the external circuitry uses different logical voltage levels, simply connect the power supply of that voltage level to VIO, so that the RX, RXI, TX, TXI and PFb pins will respond to the correct voltage levels. The NCN5150 will still be powered from the bus, but all communication will be translated to the voltage level of VIO. If the external power supply should be used only as a backup when the bus power supply fails, a PMOS transistor can be inserted between the external power supply and VDD as shown in Figure 5. The gate is connected to VS, and will be driven high when the voltage on STC goes above the turn-on threshold of the LDO, nl. VSTC, VDD ON. For more information see the paragraph on the power on sequence and corresponding Figure 12 on page 10. VB ICHARGE SC + IDISCHARGE − TX Echo Encoding TXI Figure 8. Communication, Master to Slave Communication, Slave to Master Communication, Master to Slave M-BUS communication from slave to master uses bus current modulation while the voltage remains constant. This current modulation can be controlled from either the RX or RXI pin as shown in Figure 10. When transmitting a space (“0”), the current modulator will draw an additional current from the bus. This current can be set with a programming resistor RRIS. To achieve the space current required the M-BUS standard, RRIS should be 100 W. A simplified schematic of the transmitter is shown in Figure 11. M-BUS communication from master to slave is based on voltage level signaling. To differentiate between master signaling and voltage drop caused by the signaling of another slave over cabling resistance, etc., the mark level VBUS, MARK is stored, and only when the bus voltage drops to less than VT will the NCN5150 detect communication. A simplified schematic of the receiver is shown in Figure 8. The received data is transmitted on the pins TX and TXI, as shown in the waveforms of Figure 7. An external capacitor must be connected to the SC pin to store the mark voltage level. This capacitor is charged to VB. Discharging of this capacitor is typically 40x slower, so that the voltage on SC drops only a little during the time the master is transmitting a space. The value of CSC must be chosen it the range of 100 nF−330 nF. Figure 9. Typical Relationship between RIS and Current Modulation Level http://onsemi.com 9 NCN5150 Because the M-BUS protocol is specified as half-duplex, an echo function will cause the transmitted signal on RX or RXI to appear on the receiver outputs TX and TXI. Should the master attempt to send at the same time, the bitwise added signal of both sources will appear on these pins, resulting in invalid data. VRX shut down gracefully. The times ton and toff can be approximated by the following formulas: t on + t off + VIO VIO t IBUS I CC ) I DD I STC V STC, VDD ON ǒVSTC, Clamp * VSTC, VDD OFFǓ (eq. 1) (eq. 2) Where ICC is the internal current consumption of the NCN5150 and IDD is the current consumed by external circuits drawn from either VDD or STC. These formulas can be used to dimension the value of the bulk CSTC needed, taking into account that the M-BUS standard requires ton to be less than 3 s. For certain applications where the power drawn from the bus is not used in external circuits, the storage capacitor value can be much lower. The NCN5150 requires a minimum STC capacitance of 10 mF to ensure that the bus current regulation is stable under all conditions. t VRXI C STC C STC ISPACE = IMARK + 15 mA IMARK = N unit loads t VBUS Figure 10. Communication, Slave to Master VB = VSTC + 0.6 VB = VB, MIN VIO_BUF t VSTC Echo VSTC, CLAMP VSTC, VDD ON VSTC, VDD OFF RX Decoding VB ton t RXI VVS Enable + − VSTC, CLAMP t VDD 3.3 V RIS t VPFb VIO toff Figure 11. Communication, Slave to Master t Figure 12. Power-on and Power-off Power On/Off Sequence The power-on and power-off sequence of the NCN5150 is shown in Figure 12. Shown also in Figure 12 is the operation of the PFb pin. This pin is used to give an early warning to the microcontroller that the bus power is collapsing, allowing the microcontroller to save its data and Thermal Shutdown The NCN5150 includes a thermal shutdown function that will disable the transmitter when the junction temperature of the IC becomes too hot. The thermal protection is only active when the slave is transmitting a space to the master. Table 10. ORDERING INFORMATION Device NCN5150DG NCN5150DR2G NCN5150MNTWG Package Shipping† SOIC16 (Pb-free) 48 Units / Tube NQFP20, 4x4 (Pb-free) 3,000 / Tape & Reel 2,500 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 10 NCN5150 PACKAGE DIMENSIONS QFN20, 4x4, 0.5P CASE 485E ISSUE B A B D PIN ONE REFERENCE 2X 0.15 C ÉÉÉ ÉÉÉ ÉÉÉ ÇÇ ÇÇ ÉÉ EXPOSED Cu E NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 MM FROM THE TERMINAL TIP. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. ÉÉ ÉÉ ÇÇ A3 MOLD CMPD A1 DETAIL B OPTIONAL CONSTRUCTIONS 2X 0.15 C L L TOP VIEW (A3) DETAIL B L1 A 0.10 C DETAIL A OPTIONAL CONSTRUCTIONS 0.08 C A1 SIDE VIEW C DIM A A1 A3 b D D2 E E2 e K L L1 MILLIMETERS MIN MAX 0.80 1.00 --0.05 0.20 REF 0.20 0.30 4.00 BSC 2.60 2.90 4.00 BSC 2.60 2.90 0.50 BSC 0.20 REF 0.35 0.45 0.00 0.15 SEATING PLANE SOLDERING FOOTPRINT* 0.10 C A B D2 DETAIL A 20X 4.30 6 20X 0.58 L 2.88 0.10 C A B 11 E2 1 1 K 20 e 20X 2.88 4.30 b 0.10 C A B 0.05 C NOTE 3 PKG OUTLINE BOTTOM VIEW 20X 0.35 0.50 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb-free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 11 NCN5150 PACKAGE DIMENSIONS SOIC−16 CASE 751B−05 ISSUE K −A− 16 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 9 −B− 1 P 8 PL 0.25 (0.010) 8 B M S DIM A B C D F G J K M P R G R K F X 45 _ C −T− SEATING PLANE J M D MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019 16 PL 0.25 (0.010) M T B S A S SOLDERING FOOTPRINT* 8X 6.40 16X 1.12 1 16 16X 0.58 1.27 PITCH 8 9 DIMENSIONS: MILLIMETERS *For additional information on our Pb-free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). 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SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 http://onsemi.com 12 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NCN5150/D