Order Now Product Folder Support & Community Tools & Software Technical Documents DS250DF210 SNLS560 – FEBRUARY 2017 DS250DF210 25-Gbps Multi-Rate 2-Channel Retimer 1 Features 2 Applications • • • • • 1 • • • • • • • • • • • Dual-Channel Multi-Rate Retimer With Integrated Signal Conditioning All Channels Lock Independently From 20.6 to 25.8 Gbps (Including Sub-Rates Such as 10.3125 Gbps, 12.5 Gbps, and More) Ultra-Low Latency: <500 ps Typical for 25.78125Gbps Data Rate Single Power Supply, No Low-Jitter Reference Clock Required, and Minimal Supply Decoupling to Reduce Board Routing Complexity and BOM Cost Adaptive Continuous Time Linear Equalizer (CTLE) Adaptive Decision Feedback Equalizer (DFE) Integrated 2 x 2 Cross Point Low-Jitter Transmitter With 3-Tap FIR Filter Combined Equalization Supporting 35+ dB Channel Loss at 12.9 GHz Adjustable Transmit Amplitude: 205 mVppd to 1225 mVppd (Typical) On-Chip Eye Opening Monitor (EOM), PRBS Pattern Checker and Generator Small 6-mm × 6-mm BGA Package With Easy Flow-Through Routing • Jitter Cleaning for Front-Port Optical Active Cable Assemblies Backplane and Mid-Plane Reach Extension IEEE802.3bj 100GbE, Infiniband EDR, and OIFCEI-25G-LR/MR/SR/VSR Electrical Interfaces SFP28, QSFP28, CFP2/CFP4, CDFP 3 Description The DS250DF210 device is a two-channel, multi-rate retimer with integrated signal conditioning. It is used to extend the reach and robustness of long, lossy, crosstalk-impaired, high-speed serial links while achieving a bit error rate (BER) of 10-15 or less. Each channel of the DS250DF210 independently locks to serial data rates in a continuous range from 20.6 Gbps to 25.8 Gbps or to any supported sub-rate (÷2 and ÷4), including key data rates such as 10.3125 Gbps and 12.5 Gbps, which allows the DS250DF210 to support individual lane Forward Error Correction (FEC) pass-through. Device Information(1) PART NUMBER DS250DF210 PACKAGE ABM (101) BODY SIZE (NOM) 6.00 mm × 6.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Simplified Schematic RX0P RX0N RX CDR TX TX0P TX0N RX1P RX1N RX CDR TX TX1P TX1N 2.5V or 3.3V VDD SMBus Slave mode 1 NŸ EN_SMB INT_N NC_TEST SDA(1) SDC(1) To other open-drain interrupt pins To system SMBus Address straps (pull-up, pulldown, or float) ADDR0 ADDR1 25 MHz SMBus Slave mode 2.5V 1 F (2x) 0.1 F (4x) CAL_CLK_IN CAL_CLK_OUT READ_EN_N ALL_DONE_N VDD GND 7R QH[W GHYLFH¶V CAL_CLK_IN Float for SMBus Slave mode, or connect to next GHYLFH¶V 5($'_EN_N for SMBus Master mode (1) SMBus signals need to be pulled up elsewhere in the system. 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. DS250DF210 SNLS560 – FEBRUARY 2017 www.ti.com Table of Contents 1 2 3 4 5 6 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Description (continued)......................................... Device and Documentation Support.................... 6.2 6.3 6.4 6.5 6.6 1 1 1 2 3 4 7 6.1 Documentation Support ........................................... 4 Receiving Notification of Documentation Updates.... Community Resources.............................................. Trademarks ............................................................... Electrostatic Discharge Caution ................................ Glossary .................................................................... 4 4 4 4 4 Mechanical, Packaging, and Orderable Information ............................................................. 4 4 Revision History 2 DATE REVISION NOTES February 2017 * Initial release. Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: DS250DF210 DS250DF210 www.ti.com SNLS560 – FEBRUARY 2017 5 Description (continued) The DS250DF210 has a single power supply and minimal need for external components. These features reduce PCB-routing complexity and BOM cost. The advanced equalization features of the DS250DF210 include a low-jitter 3-tap transmit finite impulse response (FIR) filter, an adaptive continuous-time linear equalizer (CTLE), and an adaptive decision feedback equalizer (DFE). This enables reach extension for lossy interconnect and backplanes with multiple connectors and crosstalk. The integrated CDR function is ideal for front-port optical module applications to reset the jitter budget and retime the high-speed serial data. The DS250DF210 implements a 2x2 cross-point, providing the host with lane crossing, fanout, and multiplexing options The DS250DF210 can be configured either through the SMBus or through an external EEPROM. Up to 16 devices can share a single EEPROM using Common Channel format. A non-disruptive, on-chip eye monitor and a PRBS generator or checker allow for in-system diagnostics. Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: DS250DF210 3 DS250DF210 SNLS560 – FEBRUARY 2017 www.ti.com 6 Device and Documentation Support 6.1 Documentation Support 6.1.1 Related Documentation For related documentation see the following: DS250DF210 Programming Guide, SNLU202. 6.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 6.3 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 6.4 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 6.5 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 6.6 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 7 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 4 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: DS250DF210 PACKAGE OPTION ADDENDUM www.ti.com 10-Feb-2017 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) DS250DF210ABMR ACTIVE FC/CSP ABM 101 1000 Green (RoHS & no Sb/Br) SNAGCU Level-3-260C-168 HR -40 to 85 DS250DF2 DS250DF210ABMT ACTIVE FC/CSP ABM 101 250 Green (RoHS & no Sb/Br) SNAGCU Level-3-260C-168 HR -40 to 85 DS250DF2 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 10-Feb-2017 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 10-Feb-2017 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) DS250DF210ABMR FC/CSP ABM 101 1000 330.0 16.4 DS250DF210ABMT FC/CSP ABM 101 250 178.0 16.4 Pack Materials-Page 1 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 6.3 6.3 1.5 12.0 16.0 Q1 6.3 6.3 1.5 12.0 16.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 10-Feb-2017 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DS250DF210ABMR FC/CSP ABM 101 1000 367.0 367.0 38.0 DS250DF210ABMT FC/CSP ABM 101 250 210.0 185.0 35.0 Pack Materials-Page 2 PACKAGE OUTLINE ABM0101A FCBGA - 1.03 mm max height SCALE 2.300 PLASTIC BALL GRID ARRAY 6.1 5.9 A B BALL A1 CORNER 6.1 5.9 1.03 MAX C SEATING PLANE BALL TYP 0.26 TYP 0.15 0.08 C 5 TYP (0.5) TYP SYMM L (0.5) TYP K J H 5 TYP G SYMM F E D 101X C B 0.5 TYP BALL A1 CORNER 0.35 0.25 0.15 0.05 C A C B A 1 2 3 4 5 6 7 8 9 10 11 0.5 TYP 4222100/B 09/2015 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. www.ti.com EXAMPLE BOARD LAYOUT ABM0101A FCBGA - 1.03 mm max height PLASTIC BALL GRID ARRAY (0.5) TYP 101X ( 0.28) 1 2 3 4 5 6 7 8 9 10 11 A B (0.5) TYP C D E SYMM F G H J K L SYMM LAND PATTERN EXAMPLE SCALE:15X 0.05 MAX 0.05 MIN ( 0.28) METAL SOLDER MASK OPENING NON-SOLDER MASK DEFINED (PREFERRED) METAL UNDER SOLDER MASK ( 0.28) SOLDER MASK OPENING SOLDER MASK DEFINED SOLDER MASK DETAILS NOT TO SCALE 4222100/B 09/2015 NOTES: (continued) 3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints. For information, see Texas Instruments literature number SPRAA99 (www.ti.com/lit/spraa99). www.ti.com EXAMPLE STENCIL DESIGN ABM0101A FCBGA - 1.03 mm max height PLASTIC BALL GRID ARRAY (0.5) TYP 1 (0.5) TYP 2 3 4 5 6 7 8 9 10 11 A B C D E SYMM F G H J K L SYMM SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL SCALE:15X 101X ( 0.25) PCB PAD (R0.05) TYP STENCIL DETAIL SCALE 60.000 NTS 4222100/B 09/2015 NOTES: (continued) 4. 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