GS74108TP/J SOJ, TSOP Commercial Temp Industrial Temp 512K x 8 4Mb Asynchronous SRAM Features 8, 10, 12, 15ns 3.3V VDD Center VDD & VSS SOJ 512K x 8 Pin Configuration • Fast access time: 8, 10, 12, 15ns • CMOS low power operation: 150/125/110/90 mA at min. cycle time. • Single 3.3V ± 0.3V power supply • All inputs and outputs are TTL compatible • Fully static operation • Industrial Temperature Option: -40° to 85°C • Package line up J: 400mil, 36 pin SOJ package TP: 400mil, 44 pin TSOP Type II package Description The GS74108 is a high speed CMOS static RAM organized as 524,288-words by 8-bits. Static design eliminates the need for external clocks or timing strobes. Operating on a single 3.3V power supply and all inputs and outputs are TTL compatible. The GS74108 is available in 400 mil SOJ and 400 mil TSOP Type-II packages. Pin Descriptions Symbol Description A0 to A18 Address input DQ1 to DQ8 Data input/output CE Chip enable input WE Write enable input OE Output enable input VDD +3.3V power supply VSS Ground NC No connect Rev: 1.06 7/2000 A4 1 36 NC A3 2 35 A5 A2 3 34 A6 A1 4 33 A7 A0 5 32 A8 CE 6 31 OE DQ1 7 30 DQ8 DQ2 8 29 DQ7 VDD 9 28 VSS 27 VDD 36 pin 400mil SOJ VSS 10 DQ3 11 26 DQ6 DQ4 12 25 DQ5 WE 13 24 A9 A17 14 23 A10 A16 15 22 A11 A15 16 21 A12 A14 17 20 A18 A13 18 19 NC 1/12 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. © 1999, Giga Semiconductor, Inc. GS74108TP/J TSOP-II 512K x 8 Pin Configuration A13 19 20 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 NC NC 21 22 24 23 NC NC A4 A3 A2 A1 A0 CE DQ1 DQ2 VDD VSS DQ3 DQ4 WE A17 A16 A15 A14 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 44 pin 400mil TSOP II NC NC NC A5 A6 A7 A8 OE DQ8 DQ7 VSS VDD DQ6 DQ5 A9 A10 A11 A12 A18 NC NC NC Block Diagram A0 Address Input Buffer Row Decoder Column Decoder A18 CE WE OE Memory Array I/O Buffer Control DQ1 Rev: 1.06 7/2000 DQ8 2/12 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. © 1999, Giga Semiconductor, Inc. GS74108TP/J Truth Table CE OE WE DQ1 to DQ8 VDD Current H X X Not Selected ISB1, ISB2 L L H Read L X L Write L H H High Z IDD Note: X: “H” or “L” Absolute Maximum Ratings Parameter Symbol Rating Unit Supply Voltage VDD -0.5 to +4.6 V Input Voltage VIN -0.5 to VDD+0.5 (≤ 4.6V max.) V Output Voltage VOUT -0.5 to VDD+0.5 (≤ 4.6V max.) V Allowable power dissipation PD 0.7 W Storage temperature TSTG -55 to 150 oC Note: Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Recommended Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device reliability. Rev: 1.06 7/2000 3/12 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. © 1999, Giga Semiconductor, Inc. GS74108TP/J Recommended Operating Conditions Parameter Symbol Min Typ Max Unit Supply Voltage for -10/12/15 VDD 3.0 3.3 3.6 V Supply Voltage for -8 VDD 3.135 3.3 3.6 V Input High Voltage VIH 2.0 - VDD+0.3 V Input Low Voltage VIL -0.3 - 0.8 V Ambient Temperature, Commercial Range TAc 0 - 70 o C Ambient Temperature, Industrial Range TAI -40 - 85 o C Note: 1. Input overshoot voltage should be less than VDD+2V and not exceed 20ns. 2. Input undershoot voltage should be greater than -2V and not exceed 20ns. Capacitance Parameter Symbol Test Condition Max Unit Input Capacitance CIN VIN=0V 5 pF Output Capacitance COUT VOUT=0V 7 pF Notes: 1. Tested at TA=25°C, f=1MHz 2. These parameters are sampled and are not 100% tested DC I/O Pin Characteristics Parameter Symbol Test Conditions Min Max Input Leakage Current IIL VIN = 0 to VDD -1uA 1uA Output Leakage Current ILO Output High Z VOUT = 0 to VDD -1uA 1uA Output High Voltage VOH IOH = - 4mA 2.4 Output Low Voltage VOL ILO = + 4mA Rev: 1.06 7/2000 0.4V 4/12 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. © 1999, Giga Semiconductor, Inc. GS74108TP/J Power Supply Currents Parameter Symbol Test Conditions 0 to 70°C -40 to 85°C 8ns 10ns 12ns 15ns 10ns 12ns 15ns IDD CE ≤ VIL All other inputs ≥ VIH or ≤ VIL Min. cycle time IOUT = 0 mA 150mA 125mA 110mA 90mA 135mA 120mA 100mA Standby Current ISB1 CE ≥ VIH All other inputs ≥ VIH or ≤VIL Min. cycle time 70mA 65mA 60mA 55mA 75mA 70mA 65mA Standby Current ISB2 CE ≥ VDD - 0.2V All other inputs ≥ VDD - 0.2V or ≤ 0.2V Operating Supply Current 30mA 40mA AC Test Conditions Output Load 1 Parameter Conditions Input high level VIH=2.4V Input low level VIL=0.4V Input rise time tr=1V/ns Input fall time tf=1V/ns Input reference level 1.4V Output Load 2 Output reference level 1.4V 3.3V Output load Fig. 1& 2 DQ 50Ω VT=1.4V 589Ω DQ Note: 1. Include scope and jig capacitance. 2. Test conditions as specified with output loading as shown in Fig. 1 unless otherwise noted 3. Output load 2 for tLZ, tHZ, tOLZ and tOHZ. Rev: 1.06 7/2000 30pF1 5/12 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. 5pF1 434Ω © 1999, Giga Semiconductor, Inc. GS74108TP/J AC Characteristics Read Cycle Parameter Symbol Read cycle time -8 -10 -12 -15 Unit Min Max Min Max Min Max Min Max tRC 8 --- 10 --- 12 --- 15 --- ns Address access time tAA --- 8 --- 10 --- 12 --- 15 ns Chip enable access time (CE) tAC --- 8 --- 10 --- 12 --- 15 ns Output enable to output valid (OE) tOE --- 3.5 --- 4 --- 5 --- 6 ns Output hold from address change tOH 3 --- 3 --- 3 --- 3 --- ns Chip enable to output in low Z (CE) tLZ* 3 --- 3 --- 3 --- 3 --- ns Output enable to output in low Z (OE) tOLZ* 0 --- 0 --- 0 --- 0 --- ns Chip disable to output in High Z (CE) tHZ* --- 4 --- 5 --- 6 --- 7 ns Output disable to output in High Z (OE) tOHZ* --- 3.5 --- 4 --- 5 --- 6 ns * These parameters are sampled and are not 100% tested Read Cycle 1: CE = OE = VIL, WE = VIH tRC Address tAA tOH Data Out Rev: 1.06 7/2000 Previous Data Data valid 6/12 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. © 1999, Giga Semiconductor, Inc. GS74108TP/J Read Cycle 2: WE = VIH tRC Address tAA CE tAC tHZ tLZ OE tOE Data Out tOHZ tOLZ DATA VALID High impedance Write Cycle Parameter Symbol Write cycle time -8 -10 -12 -15 Unit Min Max Min Max Min Max Min Max tWC 8 --- 10 --- 12 --- 15 --- ns Address valid to end of write tAW 5.5 --- 7 --- 8 --- 10 --- ns Chip enable to end of write tCW 5.5 --- 7 --- 8 --- 10 --- ns Data set up time tDW 4 --- 5 --- 6 --- 7 --- ns Data hold time tDH 0 --- 0 --- 0 --- 0 --- ns Write pulse width tWP 5.5 --- 7 --- 8 --- 10 --- ns Address set up time tAS 0 --- 0 --- 0 --- 0 --- ns Write recovery time (WE) tWR 0 --- 0 --- 0 --- 0 --- ns Write recovery time (CE) tWR1 0 --- 0 --- 0 --- 0 --- ns Output Low Z from end of write tWLZ* 3 --- 3 --- 3 --- 3 --- ns Write to output in High Z tWHZ* --- 3.5 --- 4 --- 5 --- 6 ns * These parameters are sampled and are not 100% tested Rev: 1.06 7/2000 7/12 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. © 1999, Giga Semiconductor, Inc. GS74108TP/J Write Cycle 1: WE control tWC Address tAW tWR OE tCW CE tAS tWP WE tDW Data In tDH DATA VALID tWHZ tWLZ Data Out HIGH IMPEDANCE Write Cycle 2: CE control tWC Address tAW tWR1 OE tAS tCW CE tWP WE tDW Data In DATA VALID Data Out Rev: 1.06 7/2000 tDH HIGH IMPEDANCE 8/12 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. © 1999, Giga Semiconductor, Inc. GS74108TP/J 36 Pin SOJ, 400 mil Dimension in inch L D e A A2 1 GE E HE c A A1 min nom max min nom max A - - 0.146 - - 3.70 A1 0.026 - - 0.66 - - A2 0.105 0.110 0.115 2.67 2.80 2.92 B 0.013 0.017 0.021 0.33 0.43 0.53 B1 0.024 0.028 0.032 0.61 0.71 0.81 c 0.006 0.008 0.012 0.15 0.20 0.30 D 0.920 0.924 0.929 23.37 23.47 23.60 E 0.395 0.400 0.405 10.04 10.16 10.28 e y B B1 Detail A Q Dimension in mm Symbol - 0.05 - - 1.27 - HE 0.430 0.435 0.440 10.93 11.05 11.17 GE 0.354 0.366 0.378 9.00 9.30 9.60 L 0.082 - - 2.08 - - y - - 0.004 - - 0.10 Q 0o - 10o 0o - 10o Note: 1. Dimension D& E do not include interlead flash 2. Dimension B1 does not include dambar protrusion / intrusion 3. Controlling dimension: inches Rev: 1.06 7/2000 9/12 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. © 1999, Giga Semiconductor, Inc. GS74108TP/J 44 Pin, 400 mil TSOP-II D c 22 e B L L1 A1 A y Detail A Rev: 1.06 7/2000 A - - 0.047 - - 1.20 A1 0.002 - - 0.05 - - A2 0.037 0.039 0.041 0.95 1.00 1.05 B 0.01 0.25 0.35 0.45 c - - 0.15 - Q 0.014 0.018 0.006 - D 0.721 0.725 0.729 18.31 18.41 18.51 E 0.396 0.400 0.404 10.06 10.16 10.26 e A2 1 A HE 23 E 44 Dimension in inch Dimension in mm Symbol min nom max min nom max - 0.031 - - 0.80 - HE 0.455 0.463 0.471 11.56 11.76 11.96 L 0.016 0.020 0.024 0.40 0.50 0.60 L1 - 0.031 - - 0.80 - y - - 0.004 - - 0.10 Q o - o o - 5o 0 5 0 Note: 1. Dimension D& E do not include interlead flash 2. Dimension B does not include dambar protrusion / intrusion 3. Controlling dimension: mm 10/12 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. © 1999, Giga Semiconductor, Inc. GS74108TP/J Ordering Information Part Number* Package Access Time Temp. Range GS74108TP-8 400 mil TSOP-II 8 ns Commercial GS74108TP-10 400 mil TSOP-II 10 ns Commercial GS74108TP-12 400 mil TSOP-II 12 ns Commercial GS74108TP-15 400 mil TSOP-II 15 ns Commercial GS74108TP-8I 400 mil TSOP-II 8 ns Industrial GS74108TP-10I 400 mil TSOP-II 10 ns Industrial GS74108TP-12I 400 mil TSOP-II 12 ns Industrial GS74108TP-15I 400 mil TSOP-II 15 ns Industrial GS74108J-8 400 mil SOJ 8 ns Commercial GS74108J-10 400 mil SOJ 10 ns Commercial GS74108J-12 400 mil SOJ 12 ns Commercial GS74108J-15 400 mil SOJ 15 ns Commercial GS74108J-8I 400 mil SOJ 8 ns Industrial GS74108J-10I 400 mil SOJ 10 ns Industrial GS74108J-12I 400 mil SOJ 12 ns Industrial GS74108J-15I 400 mil SOJ 15 ns Industrial * Customers requiring delivery in Tape and Reel should add the character “T” to the end of the part number. For example: Rev: 1.06 7/2000 11/12 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. Status GS74108TP-8T © 1999, Giga Semiconductor, Inc. GS74108TP/J Revision History Rev. Code: Old; New 741081.04d 5/1999/741081.05 1/ 2000 GS74108Rev1.05 10/19991/ 2000K;Rev 5 2/2000L Rev: 1.06 7/2000 Types of Changes Page #/Revisions/Reason Format or Content 1. Page 2/Pins 16 - 20 and 26 - 30 on 44 pin TSOP II Pin Configuration/ Correction. 1. 2. GSI Logo Content Format/Content 12/12 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. © 1999, Giga Semiconductor, Inc.