LM4835 www.ti.com SNAS019F – MARCH 1999 – REVISED MAY 2013 LM4835 Stereo 2W Audio Power Amplifiers with DC Volume Control and Selectable Gain Check for Samples: LM4835 FEATURES DESCRIPTION • • • • The LM4835 is a monolithic integrated circuit that provides DC volume control, and stereo bridged audio power amplifiers capable of producing 2W into 4Ω with less than 1.0% THD or 2.2W into 3Ω with less than 1.0% THD (see Notes below). 1 23 • • • PC98 Compliant DC Volume Control Interface System Beep Detect Stereo Switchable Bridged/Single-Ended Power Amplifiers Selectable Internal/External Gain and Bass Boost Configurable “Click and Pop” Suppression Circuitry Thermal Shutdown Protection Circuitry APPLICATIONS • • • Portable and Desktop Computers Multimedia Monitors Portable Radios, PDAs, and Portable TVs KEY SPECIFICATIONS • • • • • PO at 1% THD+N into 3Ω (LM4835LQ, LM4835MTE) 2.2 W (typ) PO at 1% THD+N into 4Ω (LM4835LQ, LM4835MTE) 2.0 W (typ) PO at 1% THD+N into 8Ω (LM4835) 1.1 W (typ) 1.0 % (typ) Single-Ended Mode - THD+N at 85mW into 32Ω Shutdown Current 0.7 µA (typ) Boomer™ audio integrated circuits were designed specifically to provide high quality audio while requiring a minimum amount of external components. The LM4835 incorporates a DC volume control, stereo bridged audio power amplifiers and a selectable gain or bass boost, making it optimally suited for multimedia monitors, portable radios, desktop, and portable computer applications. The LM4835 features an externally controlled, lowpower consumption shutdown mode, and both a power amplifier and headphone mute for maximum system flexibility and performance. NOTE: When properly mounted to the circuit board, the LM4835LQ and LM4835MTE will deliver 2W into 4Ω. The LM4835MT will deliver 1.1W into 8Ω. See the Application Information section LM4835LQ and for LM4835MTE usage information. NOTE: An LM4835LQ and LM4835MTE that have been properly mounted to the circuit board and forced-air cooled will deliver 2.2W into 3Ω. 1 2 3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Boomer is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1999–2013, Texas Instruments Incorporated LM4835 SNAS019F – MARCH 1999 – REVISED MAY 2013 www.ti.com CONNECTION DIAGRAMS Figure 1. 28-Pin WQFN - Top View See NJB0028A Package Figure 2. 28-Pin TSSOP - Top View See PW Package BLOCK DIAGRAM Figure 3. LM4835 Block Diagram 2 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM4835 LM4835 www.ti.com SNAS019F – MARCH 1999 – REVISED MAY 2013 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ABSOLUTE MAXIMUM RATINGS (1) (2) Supply Voltage 6.0V Storage Temperature -65°C to +150°C −0.3V to VDD +0.3V Input Voltage Power Dissipation (3) Internally limited ESD Susceptibility (4) 2000V ESD Susceptibility (5) 200V Junction Temperature 150°C Soldering Information Small Outline Package Vapor Phase (60 sec.) 215°C Infrared (15 sec.) 220°C θJC (typ)—LQA028AA θJA (typ)—LQA028AA 3.0°C/W (6) 42°C/W θJC (typ)—MTC28 20°C/W θJA (typ)—MTC28 80°C/W θJC (typ)—MXA28A 2°C/W θJA (typ)—MXA28A (7) 41°C/W θJA (typ)—MXA28A (8) 54°C/W θJA (typ)—MXA28A (9) 59°C/W θJA (typ)—MXA28A (10) 93°C/W (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. (2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications. (3) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θ JA, and the ambient temperature TA. The maximum allowable power dissipation is PDMAX = (TJMAX − TA )/θJA. For the LM4835LQ and LM4835MT, TJMAX = 150°C, and the typical junction-to-ambient thermal resistance, when board mounted, is 80°C/W for the MTC28 package and 42°C/W for the LM4835LQ package. (4) Human body model, 100pF discharged through a 1.5kΩ resistor. (5) Machine Model, 220pF–240pF discharged through all pins. (6) The given θJA is for an LM4835 packaged in an LQA24A with the exposed-DAP soldered to an exposed 2in 2 area of 1oz printed circuit board copper. (7) The θJA given is for an MXA28A package whose exposed-DAP is soldered to a 2in2 piece of 1 ounce printed circuit board copper on a bottom side layer through 21 8mil vias. (8) The θJA given is for an MXA28A package whose exposed-DAP is soldered to an exposed 2in 2 piece of 1 ounce printed circuit board copper. (9) The θJA given is for an MXA28A package whose exposed-DAP is soldered to an exposed 1in 2 piece of 1 ounce printed circuit board copper. (10) The θJA given is for an MXA28A package whose exposed-DAP is not soldered to any copper. OPERATING RATINGS Temperature Range TMIN ≤ TA ≤TMAX −40°C ≤TA ≤ 85°C 2.7V≤ VDD ≤ 5.5V Supply Voltage Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM4835 3 LM4835 SNAS019F – MARCH 1999 – REVISED MAY 2013 www.ti.com ELECTRICAL CHARACTERISTICS FOR ENTIRE IC (1) (2) The following specifications apply for VDD = 5V unless otherwise noted. Limits apply for TA = 25°C. Symbol VDD Parameter LM4835 Conditions Typical (3) Limit (4) Supply Voltage Units (Limits) 2.7 V (min) 5.5 V (max) 30 mA (max) 2.0 μA (max) IDD Quiescent Power Supply Current VIN = 0V, IO = 0A 15 ISD Shutdown Current Vpin 2 = VDD 0.7 VIH Headphone Sense High Input Voltage 4 V (min) VIL Headphone Sense Low Input Voltage 0.8 V (max) (1) (2) (3) (4) All voltages are measured with respect to the ground pins, unless otherwise specified. All specifications are tested using the typical application as shown in Figure 3. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. Typicals are measured at 25°C and represent the parametric norm. Datasheet min/max specification limits are ensured by design, test, or statistical analysis. ELECTRICAL CHARACTERISTICS FOR VOLUME ATTENUATORS (1) (2) The following specifications apply for VDD = 5V. Limits apply for TA = 25°C. Symbol CRANGE AM (1) (2) (3) (4) 4 Parameter Attenuator Range Mute Attenuation Conditions Gain with Vpin 7 = 5V LM4835 Typical (3) Limit (4) Units (Limits) 0 ±0.5 dB (max) Attenuation with Vpin 7 = 0V -81 -80 dB (min) Vpin 5 = 5V, Bridged Mode -88 -80 dB (min) Vpin 5 = 5V, Single-Ended Mode -88 -80 dB (min) All voltages are measured with respect to the ground pins, unless otherwise specified. All specifications are tested using the typical application as shown in Figure 3. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. Typicals are measured at 25°C and represent the parametric norm. Datasheet min/max specification limits are ensured by design, test, or statistical analysis. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM4835 LM4835 www.ti.com SNAS019F – MARCH 1999 – REVISED MAY 2013 ELECTRICAL CHARACTERISTICS FOR SINGLE-ENDED MODE OPERATION (1) (2) The following specifications apply for VDD = 5V. Limits apply for TA = 25°C. Symbol PO Parameter Output Power LM4835 Conditions Typical (3) Limit (4) Units (Limits) THD = 1.0%; f = 1kHz; RL = 32Ω 85 mW THD = 10%; f = 1 kHz; RL = 32Ω 95 mW 0.065 % THD+N Total Harmonic Distortion+Noise VOUT = 1VRMS, f=1kHz, RL = 10kΩ, AVD = 1 PSRR Power Supply Rejection Ratio CB = 1.0 μF, f =120 Hz, VRIPPLE = 200 mVrms 58 dB SNR Signal to Noise Ratio POUT =75 mW, R L = 32Ω, A-Wtd Filter 102 dB Xtalk Channel Separation f=1kHz, CB = 1.0 μF 65 dB (1) All voltages are measured with respect to the ground pins, unless otherwise specified. All specifications are tested using the typical application as shown in Figure 3. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. Typicals are measured at 25°C and represent the parametric norm. Datasheet min/max specification limits are ensured by design, test, or statistical analysis. (2) (3) (4) ELECTRICAL CHARACTERISTICS FOR BRIDGED MODE OPERATION (1) (2) The following specifications apply for VDD = 5V, unless otherwise noted. Limits apply for TA = 25°C. Symbol VOS Parameter Output Offset Voltage PO Output Power LM4835 Conditions VIN = 0V THD + N = 1.0%; f=1kHz; RL = 3Ω (5) (6) THD + N = 1.0%; f=1kHz; RL = 4Ω (7) (6) Typical (3) Limit (4) Units (Limits) 5 30 mV (max) 2.2 W 2 W THD = 0.5% (max);f = 1 kHz; RL = 8Ω 1.1 1.0 W (min) THD+N = 10%;f = 1 kHz; RL = 8Ω 1.5 W PO = 1W, 20 Hz< f < 20 kHz, RL = 8Ω, AVD = 2 0.3 % THD+N Total Harmonic Distortion+Noise PO = 340 mW, RL = 32Ω 1.0 % PSRR Power Supply Rejection Ratio CB = 1.0 µF, f = 120 Hz, VRIPPLE = 200 mVrms; RL = 8Ω 74 dB SNR Signal to Noise Ratio VDD = 5V, POUT = 1.1W, RL = 8Ω, A-Wtd Filter 93 dB Xtalk Channel Separation f=1kHz, CB = 1.0 μF 70 dB (1) (2) (3) (4) (5) (6) (7) All voltages are measured with respect to the ground pins, unless otherwise specified. All specifications are tested using the typical application as shown in Figure 3. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. Typicals are measured at 25°C and represent the parametric norm. Datasheet min/max specification limits are ensured by design, test, or statistical analysis. When driving 3Ω loads and operating on a 5V supply, the LM4835MTE must be mounted to the circuit board and forced-air cooled. When driving a 3Ω or 4Ω loads and operating on a 5V supply, the LM4835LQ must be mounted to the circuit board that has a minimum of 2.5in 2 of exposed, uninterrupted copper area connected to the WQFN package's exposed DAP. When driving 4Ω loads and operating on a 5V supply, the LM4835MTE must be mounted to the circuit board. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM4835 5 LM4835 SNAS019F – MARCH 1999 – REVISED MAY 2013 www.ti.com TYPICAL APPLICATION Figure 4. Typical Application Circuit TRUTH TABLE FOR LOGIC INPUTS (1) (1) 6 Mute Mode HP Sense DC Vol. Control Bridged Output Single-Ended Output 0 0 0 Fixed Level Vol. Fixed _ 0 0 1 Fixed Level Muted Vol. Fixed 0 1 0 Adjustable Vol. Changes _ 0 1 1 Adjustable Muted Vol. Changes 1 X X _ Muted Muted If system beep is detected on the Beep In pin (pin 11), the system beep will be passed through the bridged amplifier regardless of the logic of the Mute and HP sense pins. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM4835 LM4835 www.ti.com SNAS019F – MARCH 1999 – REVISED MAY 2013 TYPICAL PERFORMANCE CHARACTERISTICS MTE SPECIFIC CHARACTERISTICS LM4835MTE THD+N vs Output Power LM4835MTE THD+N vs Frequency Figure 5. Figure 6. LM4835MTE THD+N vs Output Power LM4835MTE THD+N vs Frequency Figure 7. Figure 8. LM4835MTE Power Dissipation vs Output Power LM4835MTE Power Derating Curve Figure 9. These curves show the thermal dissipation ability of the LM4835MTE at different ambient temperatures given these conditions: 500LFPM + 2in2: The part is soldered to a 2in2, 1 oz. copper plane with 500 linear feet per minute of forced-air flow across it. 2in2on bottom: The part is soldered to a 2in2, 1oz. copper plane that is on the bottom side of the PC board through 21 8 mil vias. 2in2: The part is soldered to a 2in2, 1oz. copper plane. 1in2: The part is soldered to a 1in2, 1oz. copper plane. Not Attached: The part is not soldered down and is not forced-air cooled. Figure 10. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM4835 7 LM4835 SNAS019F – MARCH 1999 – REVISED MAY 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS MTE SPECIFIC CHARACTERISTICS (continued) LM4835LQ Power Derating Curve Figure 11. 8 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM4835 LM4835 www.ti.com SNAS019F – MARCH 1999 – REVISED MAY 2013 TYPICAL PERFORMANCE CHARACTERISTICS NON-MTE SPECIFIC CHARACTERISTICS THD+N vs Frequency THD+N vs Frequency Figure 12. Figure 13. THD+N vs Frequency THD+N vs Frequency Figure 14. Figure 15. THD+N vs Frequency THD+N vs Frequency Figure 16. Figure 17. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM4835 9 LM4835 SNAS019F – MARCH 1999 – REVISED MAY 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS NON-MTE SPECIFIC CHARACTERISTICS (continued) 10 THD+N vs Frequency THD+N vs Frequency Figure 18. Figure 19. THD+N vs Frequency THD+N vs Frequency Figure 20. Figure 21. THD+N vs Frequency THD+N vs Output Power Figure 22. Figure 23. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM4835 LM4835 www.ti.com SNAS019F – MARCH 1999 – REVISED MAY 2013 TYPICAL PERFORMANCE CHARACTERISTICS NON-MTE SPECIFIC CHARACTERISTICS (continued) THD+N vs Output Power THD+N vs Output Power Figure 24. Figure 25. THD+N vs Output Power THD+N vs Output Power Figure 26. Figure 27. THD+N vs Output Power THD+N vs Output Power Figure 28. Figure 29. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM4835 11 LM4835 SNAS019F – MARCH 1999 – REVISED MAY 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS NON-MTE SPECIFIC CHARACTERISTICS (continued) 12 THD+N vs Output Power THD+N vs Output Power Figure 30. Figure 31. THD+N vs Output Power THD+N vs Output Power Figure 32. Figure 33. THD+N vs Output Voltage Docking Station Pins THD+N vs Output Voltage Docking Station Pins Figure 34. Figure 35. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM4835 LM4835 www.ti.com SNAS019F – MARCH 1999 – REVISED MAY 2013 TYPICAL PERFORMANCE CHARACTERISTICS Output Power vs Load Resistance Output Power vs Load Resistance Figure 36. Figure 37. Output Power vs Load Resistance Power Supply Rejection Ratio Figure 38. Figure 39. Dropout Voltage Output Power vs Load Resistance Figure 40. Figure 41. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM4835 13 LM4835 SNAS019F – MARCH 1999 – REVISED MAY 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) 14 Noise Floor Noise Floor Figure 42. Figure 43. Volume Control Characteristics Power Dissipation vs Output Power Figure 44. Figure 45. Power Dissipation vs Output Power External Gain/ Bass Boost Characteristics Figure 46. Figure 47. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM4835 LM4835 www.ti.com SNAS019F – MARCH 1999 – REVISED MAY 2013 TYPICAL PERFORMANCE CHARACTERISTICS (continued) Power Derating Curve Crosstalk Figure 48. Figure 49. Crosstalk Output Power vs Supply voltage Figure 50. Figure 51. Output Power vs Supply Voltage Supply Current vs Supply Voltage Figure 52. Figure 53. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM4835 15 LM4835 SNAS019F – MARCH 1999 – REVISED MAY 2013 www.ti.com APPLICATION INFORMATION EXPOSED-DAP PACKAGE PCB MOUNTING CONSIDERATIONS The LM4835's exposed-DAP (die attach paddle) packages (MTE and LQ) provide a low thermal resistance between the die and the PCB to which the part is mounted and soldered. This allows rapid heat transfer from the die to the surrounding PCB copper traces, ground plane and, finally, surrounding air. The result is a low voltage audio power amplifier that produces 2.1W at ≤ 1% THD with a 4Ω load. This high power is achieved through careful consideration of necessary thermal design. Failing to optimize thermal design may compromise the LM4835's high power performance and activate unwanted, though necessary, thermal shutdown protection. The MTE and LQ packages must have their DAPs soldered to a copper pad on the PCB. The DAP's PCB copper pad is connected to a large plane of continuous unbroken copper. This plane forms a thermal mass and heat sink and radiation area. Place the heat sink area on either outside plane in the case of a two-sided PCB, or on an inner layer of a board with more than two layers. Connect the DAP copper pad to the inner layer or backside copper heat sink area with 32(4x8) (MTE) or 6(3x2) (LQ) vias. The via diameter should be 0.012in–0.013in with a 1.27mm pitch. Ensure efficient thermal conductivity by plating-through and solder-filling the vias. Best thermal performance is achieved with the largest practical copper heat sink area. If the heatsink and amplifier share the same PCB layer, a nominal 2.5in2 (min) area is necessary for 5V operation with a 4Ω load. Heatsink areas not placed on the same PCB layer as the LM4835 should be 5in2 (min) for the same supply voltage and load resistance. The last two area recommendations apply for 25°C ambient temperature. Increase the area to compensate for ambient temperatures above 25°C. In systems using cooling fans, the LM4835MTE can take advantage of forced air cooling. With an air flow rate of 450 linear-feet per minute and a 2.5in2 exposed copper or 5.0in2 inner layer copper plane heatsink, the LM4835MTE can continuously drive a 3Ω load to full power. The LM4835LQ achieves the same output power level without forced air cooling. In all circumstances and conditions, the junction temperature must be held below 150°C to prevent activating the LM4835's thermal shutdown protection. The LM4835's power de-rating curve in the Typical Performance Characteristics shows the maximum power dissipation versus temperature. Example PCB layouts for the exposed-DAP TSSOP and LQ packages are shown in the Demonstration Board Layout section. Further detailed and specific information concerning PCB layout, fabrication, and mounting an LQ (WQFN) package is available in TI's SNOA401. PCB LAYOUT AND SUPPLY REGULATION CONSIDERATIONS FOR DRIVING 3Ω AND 4Ω LOADS Power dissipated by a load is a function of the voltage swing across the load and the load's impedance. As load impedance decreases, load dissipation becomes increasingly dependent on the interconnect (PCB trace and wire) resistance between the amplifier output pins and the load's connections. Residual trace resistance causes a voltage drop, which results in power dissipated in the trace and not in the load as desired. For example, 0.1Ω trace resistance reduces the output power dissipated by a 4Ω load from 2.1W to 2.0W. This problem of decreased load dissipation is exacerbated as load impedance decreases. Therefore, to maintain the highest load dissipation and widest output voltage swing, PCB traces that connect the output pins to a load must be as wide as possible. Poor power supply regulation adversely affects maximum output power. A poorly regulated supply's output voltage decreases with increasing load current. Reduced supply voltage causes decreased headroom, output signal clipping, and reduced output power. Even with tightly regulated supplies, trace resistance creates the same effects as poor supply regulation. Therefore, making the power supply traces as wide as possible helps maintain full output voltage swing. BRIDGE CONFIGURATION EXPLANATION As shown in Figure 4, the LM4835 consists of two pairs of operational amplifiers, forming a two-channel (channel A and channel B) stereo amplifier. (Though the following discusses channel A, it applies equally to channel B.) External resistors Rf and Ri set the closed-loop gain of Amp1A, whereas two internal 20kΩ resistors set Amp2A's gain at −1. The LM4835 drives a load, such as a speaker, connected between the two amplifier outputs, −OUTA and +OUTA. 16 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM4835 LM4835 www.ti.com SNAS019F – MARCH 1999 – REVISED MAY 2013 Figure 4 shows that Amp1A's output serves as Amp2A's input. This results in both amplifiers producing signals identical in magnitude, but 180° out of phase. Taking advantage of this phase difference, a load is placed between −OUTA and +OUTA and driven differentially (commonly referred to as “bridge mode”). This results in a differential gain of AVD = 2 * (Rf / Ri) (1) Bridge mode amplifiers are different from single-ended amplifiers that drive loads connected between a single amplifier's output and ground. For a given supply voltage, bridge mode has a distinct advantage over the singleended configuration: its differential output doubles the voltage swing across the load. This produces four times the output power when compared to a single-ended amplifier under the same conditions. This increase in attainable output power assumes that the amplifier is not current limited or that the output signal is not clipped. To ensure minimum output signal clipping when choosing an amplifier's closed-loop gain, refer to the AUDIO POWER AMPLIFIER DESIGN section. Another advantage of the differential bridge output is no net DC voltage across the load. This is accomplished by biasing channel A's and channel B's outputs at half-supply. This eliminates the coupling capacitor that single supply, single-ended amplifiers require. Eliminating an output coupling capacitor in a single-ended configuration forces a single-supply amplifier's half-supply bias voltage across the load. This increases internal IC power dissipation and may permanently damage loads such as speakers. POWER DISSIPATION Power dissipation is a major concern when designing a successful single-ended or bridged amplifier. Equation 2 states the maximum power dissipation point for a single-ended amplifier operating at a given supply voltage and driving a specified output load. PDMAX = (VDD)2 / (2π2RL) Single-Ended (2) However, a direct consequence of the increased power delivered to the load by a bridge amplifier is higher internal power dissipation for the same conditions. The LM4835 has two operational amplifiers per channel. The maximum internal power dissipation per channel operating in the bridge mode is four times that of a single-ended amplifier. From Equation 3, assuming a 5V power supply and a 4Ω load, the maximum single channel power dissipation is 1.27W or 2.54W for stereo operation. PDMAX = 4 * (VDD)2 / (2π2RL) Bridge Mode (3) The LM4835's power dissipation is twice that given by Equation 2 or Equation 3 when operating in the singleended mode or bridge mode, respectively. Twice the maximum power dissipation point given by Equation 3 must not exceed the power dissipation given by Equation 4: PDMAX′ = (TJMAX − TA) / θJA (4) The LM4835's TJMAX = 150°C. In the LQ package soldered to a DAP pad that expands to a copper area of 5in2 on a PCB, the LM4835's θJA is 20°C/W. In the MTE package soldered to a DAP pad that expands to a copper area of 2in2 on a PCB, the LM4835's θJA is 41°C/W. At any given ambient temperature TA, use Equation 4 to find the maximum internal power dissipation supported by the IC packaging. Rearranging Equation 4 and substituting PDMAX for PDMAX′ results in Equation 5. This equation gives the maximum ambient temperature that still allows maximum stereo power dissipation without violating the LM4835's maximum junction temperature. TA = TJMAX – 2*PDMAX θJA (5) For a typical application with a 5V power supply and an 4Ω load, the maximum ambient temperature that allows maximum stereo power dissipation without exceeding the maximum junction temperature is approximately 99°C for the LQ package and 45°C for the MTE package. TJMAX = PDMAX θJA + TA (6) Equation 6 gives the maximum junction temperature TJMAX. If the result violates the LM4835's 150°C, reduce the maximum junction temperature by reducing the power supply voltage or increasing the load resistance. Further allowance should be made for increased ambient temperatures. The above examples assume that a device is a surface mount part operating around the maximum power dissipation point. Since internal power dissipation is a function of output power, higher ambient temperatures are allowed as output power or duty cycle decreases. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM4835 17 LM4835 SNAS019F – MARCH 1999 – REVISED MAY 2013 www.ti.com If the result of Equation 3 is greater than that of Equation 4, then decrease the supply voltage, increase the load impedance, or reduce the ambient temperature. If these measures are insufficient, a heat sink can be added to reduce θJA. The heat sink can be created using additional copper area around the package, with connections to the ground pin(s), supply pin and amplifier output pins. External, solder attached SMT heatsinks such as the Thermalloy 7106D can also improve power dissipation. When adding a heat sink, the θJA is the sum of θJC, θCS, and θSA. (θJC is the junction-to-case thermal impedance, θCS is the case-to-sink thermal impedance, and θSA is the sink-to-ambient thermal impedance.) Refer to the Typical Performance Characteristics curves for power dissipation information at lower output power levels. POWER SUPPLY BYPASSING As with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply rejection. Applications that employ a 5V regulator typically use a 10µF in parallel with a 0.1µF filter capacitors to stabilize the regulator's output, reduce noise on the supply line, and improve the supply's transient response. However, their presence does not eliminate the need for a local 1.0µF tantalum bypass capacitance connected between the LM4835's supply pins and ground. Do not substitute a ceramic capacitor for the tantalum. Doing so may cause oscillation. Keep the length of leads and traces that connect capacitors between the LM4835's power supply pin and ground as short as possible. Connecting a 1µF capacitor, CB, between the BYPASS pin and ground improves the internal bias voltage's stability and improves the amplifier's PSRR. The PSRR improvements increase as the bypass pin capacitor value increases. Too large, however, increases turn-on time and can compromise amplifier's click and pop performance. The selection of bypass capacitor values, especially CB, depends on desired PSRR requirements, click and pop performance (as explained in the section, SELECTING PROPER EXTERNAL COMPONENTS), system cost, and size constraints. SELECTING PROPER EXTERNAL COMPONENTS Optimizing the LM4835's performance requires properly selecting external components. Though the LM4835 operates well when using external components with wide tolerances, best performance is achieved by optimizing component values. The LM4835 is unity-gain stable, giving a designer maximum design flexibility. The gain should be set to no more than a given application requires. This allows the amplifier to achieve minimum THD+N and maximum signal-tonoise ratio. These parameters are compromised as the closed-loop gain increases. However, low gain demands input signals with greater voltage swings to achieve maximum output power. Fortunately, many signal sources such as audio CODECs have outputs of 1VRMS (2.83VP-P). Please refer to the AUDIO POWER AMPLIFIER DESIGN section for more information on selecting the proper gain. INPUT CAPACITOR VALUE SELECTION Amplifying the lowest audio frequencies requires high value input coupling capacitor (0.33µF in Figure 4). A high value capacitor can be expensive and may compromise space efficiency in portable designs. In many cases, however, the speakers used in portable systems, whether internal or external, have little ability to reproduce signals below 150 Hz. Applications using speakers with this limited frequency response reap little improvement by using large input capacitor. Besides effecting system cost and size, the input coupling capacitor has an affect on the LM4835's click and pop performance. When the supply voltage is first applied, a transient (pop) is created as the charge on the input capacitor changes from zero to a quiescent state. The magnitude of the pop is directly proportional to the input capacitor's size. Higher value capacitors need more time to reach a quiescent DC voltage (usually VDD/2) when charged with a fixed current. The amplifier's output charges the input capacitor through the feedback resistor, Rf. Thus, pops can be minimized by selecting an input capacitor value that is no higher than necessary to meet the desired −3dB frequency. A shown in Figure 4, the input resistor (20kΩ) and the input capacitor produce a −3dB high pass filter cutoff frequency that is found using Equation 7. (7) As an example when using a speaker with a low frequency limit of 150Hz, the input coupling capacitor, using Equation 7, is 0.063µF. The 0.33µF input coupling capacitor shown in Figure 4 allows the LM4835 to drive high efficiency, full range speaker whose response extends below 30Hz. 18 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM4835 LM4835 www.ti.com SNAS019F – MARCH 1999 – REVISED MAY 2013 OPTIMIZING CLICK AND POP REDUCTION PERFORMANCE The LM4835 contains circuitry that minimizes turn-on and shutdown transients or “clicks and pop”. For this discussion, turn-on refers to either applying the power supply voltage or when the shutdown mode is deactivated. While the power supply is ramping to its final value, the LM4835's internal amplifiers are configured as unity gain buffers. An internal current source changes the voltage of the BYPASS pin in a controlled, linear manner. Ideally, the input and outputs track the voltage applied to the BYPASS pin. The gain of the internal amplifiers remains unity until the voltage on the bypass pin reaches 1/2 VDD. As soon as the voltage on the bypass pin is stable, the device becomes fully operational. Although the BYPASS pin current cannot be modified, changing the size of CB alters the device's turn-on time and the magnitude of “clicks and pops”. Increasing the value of CB reduces the magnitude of turn-on pops. However, this presents a tradeoff: as the size of CB increases, the turn-on time increases. There is a linear relationship between the size of CB and the turn-on time. Here are some typical turnon times for various values of CB: CB TON 0.01µF 2ms 0.1µF 20ms 0.22µF 44ms 0.47µF 94ms 1.0µF 200ms In order eliminate “clicks and pops”, all capacitors must be discharged before turn-on. Rapidly switching VDD may not allow the capacitors to fully discharge, which may cause “clicks and pops”. In a single-ended configuration, the output is coupled to the load by COUT. This capacitor usually has a high value. COUT discharges through internal 20kΩ resistors. Depending on the size of COUT, the discharge time constant can be relatively large. To reduce transients in single-ended mode, an external 1kΩ–5kΩ resistor can be placed in parallel with the internal 20kΩ resistor. The tradeoff for using this resistor is increased quiescent current. Figure 54. Resistor for Varying Output Loads DOCKING STATION INTERFACE Applications such as notebook computers can take advantage of a docking station to connect to external devices such as monitors or audio/visual equipment that sends or receives line level signals. The LM4835 has two outputs, Pin 9 and Pin 13, which connect to outputs of the internal input amplifiers that drive the volume control inputs. These input amplifiers can drive loads of >1kΩ (such as powered speakers) with a rail-to-rail signal. Since the output signal present on the RIGHT DOCK and LEFT DOCK pins is biased to VDD/2, coupling capacitors should be connected in series with the load. Typical values for the coupling capacitors are 0.33µF to 1.0µF. If polarized coupling capacitors are used, connect their "+" terminals to the respective output pin. Since the DOCK outputs precede the internal volume control, the signal amplitude will be equal to the input signal's magnitude and cannot be adjusted. However, the input amplifier's closed-loop gain can be adjusted using external resistors. These resistors are shown in Figure 4 as 20kΩ devices that set each input amplifier's gain to -1. Use Equation 8 to determine the input and feedback resistor values for a desired gain. - Av = RF / Ri (8) Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM4835 19 LM4835 SNAS019F – MARCH 1999 – REVISED MAY 2013 www.ti.com Adjusting the input amplifier's gain sets the minimum gain for that channel. The DOCK outputs adds circuit and functional flexibility because their use supercedes using the inverting outputs of each bridged output amplifier as line-level outputs. BEEP DETECT FUNCTION Computers and notebooks produce a system “beep“ signal that drives a small speaker. The speaker's auditory output signifies that the system requires user attention or input. To accommodate this system alert signal, the LM4835's pin 11 is a mono input that accepts the beep signal. Internal level detection circuitry at this input monitors the beep signal's magnitude. When a signal level greater than VDD/2 is detected on pin 11, the bridge output amplifiers are enabled. The beep signal is amplified and applied to the load connected to the output amplifiers. A valid beep signal will be applied to the load even when MUTE is active. Use the input resistors connected between the BEEP IN pin and the stereo input pins to accommodate different beep signal amplitudes. These resistors are shown as 200kΩ devices in Figure 4. Use higher value resistors to reduce the gain applied to the beep signal. The resistors must be used to pass the beep signal to the stereo inputs. The BEEP IN pin is used only to detect the beep signal's magnitude: it does not pass the signal to the output amplifiers. The LM4835's shutdown mode must be deactivated before a system alert signal is applied to BEEP IN pin. MICRO-POWER SHUTDOWN The voltage applied to the SHUTDOWN pin controls the LM4835's shutdown function. Activate micro-power shutdown by applying VDD to the SHUTDOWN pin. When active, the LM4835's micro-power shutdown feature turns off the amplifier's bias circuitry, reducing the supply current. The logic threshold is typically VDD/2. The low 0.7µA typical shutdown current is achieved by applying a voltage that is as near as VDD as possible to the SHUTDOWN pin. A voltage that is less than VDD may increase the shutdown current. Table 1 shows the logic signal levels that activate and deactivate micro-power shutdown and headphone amplifier operation. There are a few ways to control the micro-power shutdown. These include using a single-pole, single-throw switch, a microprocessor, or a microcontroller. When using a switch, connect an external 10kΩ pull-up resistor between the SHUTDOWN pin and VDD. Connect the switch between the SHUTDOWN pin and ground. Select normal amplifier operation by closing the switch. Opening the switch connects the SHUTDOWN pin to VDD through the pull-up resistor, activating micro-power shutdown. The switch and resistor ensure that the SHUTDOWN pin will not float. This prevents unwanted state changes. In a system with a microprocessor or a microcontroller, use a digital output to apply the control voltage to the SHUTDOWN pin. Driving the SHUTDOWN pin with active circuitry eliminates the pull up resistor. Table 1. LOGIC LEVEL TRUTH TABLE FOR SHUTDOWN, HP-IN, AND MUX OPERATION SHUTDOWN PIN HP-IN PIN MUX CHANNEL SELECT PIN OPERATIONAL MODE (MUX INPUT CHANNEL #) Logic Low Logic Low Logic Low Bridged Amplifiers (1) Logic Low Logic Low Logic High Bridged Amplifiers (2) Logic Low Logic High Logic Low Single-Ended Amplifiers (1) Logic Low Logic High Logic High Single-Ended Amplifiers (2) Logic High X X Micro-Power Shutdown MODE FUNCTION The LM4835's MODE function has two states controlled by the voltage applied to the MODE pin (pin 4). Mode 0, selected by applying 0V to the MODE pin, forces the LM4835 to effectively function as a "line-out," unity-gain amplifier. Mode 1, which uses the internal DC controlled volume control, is selected by applying VDD to the MODE pin. This mode sets the amplifier's gain according to the DC voltage applied to the DC VOL CONTROL pin. Prevent unanticipated gain behavior by connecting the MODE pin to VDD or ground. Do not let pin 4 float. MUTE FUNCTION The LM4835 mutes the amplifier and DOCK outputs when VDD is applied to pin 5, the MUTE pin. Even while muted, the LM4835 will amplify a system alert (beep) signal whose magnitude satisfies the BEEP DETECT circuitry. Applying 0V to the MUTE pin returns the LM4835 to normal, unmated operation. Prevent unanticipated mute behavior by connecting the MUTE pin to VDD or ground. Do not let pin 5 float. 20 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM4835 LM4835 www.ti.com SNAS019F – MARCH 1999 – REVISED MAY 2013 Figure 55. Headphone Sensing Circuit HP-IN FUNCTION Applying a voltage between 4V and VDD to the LM4835's HP-IN headphone control pin turns off Amp2A and Amp2B, muting a bridged-connected load. Quiescent current consumption is reduced when the IC is in this single-ended mode. Figure 55 shows the implementation of the LM4835's headphone control function. With no headphones connected to the headphone jack, the R1-R2 voltage divider sets the voltage applied to the HP-IN pin (pin 16) at approximately 50mV. This 50mV enables Amp1B and Amp2B, placing the LM4835 in bridged mode operation. The output coupling capacitor blocks the amplifier's half supply DC voltage, protecting the headphones. The HP-IN threshold is set at 4V. While the LM4835 operates in bridged mode, the DC potential across the load is essentially 0V. Therefore, even in an ideal situation, the output swing cannot cause a false single-ended trigger. Connecting headphones to the headphone jack disconnects the headphone jack contact pin from −OUTA and allows R1 to pull the HP Sense pin up to VDD. This enables the headphone function, turns off Amp2A and Amp2B, and mutes the bridged speaker. The amplifier then drives the headphones, whose impedance is in parallel with resistor R2 and R3. These resistors have negligible effect on the LM4835's output drive capability since the typical impedance of headphones is 32Ω. Figure 55 also shows the suggested headphone jack electrical connections. The jack is designed to mate with a three-wire plug. The plug's tip and ring should each carry one of the two stereo output signals, whereas the sleeve should carry the ground return. A headphone jack with one control pin contact is sufficient to drive the HPIN pin when connecting headphones. A microprocessor or a switch can replace the headphone jack contact pin. When a microprocessor or switch applies a voltage greater than 4V to the HP-IN pin, a bridge-connected speaker is muted and Amp1A and Amp2A drive a pair of headphones. GAIN SELECT FUNCTION (Bass Boost) The LM4835 features selectable gain, using either internal and external feedback resistors. Either set of feedback resistors set the gain of the output amplifiers. The voltage applied to pin 3 (GAIN SELECT pin) controls which gain is selected. Applying VDD to the GAIN SELECT pin selects the external gain mode. Applying 0V to the GAIN SELECT pin selects the internally set unity gain. In some cases a designer may want to improve the low frequency response of the bridged amplifier or incorporate a bass boost feature. This bass boost can be useful in systems where speakers are housed in small enclosures. A resistor, RLFE, and a capacitor, CLFE, in parallel, can be placed in series with the feedback resistor of the bridged amplifier as seen in Figure 56. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM4835 21 LM4835 SNAS019F – MARCH 1999 – REVISED MAY 2013 www.ti.com At low, frequencies CLFE is a virtual open circuit and at high frequencies, its nearly zero ohm impedance shorts RLFE. The result is increased bridge-amplifier gain at low frequencies. The combination of RLFE and CLFE form with a -3dB corner frequency at Figure 56. Low Frequency Enhancement fC = 1 / (2πRLFEC LFE) (9) The bridged-amplifier low frequency differential gain is: AVD = 2(RF + RLFE) / Ri (10) Using the component values shown in Figure 4 (RF = 20kΩ, RLFE = 20kΩ, and CLFE = 0.068µF), a first-order, 3dB pole is created at 120Hz. Assuming R i = 20kΩ, the low frequency differential gain is 4. The input (Ci) and output (CO) capacitor values must be selected for a low frequency response that covers the range of frequencies affected by the desired bass-boost operation. DC VOLUME CONTROL The LM4835 has an internal stereo volume control whose setting is a function of the DC voltage applied to the DC VOL CONTROL pin. The volume control's voltage input range is 0V to VDD. The volume range is from 0dB (DC control voltage = 80% VDD) to -80dB (DC control voltage = 0V). The volume remains at 0dB for DC control voltages greater than 80% VDD. When the MODE input is 0V, the LM4835 operates at unity gain, bypassing the volume control. A graph showing a typical volume response versus DC control voltage is shown in the Typical Performance Characteristics section. Like all volume controls, the LM4835's internal volume control is set while listening to an amplified signal that is applied to an external speaker. The actual voltage applied to the DC VOL CONTROL pin is a result of the volume a listener desires. As such, the volume control is designed for use in a feedback system that includes human ears and preferences. This feedback system operates quite well without the need for accurate gain. The user simply sets the volume to the desired level as determined by their ear, without regard to the actual DC voltage that produces the volume. Therefore, the accuracy of the volume control is not critical, as long as the volume changes monotonically, matches well between stereo channels, and the step size is small enough to reach a desired volume that is not too loud or too soft. Since gain accuracy is not critical, there will be volume variation from part-to-part even with the same applied DC control voltage. The gain of a given LM4835 can be set with a fixed external voltage, but another LM4835 may require a different control voltage to achieve the same gain. The typical part-to-part variation can be as large as 8dB for the same control voltage. 22 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM4835 LM4835 www.ti.com SNAS019F – MARCH 1999 – REVISED MAY 2013 AUDIO POWER AMPLIFIER DESIGN Audio Amplifier Design: Driving 1W into an 8Ω Load The following are the desired operational parameters: Power Output: 1 WRMS Load Impedance: 8Ω Input Level: 1 VRMS Input Impedance: 20 kΩ Bandwidth: 100 Hz−20 kHz ± 0.25 dB The design begins by specifying the minimum supply voltage necessary to obtain the specified output power. One way to find the minimum supply voltage is to use the Output Power vs Supply Voltage curve in the Typical Performance Characteristics section. Another way, using Equation 10, is to calculate the peak output voltage necessary to achieve the desired output power for a given load impedance. To account for the amplifier's dropout voltage, two additional voltages, based on the Dropout Voltage vs Supply Voltage in the Typical Performance Characteristics curves, must be added to the result obtained by Equation 11. The result is Equation 12. (11) (12) VDD ≥ (VOUTPEAK+ (VODTOP + VODBOT)) The Output Power vs Supply Voltage graph for an 8Ω load indicates a minimum supply voltage of 4.6V. This is easily met by the commonly used 5V supply voltage. The additional voltage creates the benefit of headroom, allowing the LM4835 to produce peak output power in excess of 1W without clipping or other audible distortion. The choice of supply voltage must also not create a situation that violates of maximum power dissipation as explained above in the POWER DISSIPATION section. After satisfying the LM4835's power dissipation requirements, the minimum differential gain needed to achieve 1W dissipation in an 8Ω load is found using Equation 13. (13) Thus, a minimum gain of 2.83 allows the LM4835's to reach full output swing and maintain low noise and THD+N performance. For this example, let AVD = 3. The amplifier's overall gain is set using the input (Ri) and feedback (Ri) resistors. With the desired input impedance set at 20kΩ, the feedback resistor is found using Equation 14. Rf / Ri = AVD / 2 (14) The value of Rf is 30kΩ. The last step in this design example is setting the amplifier's −3dB frequency bandwidth. To achieve the desired ±0.25dB pass band magnitude variation limit, the low frequency response must extend to at least one-fifth the lower bandwidth limit and the high frequency response must extend to at least five times the upper bandwidth limit. The gain variation for both response limits is 0.17dB, well within the ±0.25dB desired limit. The results are an fL = 100Hz / 5 = 20Hz (15) and an fH = 20kHz x 5 = 100kHz (16) As mentioned in the Selecting Proper External Components section, Ri and Ci create a highpass filter that sets the amplifier's lower bandpass frequency limit. Find the input coupling capacitor's value using Equation 17. Ci≥ 1 / (2πRifL) (17) The result is 1 / (2π*20kΩ*20Hz) = 0.397μF (18) Use a 0.39μF capacitor, the closest standard value. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM4835 23 LM4835 SNAS019F – MARCH 1999 – REVISED MAY 2013 www.ti.com The product of the desired high frequency cutoff (100kHz in this example) and the differential gain AVD, determines the upper passband response limit. With AVD = 3 and fH = 100kHz, the closed-loop gain bandwidth product (GBWP) is 300kHz. This is less than the LM4835's 3.5MHz GBWP. With this margin, the amplifier can be used in designs that require more differential gain while avoiding performance, restricting bandwidth limitations. RECOMMENDED PRINTED CIRCUIT BOARD LAYOUT Figure 57 through Figure 61 show the recommended four-layer PC board layout that is optimized for the 24-pin LQ-packaged LM4835 and associated external components. This circuit is designed for use with an external 5V supply and 4Ω speakers. This circuit board is easy to use. Apply 5V and ground to the board's VDD and GND pads, respectively. Connect 4Ω speakers between the board's −OUTA and +OUTA and OUTB and +OUTB pads. Figure 57. Recommended LQ PC Board Layout: Component-Side Silkscreen 24 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM4835 LM4835 www.ti.com SNAS019F – MARCH 1999 – REVISED MAY 2013 Figure 58. Recommended LQ PC Board Layout: Component-Side Layout Figure 59. Recommended LQ PC Board Layout: Upper Inner-Layer Layout Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM4835 25 LM4835 SNAS019F – MARCH 1999 – REVISED MAY 2013 www.ti.com Figure 60. Recommended LQ PC Board Layout: Lower Inner-Layer Layout Figure 61. Recommended LQ PC Board Layout: Bottom-Side Layout 26 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM4835 LM4835 www.ti.com SNAS019F – MARCH 1999 – REVISED MAY 2013 LM4835 MDC MWC STEREO 2W AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL AND SELECTABLE GAIN Figure 62. Die Layout (A - Step) Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM4835 27 LM4835 SNAS019F – MARCH 1999 – REVISED MAY 2013 www.ti.com REVISION HISTORY Changes from Revision E (May 2013) to Revision F • 28 Page Changed layout of National Data Sheet to TI format .......................................................................................................... 27 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM4835 PACKAGE OPTION ADDENDUM www.ti.com 12-Oct-2014 PACKAGING INFORMATION Orderable Device Status (1) LM4835MTX/NOPB ACTIVE Package Type Package Pins Package Drawing Qty TSSOP PW 28 2500 Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR Op Temp (°C) Device Marking (4/5) -40 to 85 LM4835MT (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. 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Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 12-Oct-2014 Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 8-May-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device LM4835MTX/NOPB Package Package Pins Type Drawing TSSOP PW 28 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 16.4 Pack Materials-Page 1 6.8 B0 (mm) K0 (mm) P1 (mm) 10.2 1.6 8.0 W Pin1 (mm) Quadrant 16.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 8-May-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM4835MTX/NOPB TSSOP PW 28 2500 367.0 367.0 38.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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