AVAGO HCPL-0611 High cmr, high speed ttl compatible optocoupler Datasheet

6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600,
HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661,
HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661
High CMR, High Speed TTL Compatible Optocouplers
Data Sheet
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
Description
Features
The 6N137, HCPL-26xx/06xx/4661, HCNW137/26x1 are
optically coupled gates that combine a GaAsP light emitting diode and an integrated high gain photo detector.
An enable input allows the detector to be strobed. The
output of the detector IC is an open collector Schottkyclamped transistor. The internal shield provides a guaranteed common mode transient immunity specification
up to 15,000 V/µs at Vcm = 1000 V.
• 15 kV/µs minimum Common Mode Rejection (CMR)
at VCM = 1 kV for HCNW2611, HCPL-2611, HCPL-4661,
HCPL-0611, HCPL-0661
• High speed: 10 MBd typical
• LSTTL/TTL compatible
• Low input current capability: 5 mA
• Guaranteed AC and DC performance over temper­
ature: -40 °C to +85 °C
• Available in 8-Pin DIP, SOIC-8, widebody packages
• Strobable output (single channel products only)
• Safety approval
UL recognized - 3750 Vrms for 1 minute and 5000 Vrms*
for 1 minute per UL1577 CSA approved
IEC/EN/DIN EN 60747-5-5 approved with VIORM = 567 Vpeak for 06xx Option 060 VIORM = 630 Vpeak for 6N137/26xx Option 060
VIORM = 1414 Vpeak for HCNW137/26x1
• MIL-PRF-38534 hermetic version available
(HCPL-56xx/66xx)
This unique design provides maximum AC and DC circuit
isolation while achieving TTL compatibility. The optocoupler AC and DC operational param­e­ters are guaranteed
from -40 °C to +85 °C allowing troublefree system performance.
Functional Diagram
6N137, HCPL-2601/2611
HCPL-0600/0601/0611
8 V CC
NC 1
HCPL-2630/2631/4661
HCPL-0630/0631/0661
ANODE 1 1
8 V CC
ANODE 2
7 VE
CATHODE 1 2
7 V O1
CATHODE 3
6 VO
CATHODE 2 3
6 V O2
NC 4
LED
ON
OFF
ON
OFF
ON
OFF
SHIELD
5 GND
TRUTH TABLE
(POSITIVE LOGIC)
OUTPUT
ENABLE
L
H
H
H
H
L
H
L
L
NC
H
NC
ANODE 2 4
SHIELD
5 GND
TRUTH TABLE
(POSITIVE LOGIC)
LED
OUTPUT
ON
L
OFF
H
A 0.1 µF bypass capacitor must be connected between pins 5 and 8.
Applications
•
•
•
•
•
•
•
•
•
•
Isolated line receiver
Computer-peripheral interfaces
Microprocessor system interfaces
Digital isolation for A/D, D/A conversion
Switching power supply
Instrument input/output isolation
Ground loop elimination
Pulse transformer replacement
Power transistor isolation in motor drives
Isolation of high speed logic systems
*5000 Vrms/1 Minute rating is for HCNW137/26X1 and Option 020
(6N137, HCPL-2601/11/30/31, HCPL-4661) products only.
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.
The 6N137, HCPL-26xx, HCPL-06xx, HCPL-4661, HCNW137,
and HCNW26x1 are suitable for high speed logic interfacing, input/output buffering, as line receivers in environments that conventional line receivers cannot tolerate
and are recom­mended for use in extremely high ground
or induced noise environments.
Selection Guide
Widebody
Minimum CMR
8-Pin DIP (300 Mil)
Small-Outline SO-8
(400 Mil)
Hermetic
Input
Single
On-Single
Dual
Single
Dual
Single
and Dual
dV/dt
VCM
Current Output
Channel
Channel
Channel
Channel
Channel
Channel
(V/µs)
(V)
(mA)
Enable
Package
Package
Package
Package
Package
Packages
1000
10
5
YES
6N137
5,000
1,000
5
YES
NO
10,000
1,000
YES
1,000
YES
HCPL-2630 HCPL-0630
HCPL-2631 HCPL-0631
HCPL-2611HCPL-0611
HCNW2611
NO
HCPL-4661 HCPL-0661
1,000
50
YES
HCPL-2602
3, 500
300
YES
HCPL-2612[1]
1,000
50
YES
HCPL-261A[1]HCPL-061A[1]
3
HCNW137
HCPL-2601HCPL-0601
HCNW2601
NO
15,000
HCPL-0600
[1]
NO HCPL-263A[1]HCPL-063A[1]
1,000[2]
1,000
YES
HCPL-261N[1]HCPL-061N[1]
NO HCPL-263N[1]HCPL-063N[1]
[3]
1,000
50
12.5
HCPL-193x[1]
HCPL-56xx[1]
HCPL-66xx[1]
Notes:
1. Technical data are on separate Avago publications.
2. 15 kV/µs with VCM = 1 kV can be achieved using Avago application circuit.
3. Enable is available for single channel products only, except for HCPL-193x devices.
2
Ordering Information
HCPL-xxxx is UL Recognized with 3750 Vrms for 1 minute per UL1577.
HCNWxxxx is UL Rcognized with 5000 Vrms for 1 minute per UL1577.
Option
Part
Number
6N137
HCPL-2601
HCPL-2611
HCPL-2630
HCPL-2631
HCPL-4661
3
RoHS
Compliant
Non RoHS
Compliant
-000E
No option
-300E
#300
X
X
-500E
#500
X
X
-020E
#020
-320E
#320
-520E
#520
-060E
#060
-560E
-560
-000E
No option
-300E
#300
X
X
-500E
#500
X
X
-020E
#020
-320E
#320
-520E
#520
-060E
#060
-360E
-
-000E
No option
-300E
#300
X
X
-500E
#500
X
X
-020E
#020
-320E
#320
-520E
#520
-060E
#060
-360E
#360
X
X
-560E
#560
X
X
-000E
No option
-300E
#300
-500E
#500
-020E
#020
-320E
#320
X
X
-520E
-520
X
X
-000E
No option
-300E
#300
X
X
-500E
#500
X
X
-020E
#020
-320E
#320
X
X
-520E
#520
X
X
Package
Surface
Mount
Gull
Wing
Tape &
Reel
UL 5000 Vrms/
1 Minute
Rating
IEC/EN/DIN
EN 60747-5-5
Quantity
50 per tube
300mil
DIP-8
X
X
X
X
X
X
50 per tube
X
X
1000 per reel
X
50 per tube
X
50 per tube
X
1000 per reel
X
X
50 per tube
X
1000 per reel
50 per tube
300mil
DIP-8
X
X
X
X
X
50 per tube
X
X
1000 per reel
X
50 per tube
X
50 per tube
X
1000 per reel
X
X
50 per tube
X
50 per tube
50 per tube
300mil
DIP-8
X
X
X
X
50 per tube
X
X
1000 per reel
X
50 per tube
X
50 per tube
X
1000 per reel
X
X
50 per tube
X
50 per tube
X
1000 per reel
50 per tube
300mil
DIP-8
X
X
X
X
50 per tube
X
X
1000 per reel
X
50 per tube
X
50 per tube
X
1000 per reel
50 per tube
300mil
DIP-8
50 per tube
X
X
1000 per reel
X
50 per tube
X
50 per tube
X
1000 per reel
Option
Part
Number
HCPL-0600
HCPL-0601
HCPL-0611
HCPL-0630
HCPL-0631
HCPL-0661
HCNW137
HCNW2601
HCNW2611
RoHS
Compliant
Non RoHS
Compliant
-000E
No option
-500E
#500
-060E
#060
-560E
#560
-000E
No option
-500E
#500
-000E
No option
-300E
#300
-500E
#500
Surface
Mount
Package
Gull
Wing
Tape &
Reel
UL 5000 Vrms/
1 Minute
Rating
IEC/EN/DIN
EN 60747-5-5
X
100 per tube
X
SO-8
X
1500 per reel
X
X
X
X
100 per tube
X
1500 per reel
X
SO-8
100 per tube
X
400 mil
DIP-8
Quantity
X
X
X
X
X
1500 per reel
X
X
X
42 per tube
X
X
42 per tube
X
X
750 per reel
To order, choose a part number from the part number column and combine with the desired option from the option
column to form an order entry. Combination of Option 020 and Option 060 is not available.
Example 1:
HCPL-2611-560E to order product of 300mil DIP Gull Wing Surface Mount package in Tape and Reel packag
ing with IEC/EN/DIN EN 60747-5-5 Safety Approval in RoHS compliant.
Example 2:
HCPL-2630 to order product of 300mil DIP package in tube packaging and non RoHS compliant.
Option datasheets are available. Contact your Avago sales representative or authorized distributor for information.
Notes:
The notation ‘#xxx’ is used for existing products, while (new) products launched since July 15, 2001 and RoHS compliant option will use ‘-xxxE‘.
Schematic
IF
6N137, HCPL-2601/2611
HCPL-0600/0601/0611
HCNW137, HCNW2601/2611
HCPL-2630/2631/4661
HCPL-0630/0631/0661
ICC
ICC
8
2+
IO
6
VCC
VO
1
8
IF1
IO1
+
7
VCC
VO1
VF1
–
VF
2
SHIELD
–
3
SHIELD
IE
7
VE
USE OF A 0.1 µF BYPASS CAPACITOR CONNECTED
BETWEEN PINS 5 AND 8 IS RECOMMENDED (SEE NOTE 5).
5
GND
3
IF2
IO2
–
6
VF2
+
4
SHIELD
6N137 Schematic a
6N137 Schematic b
4
VO2
5
GND
Package Outline Drawings
8-pin DIP Package** (6N137, HCPL-2601/11/30/31, HCPL-4661)
7.62 ± 0.25
(0.300 ± 0.010)
9.65 ± 0.25
(0.380 ± 0.010)
8
TYPE NUMBER
7
6
5
6.35 ± 0.25
(0.250 ± 0.010)
OPTION CODE*
DATE CODE
A XXXXZ
YYWW RU
1
2
3
UL
RECOGNITION
4
1.78 (0.070) MAX.
1.19 (0.047) MAX.
5° TYP.
3.56 ± 0.13
(0.140 ± 0.005)
4.70 (0.185) MAX.
0.51 (0.020) MIN.
2.92 (0.115) MIN.
0.65 (0.025) MAX.
1.080 ± 0.320
(0.043 ± 0.013)
2.54 ± 0.25
(0.100 ± 0.010)
+ 0.076
0.254 - 0.051
+ 0.003)
(0.010 - 0.002)
DIMENSIONS IN MILLIMETERS AND (INCHES).
*MARKING CODE LETTER FOR OPTION NUMBERS
"L" = OPTION 020
"V" = OPTION 060
OPTION NUMBERS 300 AND 500 NOT MARKED.
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
**JEDEC Registered Data (for 6N137 only).
8-pin DIP Package with Gull Wing Surface Mount Option 300
(6N137, HCPL-2601/11/30/31, HCPL-4661)
LAND PATTERN RECOMMENDATION
9.65 ± 0.25
(0.380 ± 0.010)
8
7
6
1.016 (0.040)
5
6.350 ± 0.25
(0.250 ± 0.010)
1
2
3
10.9 (0.430)
4
1.27 (0.050)
1.19
(0.047)
MAX.
1.780
(0.070)
MAX.
9.65 ± 0.25
(0.380 ± 0.010)
7.62 ± 0.25
(0.300 ± 0.010)
3.56 ± 0.13
(0.140 ± 0.005)
1.080 ± 0.320
(0.043 ± 0.013)
0.635 ± 0.130
2.54
(0.025 ± 0.005)
(0.100)
BSC
DIMENSIONS IN MILLIMETERS (INCHES).
LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
5
0.635 ± 0.25
(0.025 ± 0.010)
2.0 (0.080)
+ 0.076
0.254 - 0.051
+ 0.003)
(0.010 - 0.002)
12° NOM.
Small-Outline SO-8 Package (HCPL-0600/01/11/30/31/61)
LAND PATTERN RECOMMENDATION
8
7
6
5
XXX
YWW
3.937 ± 0.127
(0.155 ± 0.005)
PIN ONE
1
2
3
5.994 ± 0.203
(0.236 ± 0.008)
TYPE NUMBER
(LAST 3 DIGITS)
DATE CODE
7.49 (0.295)
4
0.406 ± 0.076
(0.016 ± 0.003)
1.9 (0.075)
1.270 BSC
(0.050)
0.64 (0.025)
* 5.080 ± 0.127
(0.200 ± 0.005)
0.432
45° X (0.017)
7°
3.175 ± 0.127
(0.125 ± 0.005)
1.524
(0.060)
* TOTAL PACKAGE LENGTH (INCLUSIVE OF MOLD FLASH)
5.207 ± 0.254 (0.205 ± 0.010)
0 ~ 7°
0.228 ± 0.025
(0.009 ± 0.001)
0.203 ± 0.102
(0.008 ± 0.004)
0.305 MIN.
(0.012)
DIMENSIONS IN MILLIMETERS (INCHES).
LEAD COPLANARITY = 0.10 mm (0.004 INCHES) MAX.
NOTE: FLOATING LEAD PROTRUSION IS 0.15 mm (6 mils) MAX.
8-Pin Widebody DIP Package (HCNW137, HCNW2601/11)
11.00 MAX.
(0.433)
11.23 ± 0.15
(0.442 ± 0.006)
8
7
6
5
TYPE NUMBER
DATE CODE
A
HCNWXXXX
9.00 ± 0.15
(0.354 ± 0.006)
YYWW
1
2
3
4
10.16 (0.400)
TYP.
1.55
(0.061)
MAX.
7° TYP.
5.10 MAX.
(0.201)
3.10 (0.122)
3.90 (0.154)
2.54 (0.100)
TYP.
1.80 ± 0.15
(0.071 ± 0.006)
0.40 (0.016)
0.56 (0.022)
+ 0.076
0.254 - 0.0051
+ 0.003)
(0.010 - 0.002)
0.51 (0.021) MIN.
DIMENSIONS IN MILLIMETERS (INCHES).
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
6
8-Pin Widebody DIP Package with Gull Wing Surface Mount Option 300
(HCNW137, HCNW2601/11)
11.23 ± 0.15
(0.442 ± 0.006)
8
7
6
LAND PATTERN RECOMMENDATION
5
9.00 ± 0.15
(0.354 ± 0.006)
1
2
3
13.56
(0.534)
4
1.3
(0.051)
2.29
(0.09)
12.30 ± 0.30
(0.484 ± 0.012)
1.55
(0.061)
MAX.
11.00 MAX.
(0.433)
4.00 MAX.
(0.158)
1.80 ± 0.15
(0.071 ± 0.006)
2.54
(0.100)
BSC
0.75 ± 0.25
(0.030 ± 0.010)
1.00 ± 0.15
(0.039 ± 0.006)
+ 0.076
0.254 - 0.0051
+ 0.003)
(0.010 - 0.002)
DIMENSIONS IN MILLIMETERS (INCHES).
7° NOM.
LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
Reflow Soldering Profile
The recommended reflow soldering conditions are per JEDEC Standard J-STD-020 (latest revision). Non-halide flux
should be used.
Regulatory Information
The 6N137, HCPL-26xx/06xx/46xx, and HCNW137/26xx have been approved by the following organizations:
UL
Recognized under UL 1577, Component Recognition
Program, File E55361.
CSA
Approved under CSA Component Acceptance Notice
#5, File CA 88324.
7
IEC/EN/DIN EN 60747-5-5
Insulation and Safety Related Specifications
Parameter
Symbol
8-pin DIP
(300 Mil)
SO-8
Value
Value
Widebody
(400 Mil)
Value
Unit
Conditions
Minimum External
L(101)
7.1
4.9
9.6
mm
Air Gap
(External Clearance)
Measured from input terminals
to output terminals, shortest
distance through air.
Minimum External
L(102)
7.4
4.8
10.0
mm
Tracking
(External Creepage)
Measured from input terminals
to output terminals, shortest
distance path along body.
Minimum Internal
0.08
0.08
1.0
mm
Plastic Gap
(Internal Clearance)
Through insulation distance,
conductor to conductor, usually
the direct distance between the
photoemitter and photodetector
inside the optocoupler cavity.
Minimum Internal
NA
NA
4.0
mm
Tracking
(Internal Creepage)
Measured from input terminals
to output terminals, along
internal cavity.
Tracking Resistance
CTI
(Comparative Tracking Index)
V
DIN IEC 112/VDE 0303 Part 1
Isolation Group
IIIa
IIIa
IIIa
Material Group
(DIN VDE 0110, 1/89, Table 1)
200
200
200
Option 300 - surface mount classification is Class A in accordance with CECC 00802.
IEC/EN/DIN EN 60747-5-5 Insulation Characteristics*
(HCPL-06xx Option 060 Only)
Description
Symbol
Characteristic
Unit
Installation classification per DIN VDE 0110, Table 1
for rated mains voltage ≤ 150 Vrms I-IV
for rated mains voltage ≤ 300 Vrms I-IV
for rated mains voltage ≤ 600 Vrms I-III
Climatic Classification
40/85/21
Pollution Degree (DIN VDE 0110/39)
2
Maximum Working Insulation Voltage
VIORM
567
V peak
Input-to-Output Test Voltage, Method b*
VIORM x 1.875 = VPR, 100% Production Test with tm = 1 sec,
Partial Discharge < 5 pC
VPR
1063
V peak
Input-to-Output Test Voltage, Method a*
VIORM x 1.6 = VPR, Type and Sample Test, tm = 10 sec,
Partial Discharge < 5 pC
VPR
907
V peak
VIOTM
6000
V peak
TS
IS,INPUT
PS,OUTPUT
150
150
600
°C
mA
mW
RS
≥109
Ω
Highest Allowable Overvoltage
(Transient Overvoltage, tini = 60 sec)
Safety Limiting Values (Maximum values allowed in the event of a failure)
Case Temperature
Input Current**
Output Power**
Insulation Resistance at TS, VIO = 500 V
*Refer to the front of the optocoupler section of the current catalog, under Product Safety Regulations section, IEC/EN/DIN EN 60747-5-5, for a
detailed description.
Note: Isolation characteristics are guaranteed only within the safety maximum ratings which must be ensured by protective circuits in application.
8
IEC/EN/DIN EN 60747-5-5 Insulation Characteristics*
(HCPL-26xx; 46xx; 6N13x Option 060 Only)
Description
Symbol
Characteristic
Unit
Installation classification per DIN VDE 0110, Table 1
for rated mains voltage ≤ 300 Vrms I-IV
for rated mains voltage ≤ 450 Vrms I-IV
Climatic Classification
40/85/21
Pollution Degree (DIN VDE 0110/39)
2
Maximum Working Insulation Voltage
VIORM
630
V peak
Input to Output Test Voltage, Method b*
VIORM x 1.875 = VPR, 100% Production Test with tm = 1 sec,
VPR
1181
V peak
Partial Discharge < 5 pC
Input to Output Test Voltage, Method a*
VIORM x 1.6 = VPR, Type and sample test, tm = 10 sec,
VPR
1008
V peak
Partial Discharge < 5 pC
Highest Allowable Overvoltage
(Transient Overvoltage, tini = 60 sec)
VIOTM
6000
V peak
Safety Limiting Values (Maximum values allowed in the event of a failure) Case Temperature
TS
175
°C
Input Current
IS,INPUT
230
mA
Output Power
PS,OUTPUT
600
mW
Insulation Resistance at TS, VIO = 500 V
RS
≥109
Ω
*Refer to the front of the optocoupler section of the current catalog, under Product Safety Regulations section, IEC/EN/DIN EN 60747-5-5, for a
detailed description.
Note: Isolation characteristics are guaranteed only within the safety maximum ratings, which must be ensured by protective circuits in application.
IEC/EN/DIN EN 60747-5-5 Insulation Characteristics*
(HCNW137/2601/2611 Only)
Description
Symbol
Characteristic
Unit
Installation classification per DIN VDE 0110, Table 1
for rated mains voltage ≤ 600 Vrms I-IV
for rated mains voltage ≤ 1000 Vrms I-III
Climatic Classification
40/85/21
Pollution Degree (DIN VDE 0110/39)
2
Maximum Working Insulation Voltage
VIORM
1414
V peak
Input to Output Test Voltage, Method b*
VIORM x 1.875 = VPR, 100% Production Test with tm = 1 sec,
VPR
2651
V peak
Partial Discharge < 5 pC
Input to Output Test Voltage, Method a*
VIORM x 1.6 = VPR, Type and sample test, tm = 10 sec,
VPR
2262
V peak
Partial Discharge < 5 pC
Highest Allowable Overvoltage
(Transient Overvoltage, tini = 60 sec)
VIOTM
8000
V peak
Safety Limiting Values (Maximum values allowed in the event of a failure)
Case Temperature
TS
150
°C
Input Current
IS,INPUT
400
mA
Output Power
PS,OUTPUT
700
mW
Insulation Resistance at TS, VIO = 500 V
RS
≥109
Ω
*Refer to the front of the optocoupler section of the current catalog, under Product Safety Regulations section, IEC/EN/DIN EN 60747-5-5, for a
detailed description.
Note: Isolation characteristics are guaranteed only within the safety maximum ratings, which must be ensured by protective circuits in application.
9
Absolute Maximum Ratings* (No Derating Required up to 85 °C)
Parameter
Symbol
Storage Temperature
Operating Temperature
†
Min.
Max.
Units
TS
-55
125
°C
TA
-40
85
°C
20
mA
Average Forward Input Current
IF
Reverse Input Voltage
VR
Package**
Single 8-Pin DIP
Single SO-8
Widebody
Dual 8-Pin DIP
Dual SO-8
15
8-Pin DIP, SO-8
5
Widebody
PI
Supply Voltage
(1 Minute Maximum)
VCC7
Enable Input Current
1, 3
V
Widebody 40
Single 8-Pin DIP
Single SO-8
Widebody
2
1
3
Input Power Dissipation
Enable Input Voltage (Not to
VE
Exceed VCC by more than
500 mV)
Note
mW
V
VCC + 0.5
V
IE5
mA
Output Collector Current
IO 50
mA
1
Output Collector Voltage
VO 7
V
1
Output Collector Power
PO
Dissipation
Single 8-Pin DIP
Single SO-8
Widebody
Dual 8-Pin DIP
Dual SO-8
85
mW
60
1, 4
Lead Solder Temperature
TLS
8-Pin DIP 260 °C for 10 sec.,
(Through Hole Parts Only) 1.6 mm below seating plane
Widebody 260 °C for 10 sec.,
up to seating plane
Solder Reflow Temperature SO-8 andSee Package Outline
Profile (Surface Mount Parts Only)
Option 300 Drawings section
*JEDEC Registered Data (for 6N137 only).
**Ratings apply to all devices except otherwise noted in the Package column.
†0 °C to 70 °C on JEDEC Registration.
Recommended Operating Conditions
Parameter
Symbol
Min.
Max.
Units
Input Current, Low Level
IFL*
0
250
µA
Input Current, High Level IFH**
5
15
mA
VCC
4.5
5.5
V
[1]
Power Supply Voltage
Low Level Enable Voltage VEL
0
0.8
V
High Level Enable Voltage†
VEH
2.0
VCC
V
Operating Temperature
TA
-40
85
°C
Fan Out (at RL = 1 kΩ) N
5
TTL Loads
Output Pull-up Resistor
RL
4k
Ω
†
[1]
330
*The off condition can also be guaranteed by ensuring that VFL ≤ 0.8 V.
**The initial switching threshold is 5 mA or less. It is recommended that 6.3 mA to 10 mA be used for best performance and to permit at least a 20%
LED degradation guardband.
†For single channel products only.
10
Electrical Specifications
Over recommended temperature (TA = -40 °C to +85 °C) unless otherwise specified. All Typicals at VCC = 5 V, TA = 25 °C.
All enable test conditions apply to single channel products only. See note 5.
Parameter
Sym.
Package
Min.
Typ.
Max.
Units Test Conditions
Fig.
Note
High Level Output
IOH*
All 5.5
100
µA
VCC = 5.5 V, VE = 2.0 V,
1
1, 6,
Current
VO = 5.5 V, IF = 250 mA19
Input Threshold
ITH
Single Channel
2.0
5.0
mA
VCC = 5.5 V, VE = 2.0 V,
CurrentWidebody
VO = 0.6 V,
Dual
Channel
2.5
I
(Sinking) = 13 mA
OL
2, 3
19
Low Level Output
VOL*
8-Pin DIP
0.35
0.6
V
VCC = 5.5 V, VE = 2.0 V,
Voltage SO-8
IF = 5 mA,
Widebody0.4
IOL (Sinking) = 13 mA
2, 3,
4, 5
1, 19
High Level Supply
ICCH
Single Channel
7.0
10.0*
mA
VE = 0.5 V
VCC = 5.5 V
Current6.5
VE = VCC IF = 0 mA
Dual Channel10
15
Both
Channels
7
Low Level Supply
ICCL
Single Channel
9.0
13.0*
mA
VE = 0.5 V
VCC = 5.5 V
Current8.5
VE = VCC IF = 10 mA
Dual Channel13
21
Both
Channels
8
High Level Enable
Current
IEH
Single Channel
Low Level Enable
Current
IEL*
High Level Enable
Voltage
VEH
Low Level Enable
Voltage
VEL 0.8
Input Forward
VF
8-Pin DIP
Voltage
SO-8
Widebody
Input Reverse
BVR*
8-Pin DIP
Breakdown
SO-8
VoltageWidebody
Input Diode
DVF /
Temperature
∆TA
Coefficient
Input Capacitance
CIN
-0.7
-1.6
mA
VCC = 5.5 V, VE = 2.0 V
-0.9
-1.6
mA
VCC = 5.5 V, VE = 0.5 V
2.0
1.4
1.5
1.3
1.25
1.64
1.2
V 19
V
1.75*
V
TA = 25 °C
1.80
1.85 TA = 25 °C
2.05
5
V
IF = 10 mA
6, 7
1
IR = 10 μA1
3
IR = 100 μA, TA = 25°C
8-Pin DIP-1.6
mV/°C
SO-8
Widebody
-1.9
IF = 10 mA
7
1
8-Pin DIP
SO-8
Widebody
f = 1 MHz, VF = 0 V
1
60
pF
70
*JEDEC registered data for the 6N137. The JEDEC Registration specifies 0 °C to +70 °C. Avago specifies -40 °C to +85 °C.
11
9
Switching Specifications (AC)
Over Recommended Temperature (TA = -40 °C to +85 °C), VCC = 5 V, IF = 7.5 mA unless otherwise specified. All Typicals at TA = 25 °C, VCC = 5 V.
Parameter
Sym.
Package**
Min.
Typ.
Max.
Units Test Conditions
Fig.
Note
8, 9,
10
1, 10,
19
Propagation Delay
tPLH
20
48
Time to High
Output Level
75*
ns
TA = 25°C
RL = 350 Ω
100 CL = 15 pF
Propagation Delay
tPHL
25
50
Time to Low
Output Level
75*
ns
TA = 25°C
100
Pulse Width
|tPHL - tPLH|
Distortion
8-Pin DIP
3.5
35
ns
SO-8
Widebody
40
1, 11,
19
8, 9,
10,
11
13, 19
Propagation Delay
tPSK
40
ns
Skew
12, 13,
19
Output Rise
Time (10-90%)
tr
24
ns
12
1, 19
Output Fall
Time (90-10%)
tf
10
ns
12
1, 19
13,
14
14
Propagation Delay
tELH
Single Channel
30
ns
RL = 350 Ω,
Time of Enable
CL = 15 pF,
from VEH to VEL
VEL = 0 V, VEH = 3 V
Propagation Delay
Time of Enable
from VEL to VEH
tEHL
Single Channel20 ns15
*JEDEC registered data for the 6N137.
**Ratings apply to all devices except otherwise noted in the Package column.
Parameter
Sym. Device
Min.
Typ.
Units Test Conditions
Fig.
Note
Logic High
|CMH|
Common
Mode
Transient
Immunity
6N137
1,000 10,000 V/µs |VCM| = 10 V
HCPL-2630
5,000 10,000 |VCM| = 1 kV
HCPL-0600/0630
HCNW137
HCPL-2601/2631 10,000 15,000 |VCM| = 1 kV
HCPL-0601/0631
HCNW2601
HCPL-2611/4661 15,000 25,000 |VCM| = 1 kV
HCPL-0611/0661
HCNW2611
VCC = 5 V, IF = 0 mA,
15
VO(MIN) = 2 V,
RL = 350 Ω, TA = 25 °C
1, 16,
18, 19
Logic Low
|CML|
Common
Mode
Transient
Immunity
6N137
1,000 10,000 V/µs |VCM| = 10 V
HCPL-2630
5,000 10,000 |VCM| = 1 kV
HCPL-0600/0630
HCNW137
HCPL-2601/2631 10,000 15,000 |VCM| = 1 kV
HCPL-0601/0631
HCNW2601
HCPL-2611/4661 15,000 25,000 |VCM| = 1 kV
HCPL-0611/0661
HCNW2611
VCC = 5 V, IF = 7.5 mA,
15
VO(MAX) = 0.8 V,
RL = 350 Ω, TA = 25°C
1, 17,
18, 19
12
Package Characteristics
All Typicals at TA = 25 °C.
Parameter
Sym. Package
Min.
Typ.
Max.
Units Test Conditions
Fig.
Note
Input-Output
II-O*
Single 8-Pin DIP
1
µA
45% RH, t = 5 s,
InsulationSingle SO-8
VI-O = 3 kV dc, TA = 25 °C
20, 21
Input-Output
VISO
Momentary With-
stand Voltage**
RH ≤ 50%, t = 1 min,
TA = 25 °C
20, 21
20, 22
Input-Output
RI-O
8-Pin DIP, SO-8
1012 Ω
VI-O = 500 Vdc
12
Resistance
Widebody
10
1013TA = 25 °C
1011TA = 100 °C
1, 20,
23
8-Pin DIP, SO-8
Widebody
OPT 020†
3750
V rms
5000
5000
Input-Output
CI-O
8-Pin DIP, SO-8
0.6
pF
f = 1 MHz, TA = 25 °C
1, 20,
CapacitanceWidebody
0.5
0.6
23
Input-Input
II-I
Dual Channel0.005 µA
RH ≤ 45%, t = 5 s,
Insulation
VI-I = 500 V
Leakage Current
Resistance
(Input-Input)
RI-I
Dual Channel
24
1011 Ω 24
Capacitance
CI-I
Dual 8-Pin DIP
0.03
(Input-Input)Dual SO-8
0.25
pF
f = 1 MHz
24
*JEDEC registered data for the 6N137. The JEDEC Registration specifies 0 °C to 70 °C. Avago specifies -40 °C to 85 °C.
**The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. For the continuous voltage rating refer to the IEC/EN/DIN EN 60747-5-5 Insulation Characteristics Table (if applicable), your equipment
level safety specification or Avago Application Note 1074 entitled “Optocoupler Input-Output Endurance Voltage.”
†For 6N137, HCPL-2601/2611/2630/2631/4661 only.
Notes:
1. Each channel.
2. Peaking circuits may produce transient input currents up to 50 mA, 50 ns maximum pulse width, provided average current does not exceed 20 mA.
3. Peaking circuits may produce transient input currents up to 50 mA, 50 ns maximum pulse width, provided average current does not exceed 15 mA.
4. Derate linearly above 80 °C free-air temperature at a rate of 2.7 mW/°C for the SOIC-8 package.
5. Bypassing of the power supply line is required, with a 0.1 µF ceramic disc capacitor adjacent to each optocoupler as illustrated in Figure 17. Total
lead length between both ends of the capacitor and the isolator pins should not exceed 20 mm.
6. The JEDEC registration for the 6N137 specifies a maximum IOH of 250 µA. Avago guarantees a maximum IOH of 100 µA.
7. The JEDEC registration for the 6N137 specifies a maximum ICCH of 15 mA. Avago guarantees a maximum ICCH of 10 mA.
8. The JEDEC registration for the 6N137 specifies a maximum ICCL of 18 mA. Avago guarantees a maximum ICCL of 13 mA.
9. The JEDEC registration for the 6N137 specifies a maximum IEL of –2.0 mA. Avago guarantees a maximum IEL of -1.6 mA.
10. The tPLH propagation delay is measured from the 3.75 mA point on the falling edge of the input pulse to the 1.5 V point on the rising edge of the
output pulse.
11. The tPHL propagation delay is measured from the 3.75 mA point on the rising edge of the input pulse to the 1.5 V point on the falling edge of the
output pulse.
12. tPSK is equal to the worst case difference in tPHL and/or tPLH that will be seen between units at any given temperature and specified test conditions.
13. See application section titled “Propagation Delay, Pulse-Width Distortion and Propagation Delay Skew” for more information.
14. The tELH enable propagation delay is measured from the 1.5 V point on the falling edge of the enable input pulse to the 1.5 V point on the rising edge
of the output pulse.
15. The tEHL enable propagation delay is measured from the 1.5 V point on the rising edge of the enable input pulse to the 1.5 V point on the falling edge
of the output pulse.
16. CMH is the maximum tolerable rate of rise of the common mode voltage to assure that the output will remain in a high logic state (i.e., VO > 2.0 V).
17. CML is the maximum tolerable rate of fall of the common mode voltage to assure that the output will remain in a low logic state (i.e., VO < 0.8 V).
18. For sinusoidal voltages, (|dVCM | / dt)max = πfCMVCM(p-p).
19. No external pull up is required for a high logic state on the enable input. If the VE pin is not used, tying VE to VCC will result in improved CMR
performance. For single channel products only.
20. Device considered a two-terminal device: pins 1, 2, 3, and 4 shorted together, and pins 5, 6, 7, and 8 shorted together.
21. In accordance with UL1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 4500 Vrms for one second (leakage detection
current limit, II-O ≤ 5 µA). This test is performed before the 100% production test for partial discharge (Method b) shown in the IEC/EN/DIN EN 607475-5 Insulation Characteristics Table, if applicable.
22. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 6000 V rms for one second (leakage detection
current limit, II-O ≤ 5 µA). This test is performed before the 100% production test for partial discharge (Method b) shown in the IEC/EN/DIN EN 607475-5 Insulation Characteristics Table, if applicable.
23. Measured between the LED anode and cathode shorted together and pins 5 through 8 shorted together. For dual channel products only.
24. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together. For dual channel products only
13
* FOR SINGLE
CHANNEL
PRODUCTS
ONLY
5
0
-60 -40 -20
0
20
40
60
4
4
RL = 350 Ω
RL = 1 KΩ
2
RL = 4 KΩ
0
-60 -40 -20
0
20
40
60
80 100
TA – TEMPERATURE – °C
Figure 3. Typical input threshold current vs. temperature
14
0
1
2
3
4
5
6
Figure 2. Typical output voltage vs. forward input current
ITH – INPUT THRESHOLD CURRENT – mA
ITH – INPUT THRESHOLD CURRENT – mA
8-PIN DIP, SO-8
VCC = 5.0 V
VO = 0.6 V
1
RL = 4 KΩ
1
IF – FORWARD INPUT CURRENT – mA
Figure 1. Typical high level output current vs.
temperature
3
RL = 1 KΩ
2
TA – TEMPERATURE – °C
5
RL = 350 Ω
3
0
80 100
VCC = 5 V
TA = 25 °C
5
6
5
WIDEBODY
VCC = 5.0 V
VO = 0.6 V
4
3
2
RL = 1 KΩ
RL = 350 Ω
1
RL = 4 KΩ
0
-60 -40 -20
0
20
40
60
80 100
TA – TEMPERATURE – °C
WIDEBODY
6
VO – OUTPUT VOLTAGE – V
VCC = 5.5 V
VO = 5.5 V
VE = 2.0 V*
IF = 250 µA
10
6
8-PIN DIP, SO-8
6
VO – OUTPUT VOLTAGE – V
IOH – HIGH LEVEL OUTPUT CURRENT – µA
15
VCC = 5 V
TA = 25 °C
5
4
RL = 350 Ω
3
RL = 1 KΩ
2
RL = 4 KΩ
1
0
0
1
2
3
4
5
6
IF – FORWARD INPUT CURRENT – mA
* FOR SINGLE
CHANNEL
PRODUCTS ONLY
0.6
0.5
IO = 16 mA
IO = 12.8 mA
0.4
0.3
0.2
IO = 9.6 mA
IO = 6.4 mA
0.1
0
-60 -40 -20
0
20
40
60
80 100
WIDEBODY
0.8
VCC = 5.5 V
VE = 2.0 V
IF = 5.0 mA
0.7
0.6
0.5
IO = 16 mA
IO = 12.8 mA
0.4
0.3
IO = 9.6 mA
IO = 6.4 mA
0.2
0.1
0
-60 -40 -20
TA – TEMPERATURE – °C
0
20
40
60
80 100
8-PIN DIP, SO-8
IF - FORWARD CURRENT - mA
IF – FORWARD CURRENT – mA
10
IF
+
VF
–
1.0
0.1
0.01
0.001
1.1
1.2
1.3
1.4
1.5
1.6
100
10
WIDEBODY
TA = 25 oC
IF
+
VF
-
1.0
0.1
0.01
0.001
1.2
1.3
1.4
1.5
1.6
1.7
VF - FORWARD VOLTAGE - V
VF – FORWARD VOLTAGE – V
8-PIN DIP, SO-8
-2.2
-2.0
-1.8
-1.6
-1.4
-1.2
0.1
1
10
100
IF – PULSE INPUT CURRENT – mA
dVF/dT – FORWARD VOLTAGE
TEMPERATURE COEFFICIENT – mV/°C
dVF/dT – FORWARD VOLTAGE
TEMPERATURE COEFFICIENT – mV/°C
Figure 6. Typical input diode forward characteristic
-2.4
WIDEBODY
-2.3
-2.2
-2.1
-2.0
-1.9
-1.8
0.1
1
10
100
IF – PULSE INPUT CURRENT – mA
Figure 7. Typical temperature coefficient of forward voltage vs. input current
15
VCC = 5.0 V
VE = 2.0 V*
VOL = 0.6 V
* FOR SINGLE
CHANNEL
PRODUCTS ONLY
60
IF = 10-15 mA
50
IF = 5.0 mA
40
20
-60 -40 -20
0
20
40
60
80 100
Figure 5. Typical low level output current vs.
temperature
1000
TA = 25 °C
100
70
TA – TEMPERATURE – °C
TA – TEMPERATURE – °C
Figure 4. Typical low level output voltage vs. temperature
1000
IOL – LOW LEVEL OUTPUT CURRENT – mA
0.7
8-PIN DIP, SO-8
VCC = 5.5 V
VE = 2.0 V*
IF = 5.0 mA
VOL – LOW LEVEL OUTPUT VOLTAGE – V
VOL – LOW LEVEL OUTPUT VOLTAGE – V
0.8
SINGLE CHANNEL
PULSE GEN.
ZO = 50 Ω
t f = t r = 5 ns
IF
INPUT
MONITORING
NODE
+5 V
1
VCC 8
2
7
3
6
4
5
0.1µF
BYPASS
GND
DUAL CHANNEL
IF
OUTPUT VO
MONITORING
NODE
VCC 8
2
7
3
6
RM
GND
IF = 7.50 mA
INPUT
IF
IF = 3.75 mA
t PHL
t PLH
OUTPUT
VO
1.5 V
Figure 8. Test circuit for tPHL and tPLH
80
tPLH , RL = 4 KΩ
tPHL , RL = 350 Ω
1 KΩ
60
4 KΩ
tPLH , RL = 1 KΩ
40
20
tPLH , RL = 350 Ω
0
-60 -40 -20
20
0
40
60
tP – PROPAGATION DELAY – ns
tP – PROPAGATION DELAY – ns
105
VCC = 5.0 V
IF = 7.5 mA
75
45
VCC = 5.0 V
IF = 7.5 mA
RL = 350Ω
0
RL = 1 kΩ
0
20
40
60
80 100
TA - TEMPERATURE - oC
Figure 11. Typical pulse width distortion vs.
temperature
16
tr, tf – RISE, FALL TIME – ns
PWD - PULSE WIDTH DISTORTION - ns
RL = 4 kΩ
-10
-60 -40 -20
tPHL , RL = 350 Ω
1 KΩ
4 KΩ
5
9
7
11
13
15
Figure 10. Typical propagation delay vs. pulse
input current
40
10
tPLH , RL = 1 KΩ
IF – PULSE INPUT CURRENT – mA
Figure 9. Typical propagation delay vs. temperature
20
tPLH , RL = 350 Ω
60
TA – TEMPERATURE – °C
30
tPLH , RL = 4 KΩ
90
30
80 100
VCC = 5.0 V
TA = 25°C
VCC = 5.0 V
IF = 7.5 mA
tRISE
tFALL
RL = 4 kΩ
300
290
60
RL = 1 kΩ
40
RL = 350 Ω
20
0
-60 -40 -20
0.1µF
BYPASS
CL*
4
*CL IS APPROXIMATELY 15 pF WHICH INCLUDES
PROBE AND STRAY WIRING CAPACITANCE.
100
+5 V
1
RL
INPUT
MONITORING
NODE
RL
*CL
RM
PULSE GEN.
Z O = 50 Ω
t f = t r = 5 ns
RL = 350 Ω, 1 kΩ, 4 kΩ
0 20 40 60 80 100
TA – TEMPERATURE – °C
Figure 12. Typical rise and fall time vs. temperature
5
OUTPUT VO
MONITORING
NODE
PULSE GEN.
Z O = 50 Ω
t f = t r = 5 ns
INPUT VE
MONITORING NODE
+5 V
7.5 mA
IF
1
VCC 8
2
7
3
6
4
5
3.0 V
0.1 µF
BYPASS
RL
1.5 V
t EHL
OUTPUT VO
MONITORING
NODE
*C L
GND
INPUT
VE
t ELH
OUTPUT
VO
1.5 V
*C L IS APPROXIMATELY 15 pF WHICH INCLUDES
PROBE AND STRAY WIRING CAPACITANCE.
tE – ENABLE PROPAGATION DELAY – ns
Figure 13. Test circuit for tEHL and tELH
120
VCC = 5.0 V
VEH = 3.0 V
VEL = 0 V
90 IF = 7.5 mA
tELH, RL = 4 kΩ
60
tELH, RL = 1 kΩ
30
tELH, RL = 350 Ω
tEHL, RL = 350 Ω, 1 kΩ, 4 kΩ
0
-60 -40 -20 0 20 40 60 80 100
TA – TEMPERATURE – °C
Figure 14. Typical enable propagation delay vs.
temperature
IF
SINGLE CHANNEL
IF
1
B
A
VFF
2
7
3
6
4
GND
DUAL CHANNEL
B
VCC 8
+5 V
0.1 µF
BYPASS
1
A
RL
5
2
7
3
6
4
VCM
GND
VCM
VCM
VO
VO
+
–
PULSE
GENERATOR
Z O = 50 Ω
VCM (PEAK)
0V
5V
+5 V
RL
VFF
OUTPUT VO
MONITORING
NODE
+
–
PULSE
GENERATOR
Z O = 50 Ω
SWITCH AT A: IF = 0 mA
VO (MIN.)
SWITCH AT B: IF = 7.5 mA
VO (MAX.)
0.5 V
Figure 15. Test circuit for common mode transient immunity and typical waveforms
17
VCC 8
CMH
CML
5
0.1 µF
BYPASS
OUTPUT VO
MONITORING
NODE
PS (mW)
700
IS (mA)
600
500
400
300
200
100
0
0
25
50
75 100 125 150 175 200
TS – CASE TEMPERATURE – °C
OUTPUT POWER – PS, INPUT CURRENT – IS
OUTPUT POWER – PS, INPUT CURRENT – IS
HCPL-2611 OPTION 060
800
HCNWXXXX
PS (mW)
IS (mA)
800
700
600
500
400
300
200
100
0
0
25
50
75
100 125 150 175
TS – CASE TEMPERATURE – °C
Figure 16. Thermal derating curve, dependence of safety limiting value with case temperature per IEC/EN/DIN EN 60747-5-5
GND BUS (BACK)
VCC BUS (FRONT)
NC
ENABLE
0.1µF
NC
OUTPUT
10 mm MAX.
(SEE NOTE 5)
Figure 17. Recommended printed circuit board layout
18
SINGLE CHANNEL
DEVICE ILLUSTRATED.
SINGLE CHANNEL DEVICE
VCC1
5V
5V
8
390 Ω
470 Ω
IF
+
D1*
2
6
VF
–
GND 1
0.1 µF
BYPASS
3
5
SHIELD
1
GND 2
VE 7
2
*DIODE D1 (1N916 OR EQUIVALENT) IS NOT REQUIRED FOR UNITS WITH OPEN COLLECTOR OUTPUT.
DUAL CHANNEL DEVICE
CHANNEL 1 SHOWN
VCC1 5 V
D1*
IF
1
7
0.1 µF
BYPASS
VF
–
GND 1
VCC2
390 Ω
+
2
5
GND 2
SHIELD
1
Figure 18. Recommended TTL/LSTTL to TTL/LSTTL interface circuit
19
5V
8
470 Ω
VCC2
2
Propagation Delay, Pulse-Width Distortion and Propagation
Delay Skew
Propagation delay is a figure of merit which describes
how quickly a logic signal propagates through a system. The propaga­tion delay from low to high (tPLH) is the
amount of time required for an input signal to propagate
to the output, causing the output to change from low to
high. Similarly, the propagation delay from high to low
(tPHL) is the amount of time required for the input signal
to propagate to the output causing the output to change
from high to low (see Figure 8).
Pulse-width distortion (PWD) results when tPLH and tPHL
differ in value. PWD is defined as the difference between tPLH and tPHL and often determines the maximum
data rate capa­bil­ity of a transmission system. PWD can
be expressed in percent by dividing the PWD (in ns) by
the minimum pulse width (in ns) being transmitted. Typically, PWD on the order of 20-30% of the minimum pulse
width is tolerable; the exact figure depends on the particular application (RS232, RS422, T-l, etc.).
Propagation delay skew, tPSK, is an important parameter to
consider in parallel data appli­ca­tions where synchroniza­
tion of signals on parallel data lines is a concern. If the
parallel data is being sent through a group of optocouplers, differ­ences in propagation delays will cause the
data to arrive at the outputs of the optocouplers at different times. If this difference in propagation delays is large
enough, it will determine the maximum rate at which
parallel data can be sent through the optocouplers.
Propagation delay skew is defined as the difference between the minimum and maximum propagation delays,
either tPLH or tPHL, for any given group of optocouplers
which are operating under the same conditions (i.e., the
same drive current, supply voltage, output load, and operating tempera­ture). As illustrated in Figure 19, if the in-
puts of a group of optocouplers are switched either ON
or OFF at the same time, tPSK is the difference between
the shortest propagation delay, either tPLH or tPHL, and the
longest propagation delay, either tPLH or tPHL.
As mentioned earlier, tPSK can determine the maximum
parallel data transmission rate. Figure 20 is the timing
diagram of a typical parallel data application with both
the clock and the data lines being sent through optocouplers. The figure shows data and clock signals at the
inputs and outputs of the optocouplers. To obtain the
maximum data transmission rate, both edges of the
clock signal are being used to clock the data; if only one
edge were used, the clock signal would need to be twice
as fast.
Propagation delay skew repre­sents the uncertainty of
where an edge might be after being sent through an
opto­coupler. Figure 20 shows that there will be uncertainty in both the data and the clock lines. It is important
that these two areas of uncertainty not overlap, otherwise the clock signal might arrive before all of the data
outputs have settled, or some of the data outputs may
start to change before the clock signal has arrived. From
these considera­tions, the absolute minimum pulse width
that can be sent through optocouplers in a parallel application is twice tPSK. A cautious design should use a slightly
longer pulse width to ensure that any additional uncertainty in the rest of the circuit does not cause a problem.
The tPSK specified optocouplers offer the advantages of
guaranteed specifications for propagation delays, pulsewidth distortion and propagation delay skew over the
recom­mended temper­a­ture, input current, and power
supply ranges.
DATA
IF
50%
INPUTS
CLOCK
1.5 V
VO
IF
VO
50%
DATA
OUTPUTS
1.5 V
t PSK
t PSK
CLOCK
t PSK
Figure 19. Illustration of propagation delay skew - tPSK
20
Figure 20. Parallel data transmission example
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Data subject to change. Copyright © 2005-2013 Avago Technologies. All rights reserved. Obsoletes AV02-0170EN
AV02-0940EN - April 16, 2013