www.fairchildsemi.com FAN8040 4-Channel Motor Driver Features Description • 4-channel Balanced Transformerless (BTL) Driver • 3-channels PWM input direct-coupled type include internal filters. • Separated power supply voltages (PVCC1: CH1 and CH2, PVCC2: CH3 and CH4) • Built-in input pin selection function of channel 4 • Built-in OP-amplifier • Built-in Power Save function • Built-in Thermal Shutdown Circuit (TSD) • Operating ranges: 4.5~ 13.2V The FAN8040G3 is a monolithic integrated circuit, suitable for 4-channel motor driver which drives tracking actuator, focus actuator, sled motor and spindle motor of compack disk player system. Typical Applications Ordering Information • Compact Disk Player (CDP) • Video Compact Disk Player (VCD) • Other Compact Disk Media 28-SSOPH-375-SG2 Package Operating Temp. FAN8040G3 28-SSOPH-375SG2 -40°C ~ +85°C FAN8040G3X 28-SSOPH-375SG2 -40°C ~ +85°C Device Rev. 1.0.0 ©2004 Fairchild Semiconductor Corporation 2 1 2 3 4 5 6 7 OPINOPIN+ SW CH1FIN CH1RIN CH2FIN CH2RIN 22 FIN GND PS PVCC2 CH3OUTR CH3OUTF CH4OUTF CH4OUTR FIN 8 9 10 11 12 13 14 CH1OUTF CH3RIN 23 CH1OUTR CH3FIN 24 CH2OUTF CH4IN 25 CH2OUTR CH4CAPA 26 PVCC1 OUTVREF 27 VREFIN OPOUT 28 GND VDD FAN8040 Pin Assignments 21 20 19 18 17 16 15 FAN8040G3 FAN8040 Pin Definitions Pin Number Pin Name I/O Pin Function Description 1 OPIN- I OP-amplifier negative input 2 OPIN+ I OP-amplifier positive input 3 SW I channel 4 input change switch input 4 CH1FIN I Channel 1 PWM forward input 5 CH1RIN I Channel 1 PWM reverse input 6 CH2FIN I Channel 2 PWM forward input 7 CH2RIN I Channel 2 PWM reverse input 8 GND - Ground 1 9 VREFIN I Internal reference voltage input terminal 10 PVCC1 - Power supply voltage for channel 1 and channel 2 11 CH2OUTR O Channel 2 reverse output 12 CH2OUTF O Channel 2 forward output 13 CH1OUTR O Channel 1 reverse output 14 CH1OUTF O Channel 1 forward output 15 CH4OUTR O Channel 4 reverse output 16 CH4OUTF O Channel 4 forward output 17 CH3OUTF O Channel 3 forward output 18 CH3OUTR O Channel 3 reverse output 19 PVCC2 - Power supply voltage for channel 3 and channel 4 20 PS I Power save signal input 21 GND - Ground 2 22 CH3RIN I Channel 3 PWM reverse input 23 CH3FIN I Channel3 PWM forward input 24 CH4IN I Channel 4 input 25 CH4CAPA I Channel 4 external capacitor connection terminal 26 OUTVREF I Channel 4 external reference voltage input terminal 27 OPOUT O Op-amplifier output 28 VDD - Predriver power supply voltage 3 FAN8040 22 50K 10K F 100K FIN R VDD VDD PS CNTL F INTERFACE 21 20 19 18 17 16 15 Bias Circuit 50K D D D D PVCC2 (CH3,4) 50K R 100K CH4OUTR CH3RIN 23 CH4OUTF CH3FIN 24 CH3OUTF CH4IN 25 CH3OUTR CH4CAPA 26 PVCC2 OUTVREF 27 PS OPOUT 28 GND VDD Internal Block Diagram 100K 25pF 19K 10K PVCC1 TSD PVCC2 VDD F INTERFACE 100K 5.3K 25pF 50K 50K 50K PS CNTL 50K R VDD R F INTERFACE F 100K 25pF PVCC1 (CH1,2) R 7 OPIN+ SW CH1FIN CH1RIN CH2FIN CH2RIN FIN 8 9 10 11 12 13 14 CH1OUTF 6 CH1OUTR 5 D CH2OUTF 4 D CH2OUTR 3 D PVCC1 2 D VREFIN 1 OPIN- R GND F D : Drive Buffer SW : H--> ON, L --> OFF 4 FAN8040 Equivalent Circuits Driver Forward Input Driver Reverse Input CH1, CH2 and CH3 4 6 CH1, CH2 and CH3 23 5 7 22 17K 17K Driver Output Internal Reference Voltage 30K 50K 11 15 12 16 13 17 14 18 9 50K 30K PS Input CH4 SW Input 3 20 50K 2K 50K 50K 5 FAN8040 Equivalent Circuits (Continued) OP- Amplifier Input 2K OP- Amplifier Output 2K 27 1 2 2K 2K External Reference Voltage Input 100K 100K 100K 24 50K 26 50K 25 10K 100K 6 FAN8040 Absolute Maximum Ratings (Ta = 25°C) Parameter Symbol Value Unit PVCC1, 2 15 V VDD 15 V PD 2.5note W Operating Temperature TOPR -40 ~ +85 °C Storage Temperature TSTG -55 ~ +150 °C Supply Voltage Predriver Supply Voltage Power Dissipation Note: 1. When mounted on a 76.2mm × 114mm × 1.57mm PCB (Phenolic resin material). 2. Power dissipation reduces 16.6mW/°C for using above Ta = 25°C 3. Do not exceed PD and SOA (Safe operating area) Power Dissipation Curve PD [mW] 3000 2500 2000 1500 SOA 1000 500 0 0 25 50 75 100 125 150 175 200 Ambient temperature, Ta[°C] Recommended Operating Condition (Ta = 25°C) Parameter Symbol Value Unit Operating Supply Voltage PVCC1, 2 4.5 ~ 13.2 V Predriver Supply Voltage VDD 4.5 ~ 13.2 V 7 FAN8040 Electrical Characteristics (Ta = 25°C) (Ta=25°C, VDD=PVCC1=PVCC2=8V, RL=8Ω, f=1kHz, unless otherwise specified) Parameter Symbol Quiescent Circuit Current1 IQ Internal Reference Input Voltage Quiescent Circuit Current2 Conditions Under no-load VREF (Note1) IPS At Power Save On Min. Typ. Max. Unit - 17.0 25.0 mA 3.40 3.70 4.0 V - 10 100 uA Power Save Off Voltage VPSOFF 2.0 - - V Power Save On Voltage VPSON - - 0.5 V BTL DRIVER PART (CH1, CH2 and CH3) Input High Level Voltage VIH 2.4 - VCC V Input Low Level Voltage VIL -0.3 - 0.5 V Input High Level Current IIH VF=VR=5V 170 310 450 uA Input Low Level Current (Forward) IILF VF=0V -10 - 0 uA Input Low Level Current (Reverse) IILR VR=0V -50 - 0 uA Output Offset Voltage VOO -30 - 30 mV 4.4 5.0 5.6 V - 70 - dB - 10 300 nA Maximum Output Voltage Ripple Rejection Ratio (Note2) VOM RR VF=5V,VR=0V VRR=100mVrms, 100Hz SPINDLE MOTOR DRIVER (CH4) Input Bias Current IB Output Offset Voltage VOO4 CH4IN=OUTVREF -50 - 50 mV Maximum Output Voltage VOM CH4IN=4V 4.8 5.4 - V Closed-loop Voltage Gain GVC 9.3 11.3 13.3 dB - 70 - dB Ripple Rejection Ratio (Note2) RR VRR=100mVrms, 100Hz ANALOG SWITCH INPUT Input High Level Voltage VIHSW 2.0 - VCC V Input Low Level Voltage VILSW -0.3 - 0.5 V Input High Level Current IIHSW VSW=3.5V - 60 90 uA Input Low Level Current IILSW VSW=0V -10 0 10 uA VOFOP -5 - +5 mA IBOP - 10 300 nA Output High Level Volatage VOHOP 7.0 - - V Output Low Level Volatage VOLOP - - 0.2 V ISINK 7.0 13.0 - mA ISOURCE 2.0 9.0 - mA VIN=60dBV, 1KHz - 65 - dB f=50KHz,2VPP(Squre) - 0.5 - V/us OP-AMPLIFIER Offset Voltage Input Bias Current Output Sink Current Output Source Current Open-loop Voltage Slew Rate (Note2) Gain(Note2) GVO SR Note : 1. when the PS(pin20) is low level (under 0.5V) the bias circuit is disabled, so that the whole circuits are disabled. 2. Guranteed Design Value 8 FAN8040 Application Information 1. Power Save Function • Power save function is also performed at PS (pin20). The truth table is as follows: VDD SW (pin3) PS (pin20) Input Function Input Function L CAPA(pin25) OFF L Power Save ON H CAPA(pin25) ON H Power Save OFF PS CNTL Bias Circuit 20 Figure 1. Truth table of Gain selection and Mute Function • When the PS (pin 20) is hige level (above 2V), the bias circuit is enable. On the other hand, when the PS(pin20) is low level (under 0.5V), the bias circuit is disabled. • When the CAPA(pin3) is low level, the CAPA (pin25) is opened in Figure. 4. 2. TSD (Thermal Shutdown) Function • When the chip temperature rises above 175°C, then the 4-channels BTL driver output circuit will be muted. The TSD circuit has the hysteresis temperature of 25°C. 4. Balanced Transformerless(BTL) Driver (CH1, CH2 and CH3) • CH1, CH2 and CH3 drive parts are composed of internal filter, V-I converter and output power amplifiers. PVCC I1 F FWD S1 Buffer1 OUT1 R1=100KΩ INTERFACE R REV S2 Buffer2 C1=25㎊ OUT2 A I2 VREF Figure 2. Schematic of BTL Driver (CH1, CH2 and CH3) F R S1 S2 L L OFF OFF L H OFF ON H L ON OFF H H ON ON H : above 2.4 [V] L : under 0.5 [V] Table 1. Truth table of internal switches operation 9 FAN8040 • Internal primary filter is composed of sourcing/sinking current source of 25uA and forward/reverse controlled switches. • It converts "FWD/REV" digital signals to analog signal as shown Figure. 2. 1V/usec FWD Input 5V 0V REV VREF Output OUTF OUTR 0V 0V 5V OUTF FWD 0V Input Output VREF OUTR REV 0V 0V Figure 3. Operartion waveforms of BTL Driver (CH1, CH2 and CH3) • If the forward input signal is high level (avobe 2.4V) and reverse input signal is low level (under 0.5V), then the forward current source switch S1and reverse current source switch S2 become turn-on and turn-off, respectively. • This causes the internal capacitor, C1, to be charged with sourcing current source of 25uA and consequently the voltage of the filter output, VA, increases with the internal time constant of 2.5usec. • VA = I1 × R1 ≈ 2.5[V ], (Or reverse input : −2.5[V ] ) • The time constant is R × C = 2.5[u sec] Where, R is 100 [㏀] and C is 25[pF]. • The output voltages of power amplifers, VOUTF and VOUTR, are given as: • 10 VOUTF = VREF + VA [V ] VOUTR = VREF − VA [V ] FAN8040 5. Channel 4 Driver (Spindle Motor Driver) • The channel 4 driver is composed of input amplifer with input selection switch, V-I converter and output power amplifiers. • The voltage, VREF, is the external reference voltage given by the bias voltage of the pin 26 in Figure. 4. • The input signal, VIN, through the CH4IN (pin24) is amplified by 100K/100K times and then fed to the next amplifier. And the amplified voltage is amplified by R2/R1 times and then the fed to the level shift circuit. • Level shifit produces the current due to the difference between the input signal and the internal power reference (PVCC/2). The current produced as + ∆I and - ∆I is fed into the driver buffer. • If it is desired to change the gain, then the CH4CAPA (pin25) can be used. It is controlld by the SW (pin3) input signal. • When the SW (pin3) is high level, then the input voltage,VIN, applied to the CH4CAPA (pin25). 100K 100K 24 R1 R2 C2 Servo Output + ∆I 26 - ∆I PVCC 50K VREF 16 D 15 Level Shift 10K C1 D R1 25 50K VREF VREF 50K 3 Figure 4. Channel 4 Spindle Driver 11 FAN8040 Typical Performance Characteristics PVCC1 vs IPVCC1 VDD vs IQ1 12 0.6 11.5 0.55 0.5 IPVCC1[mA] IQ1[mA] 11 10.5 10 9.5 0.45 0.4 0.35 9 0.3 8.5 0.25 0.2 8 5 6 7 8 9 10 11 12 13 5 14 6 7 8 PVCC2 vs IPVCC2 0.6 13 0.55 12.5 GCV[dB] 0.4 0.35 13 14 11 12 13 14 11 10.5 0.25 10 9.5 5 6 7 8 9 10 11 12 13 14 5 6 7 8 9 PVCC2[V] Temperature vs IPVCC1 15 14 13 IPVCC1[mA] 12 11 10 9 8 7 6 -20 0 20 40 Temp [°C] 10 V DD[V ] Temperature vs IQ1 IQ1[mA] 12 11.5 0.3 0.2 12 11 12 0.45 5 -40 10 VDD vs GCV 0.5 IPVCC1[mA] 9 PVCC1[V] VDD[V] 60 80 100 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -40 -20 0 20 40 Temp [°C] 60 80 100 FAN8040 Temperature vs VOM1AB IPVC2[mA] 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -40 VOM1AB[V] Temperatur vs IPVCC2 -20 0 20 40 60 80 100 6 5.8 5.6 5.4 5.2 5 4.8 4.6 4.4 4.2 4 -40 -20 0 20 Temp [°C] VOM2AB[V VOM3AB[V] -20 0 20 40 60 80 100 6 5.8 5.6 5.4 5.2 5 4.8 4.6 4.4 4.2 4 -40 -20 0 20 Temperature vs VOM4AB 100 40 60 80 100 60 80 100 Temperature vs GCV1 13 12.5 12 GCV1[dB] VOM4AB[V] 80 Temp[°C] Temp[°C] 6 5.8 5.6 5.4 5.2 5 4.8 4.6 4.4 4.2 4 -40 60 Temperature vs VOM3AB Temperature vs VOM2AB 6 5.8 5.6 5.4 5.2 5 4.8 4.6 4.4 4.2 4 -40 40 Temp [°C] 11.5 11 10.5 10 9.5 -20 0 20 40 Temp[°C] 60 80 100 9 -40 -20 0 20 40 Temp[°C] 13 FAN8040 10 9 8 7 6 5 4 3 2 1 0 -40 -20 0 20 40 Temp[°C] 14 Temperature vs ISINK ISINK[mA] ISOURCE[mA] Temperature vs ISOURCE 60 80 100 40 38 36 34 32 30 28 26 24 22 20 -40 -20 0 20 40 Temp[°C] 60 80 100 REVERSE FORWARD Power Save 2 3 F REVERSE TRACKING FORWARD REVERSE FORWARD SLED BIAS SPINDLE 1.75V 4 5 INTERFACE 10K 0.47uF 50K R R F 100K 100K F 6 7 R 100K INTERFACE PVCC R F R F PVCC 25pF PVCC TSD R F INTERFACE 22 FIN 100K 100K FIN 25pF VREF 25pF Bias Circuit 8 21 9 20 PVCC2 (CH3,4) 19 10 PVCC1 (CH1,2) 50K 50K PVCC 50K 50K 0.1uF 1 VDD 23 11 D 5.3K 10K D 13 12 PVCC D 50K 50K D D D 19K 16 17 18 PVCC VDD 24 14 D D 15 M 25 SLED MOTOR 26 M 27 SPINDLE MOTOR 28 FAN8040 Typical Application Circuits TRACKING COIL FOCUS COIL PVCC 0.1uF 0.1uF H = ON L = OFF 300pF 0.1uF 82㏀ 15㏀ FOCUS Digital Servo 15 FAN8040 Mechanical Dimensions(Unit : mm) Package Dimensions 28-SSOPH-375SG2 16 FAN8040 DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com 7/27/04 0.0m 001 Stock#DSxxxxxxxx 2004 Fairchild Semiconductor Corporation