MTMC8E2A0LBF MTMC8E2A0LBF Dual N-channel MOSFET Unit: mm For lithium-ion secondary battery protection circuit Features Low drain-source ON resistance:RDS(on)typ. = 15 mΩ (VGS = 4.5 V) Built-in gate resistor Halogen-free / RoHS compliant (EU RoHS / UL-94 V-0 / MSL:Level 1 compliant) Marking Symbol: 4B 1. Source(FET1) 2. Gate(FET1) 3. Source(FET2) 4. Gate(FET2) Packaging MTMC8E2A0LBF Embossed type (Thermo-compression sealing): 3 000 pcs / reel (standard) 5. Darin(FET1,2) 6. Darin(FET1,2) 7. Darin(FET1,2) 8. Darin(FET1,2) Panasonic JEITA Code Absolute Maximum Ratings WMini8-F1 SC-115 - Ta = 25 °C Internal Connection Parameter Drain-source Voltage FET1 Gate-source Voltage FET2 Drain Current Peak Drain Current Total Power Dissipation Overall Channel Temperature Range Storage Temperature Note: Symbol Rating Unit VDS VGS ID IDp PD1 *1 PD2 *1,*2 PD3 *3 Tch Tstg 20 ±12 7.0 42 1.0 1.2 0.4 150 -55 to +150 V V A A 8 7 FET 1 Rg *2 t = 10 s *3 Non-heat sink °C °C 1 Ver. FED FET 2 Rg 2 3 4 Pin Name 1. Source(FET1) 2. Gate(FET1) 3. Source(FET2) 4. Gate(FET2) Resistance Value Publication date: October 2012 5 W *1 Glass epoxy board: 25.4 mm × 25.4 mm × 0.8 mm Copper foil of the drain portion should have a area of 300 mm 2 or more PD absolute maximum rating Non-heat sink: 400 mW 6 5. Darin(FET1,2) 6. Darin(FET1,2) 7. Darin(FET1,2) 8. Darin(FET1,2) Rg 1 kΩ 1 MTMC8E2A0LBF Electrical Characteristics Ta = 25 °C ± 3 °C FET1,FET2 Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current Gate-source Leakage Current Gate-source Threshold Voltage Drain-source On-state Resistance Forward transfer admittance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-on Delay Time *1 Rise Time *1 Turn-off Delay Time *1 Fall Time *1 Note: Symbol VDSS IDSS IGSS Vth RDS(on)1 RDS(on)2 RDS(on)3 |Yfs| Ciss Coss Crss td(on) tr td(off) tf Conditions ID = 1.0 mA, VGS = 0 V VDS = 20 V, VGS = 0 V VGS = ±8.0 V, VDS = 0 V ID = 1.0 mA, VDS = 10 V ID = 2.0 A, VGS = 4.5 V ID = 2.0 A, VGS = 3.7 V ID = 2.0 A, VGS = 2.5 V ID = 1.0 A, VDS = -10 V VDS = 10 V, VGS = 0 V, f = 1 MHz VDD = 10 V, VGS = 0 to 4 V, ID = 1.0 A VDD = 10 V, VGS = 4 to 0 V, ID = 1.0 A Min Typ Max 0.85 15 18 22 1.0 ±10 1.30 21 25 33 20 0.40 Unit V μA μA V mΩ S 3.0 1 450 100 90 0.33 0.70 4.0 2.0 pF μs μs Measuring methods are based on JAPANESE INDUSTRIAL STANDARD JIS C 7030 Measuring methods for transistors. *1 See Test Circuit. Ver. FED 2 MTMC8E2A0LBF *1 Test Circuit VDD = 10 V ID = 1.0 A RL = 10 Ω Vin 4V PW = 10 μs D.C. ≤ 1 % Vout 0V D Rg G Vin 50 Ω S 90 % Vin 10 % 90 % Vout 10 % td(on) tr td(off) Ver. FED tf 3 MTMC8E2A0LBF 10 6 Drain Current ID (A) Drain Current ID (A) VGS = 4.5 V 5 3.7 V 4 2.5 V 3 2.0 V 2 1 8 6 Ta = 85 °C 4 25 °C 2 -30 °C 1.5 V 0 0 0 0.1 0.2 0 0.3 1 1.5 2 Gate-source Voltage VGS (V) Drain-source Voltage VDS (V) ID - VDS ID - VGS 100 Drain-source On-state Resistance RDS(on) (mΩ) 0.3 Drain-source Voltage VDS (V) 0.5 0.25 0.2 ID = 4.0A 0.15 2.0A 0.1 0.05 1.0A 0 0 2 4 6 2.5 V 3.7 V 10 VGS = 4.5 V 1 8 1 Gate-source Voltage VGS (V) 10 Drain Current ID (A) VDS - VGS RDS(on) - ID Ver. FED 4 1.5 35 Drain-source On-state Resistance RDS(on) (mΩ) Gate-source Threshold Voltage Vth (V) MTMC8E2A0LBF 1 0.5 0 3.7 V 30 2.5V 25 20 15 VGS = 4.5 V 10 5 0 -50 0 50 100 150 -50 0 Temperature Ta (°C) 50 100 150 Temperature Ta (°C) Vth - Ta RDS(on) - Ta Total Power Dissipation PD (W) 2 1.5 Measuring on ceramic substrate at 25.4 mm × 25.4 mm × 0.8 mm. 1 Non-heat sink 0.5 0 0 50 100 150 Temperature Ta (°C) PD - Ta 1000 IDp = 42 A Drain Current ID (A) Thermal Resistance Rth (°C/W) 1000 100 10 1 0.01 100 10 1 ms 1 10 ms Operation in this area is limited by RDS(on) 0.1 100 ms 1s Ta = 25 °C, Glass epoxy board (25.4 × 25.4 × ｔ0.8 mm)coated with copper foil, DC which has more than 300 mm2. 0.1 1 10 100 0.01 0.01 1000 Pulse Width tsw (s) 0.1 1 10 100 Drain-source Voltage VDS (V) Rth -tsw Safe Operating Area Ver. FED 5 MTMC8E2A0LBF WMini8-F1 Unit: mm Land Pattern (Reference) (Unit: mm) Ver. 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