November 1997 FDC6322C Dual N & P Channel , Digital FET General Description Features These dual N & P Channel logic level enhancement mode field effec transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. The device is an improved design especially for low voltage applications as a replacement for bipolar digital transistors in load switching applications. Since bias resistors are not required, this dual digital FET can replace several digital transistors with difference bias resistors. N-Ch 25 V, 0.22 A, RDS(ON) = 5 Ω @ VGS= 2.7 V. P-Ch 25 V, -0.46 A, RDS(ON) = 1.5 Ω @ VGS= -2.7 V. Very low level gate drive requirements allowing direct operation in 3 V circuits. VGS(th) < 1.5 V. Gate-Source Zener for ESD ruggedness. >6kV Human Body Model Replace NPN & PNP digital transistors. SOT-23 SuperSOTTM-6 SuperSOTTM-8 SO-8 SOIC-16 SOT-223 Mark: .322 Absolute Maximum Ratings 4 3 5 2 6 1 TA = 25oC unless other wise noted Symbol Parameter N-Channel P-Channel Units VDSS, VCC Drain-Source Voltage, Power Supply Voltage 25 -25 V VGSS, VIN Gate-Source Voltage, 8 -8 V ID, IO Drain/Output Current - Continuous 0.22 -0.46 A - Pulsed 0.5 -1 PD Maximum Power Dissipation 0.9 (Note 1a) (Note 1b) TJ,TSTG Operating and Storage Tempature Ranger ESD Electrostatic Discharge Rating MIL-STD-883D Human Body Model (100pf / 1500 Ohm) W 0.7 -55 to 150 °C 6 kV (Note 1a) 140 °C/W (Note 1) 60 °C/W THERMAL CHARACTERISTICS RθJA Thermal Resistance, Junction-to-Ambient RθJC Thermal Resistance, Junction-to-Case © 1997 Fairchild Semiconductor Corporation FDC6322C.Rev B1 DMOS Electrical Characteristics (TA = 25 OC unless otherwise noted ) Symbol Parameter Conditions Type Min VGS = 0 V, ID = 250 µA N-Ch 25 VGS = 0 V, ID = -250 µA P-Ch -25 ID= 250 µA, Referenced to 25 oC N-Ch 25 ID = -250 µA, Referenced to 25 oC P-Ch -22 N-Ch Typ Max Units OFF CHARACTERISTICS BVDSS Drain-Source Breakdown Voltage ∆BVDSS/∆TJ Breakdown Voltage Temp. Coefficient IDSS Zero Gate Voltage Drain Current VDS= 20 V, VGS= 0 V, IDSS Zero Gate Voltage Drain Current VDS =-20 V, VGS = 0 V, IGSS Gate - Body Leakage Current V mV /oC 1 TJ = 55°C µA 10 P-Ch -1 VGS = 8 V, VDS= 0 V N-Ch 100 nA VGS = -8 V, VDS= 0 V P-Ch -100 nA TJ = 55°C µA -10 ON CHARACTERISTICS (Note 2) ∆VGS(th)/∆TJ Gate Threshold Voltage Temp. Coefficient ID = 250 µA, Referenced to 25 o C VGS(th) RDS(ON) Gate Threshold Voltage Static Drain-Source On-Resistance -2.1 ID= -250 µA, Referenced to 25 C P-Ch 2.1 VDS = VGS, ID= 250 µA N-Ch 0.65 0.85 1.5 VDS = VGS, ID= -250 µA P-Ch -0.65 -0.86 -1.5 3.8 5 6.3 9 N-Ch VGS = 2.7 V, ID = 0.2 A TJ =125°C VGS = 4.5 V, ID = 0.4 A P-Ch VGS = -2.7 V, ID = -0.25 A TJ =125°C VGS = -4.5 V, ID = -0.5 A ID(ON) On-State Drain Current gFS Forward Transconductance mV / oC N-Ch o 3.1 4 1.22 1.5 1.65 2.4 0.87 1.1 N-Ch 0.2 VGS = -2.7 V, VDS = -5 V P-Ch -0.5 VDS = 5 V, ID= 0.4 A N-Ch 0.2 VDS = -5 V, ID= -0.5 A P-Ch 0.8 N-Channel N-Ch 9.5 VDS= 10 V, VGS= 0 V, P-Ch 62 f = 1.0 MHz N-Ch 6 P-Channel P-Ch 35 VDS= -10 V, VGS = 0V, N-Ch 1.3 f = 1.0 MHz P-Ch 9.5 VGS = 2.7 V, VDS = 5 V V Ω A S DYNAMIC CHARACTERISTICS Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance pF FDC6322C.Rev B1 SWITCHING CHARACTERISTICS (Note 2) Symbol Parameter Conditions Type tD(on) Turn - On Delay Time N-Channel N-Ch VDD = 6 V, ID = 0.5 A, tr Turn - On Rise Time tD(off) Turn - Off Delay Time tf Turn - Off Fall Time Total Gate Charge Qg Qgs Gate-Source Charge Qgd Gate-Drain Charge Min Typ Max Units 5 10 nS P-Ch 7 14 VGs = 4.5 V, RGEN = 50 Ω N-Ch 4.5 10 P-Ch 8 16 P-Channel N-Ch 4 8 VDD = -6 V, ID = -0.5 A, P-Ch 55 90 VGen = -4.5 V, RGEN = 50 Ω N-Ch 3.2 7 P-Ch 35 55 N-Channel N-Ch 0.49 0.7 VDS= 5 V, ID = 0.2 A, P-Ch 1 1.5 VGS = 4.5 V N-Ch 0.22 P- Channel P-Ch 0.32 VDS = -5 V, ID = -0.25 A, N-Ch 0.07 VGS = -4.5 V P-Ch 0.25 nS nS nS nC nC nC DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS Maximum Continuous Drain-Source Diode Forward Current VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 0.5 A VGS = 0 V, IS = -0.5 A (Note 2) (Note 2) N-Ch 0.5 P-Ch -0.5 N-Ch 0.97 1.3 P-Ch -0.88 -1.2 A V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. RθJA shown below for single device operation on FR-4 in still air. a. 140OC/W on a 0.125 in2 pad of 2oz copper. b. 180OC/W on a 0.005 in2 of pad of 2oz copper. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%. FDC6322C.Rev B1 Typical Electrical Characteristics: N-Channel V GS = 4.5V 1.4 R DS(on) , NORMALIZED DRAIN-SOURCE ON-RESISTANCE I D , DRAIN-SOURCE CURRENT (A) 0.5 4.0 3.5 3.0 0.4 2.7 2.5 0.3 0.2 2.0 0.1 1.5 0 0 0.5 V DS 1 1.5 2 , DRAIN-SOURCE VOLTAGE (V) 2.5 VGS = 2.0V 1.2 2.5 3.0 3.5 0 0.1 I D = 0.2A VGS = 2.7 V 1.4 1.2 1 0.8 0.5 I D = 0.2A 25°C 9 0 25 50 75 100 T , JUNCTION TEMPERATURE (°C) 125 150 3 2 2.5 3 3.5 V GS , GATE TO SOURCE VOLTAGE (V) V DS = 5.0V 0.5 T = -55°C J 25°C V GS = 0V 125°C 0.15 0.1 0.05 1 1.5 2 V GS , GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 4 Figure 4. On Resistance Variation with Gate-To- Source Voltage. I S, REVERSE DRAIN CURRENT (A) 0.2 125°C 6 0 -25 Figure 3. On-Resistance Variation with Temperature. I D , DRAIN CURRENT (A) 0.4 12 J 0 0.5 0.2 0.3 I D , DRAIN CURRENT (A) 15 R DS(on) , ON-RESISTANCE (OHM) R DS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 1.8 0.6 -50 4.5 Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. Figure 1. On-Region Characteristics. 1.6 4.0 0.8 0.6 3 2.7 1 2.5 0.2 0.1 TJ = 125°C 25°C 0.01 -55°C 0.001 0.0001 0.2 0.4 0.6 0.8 1 V SD , BODY DIODE FORWARD VOLTAGE (V) 1.2 Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDC6322C.Rev B1 Typical Electrical Characteristics: N-Channel (continued) 5 V GS , GATE-SOURCE VOLTAGE (V) 30 CAPACITANCE (pF) 20 C iss 10 C oss 5 3 f = 1 MHz 2 V GS = 0V C rss 1 0.1 0.5 1 2 5 10 ID = 0.2A 15V 3 2 1 0 25 V , DRAIN TO SOURCE VOLTAGE (V) DS 0 0.4 0.5 0.6 10 0m s 1s DC V GS = 2.7V SINGLE PULSE RθJA =See note 1b TA = 25°C 1 2 V DS SINGLE PULSE RθJA =See note 1b TA = 25°C 4 POWER (W) ID , DRAIN CURRENT (A) IT LIM N) (O S RD 0.1 0.01 0.5 0.3 5 1m 10 s ms 0.5 0.02 0.2 Figure 8. Gate Charge Characteristics. 1 0.05 0.1 Q g , GATE CHARGE (nC) Figure 7. Capacitance Characteristics. 0.2 VDS = 5V 10V 4 3 2 1 5 10 15 , DRAI N-SOURCE VOLTAGE (V) Figure 9. Maximum Safe Operating Area. 25 35 0 0.01 0.1 1 10 100 300 SINGLE PULSE TIME (SEC) Figure 10. Single Pulse Maximum Power Dissipation. FDC6322C.Rev B1 Typical Electrical Characteristics: P-Channel -1.6 VGS = -4.5V R DS(on), NORMALIZED DRAIN-SOURCE ON-RESISTANCE -3.5 -3.0 -1.25 -2.7 -2.5 -1 -0.75 -2.0 -0.5 -0.25 -1.5 V -1.4 GS = -2.0 V -1.2 -2.5 -2.7 -1 -3.0 -3.5 -4.0 -0.8 -4.5 I D , DRAIN-SOURCE CURRENT (A) -1.5 0 -0.6 0 -1 -2 -3 -4 0 -5 -0.2 V DS , DRAIN-SOURCE VOLTAGE (V) V GS = -2.7V 1.2 1 0.8 0 25 50 75 100 T J, JUNCTION TEMPERATURE (°C) 125 125°C 3 2 1 0 -25 I D = -0.5A 25°C 4 150 -1 -1.5 -2 -2.5 -3 -3.5 -4 -4.5 -5 V GS , GATE TO SOURCE VOLTAGE (V) Figure 13. On-Resistance Variation with Temperature. Figure 14. On Resistance Variation with 0.5 -1 T J = -55°C -I , REVERSE DRAIN CURRENT (A) V DS = -5V 25°C -0.75 125°C -0.5 -0.25 VGS = 0V 0.1 TJ = 125°C 25°C 0.01 -55°C S I D , DRAIN CURRENT (A) -1 5 I D = -0.25A R DS(on) , ON-RESISTANCE (OHM) R DS(ON) , NORMALIZED DRAIN-SOURCE ON-RESISTANCE 1.6 0.6 -50 -0.8 Figure 12. On-Resistance Variation with Drain Current and Gate Voltage. Figure 11. On-Region Characteristics. 1.4 -0.4 -0.6 I D , DRAIN CURRENT (A) 0 -0.5 -1 -1.5 -2 -2.5 V GS , GATE TO SOURCE VOLTAGE (V) Figure 15. Transfer Characteristics. -3 0.0001 0 0.2 0.4 0.6 0.8 1 -V SD , BODY DIODE FORWARD VOLTAGE (V) 1.2 Figure 16. Body Diode Forward Voltage Variation with Source Current and Temperature. FDC6322C.Rev B1 Typical Electrical Characteristics: P-Channel (continued) 2 VDS = 5V I D = -0.25A -I D , DRAIN CURRENT (A) 3 2 1 0 0 0.2 0.4 0.6 0.8 1 1m 10 s m s 1 10V 15V 4 1.2 0.3 R O N) LI M 1s 0.1 10 0m s VGS = -2.7V SINGLE PULSE RθJA = See Note 1b A T A = 25°C 0.03 0.01 0.1 1.4 ( DS IT DC -V GS , GATE-SOURCE VOLTAGE (V) 5 0.2 Q g , GATE CHARGE (nC) 0.5 1 2 5 10 15 25 35 - VDS , DRAIN-SOURCE VOLTAGE (V) Figure 18. Maximum Safe Operating Area. Figure 17. Gate Charge Characteristics. 150 5 POWER (W) 40 Coss 20 f = 1 MHz 10 V GS = 0 V 5 0.1 0.5 1 2 5 10 3 2 1 Crss 0.2 SINGLE PULSE RθJA =See note 1b TA = 25°C 4 Ciss 60 0 0.01 25 0.1 -V DS , DRAIN TO SOURCE VOLTAGE (V) 1 10 100 300 SINGLE PULSE TIME (SEC) Figure 20. Single Pulse Maximum Power Dissipation. Figure 19. Capacitance Characteristics. 1 r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE CAPACITANCE (pF) 100 0.5 D = 0.5 0.2 0.2 0.1 0.05 0.02 0.01 0.0001 RθJA (t) = r(t) * R θJA R θJA = See Note 1b 0.1 P(pk) 0.05 t1 0.02 0.01 Single Pulse t2 TJ - T = P * R JA(t) θ Duty Cycle, D = t 1/ t 2 A 0.001 0.01 0.1 1 10 100 300 t 1, TIME (sec) Figure 21. Transient Thermal Response Curve. Note: Thermal characterization performed using the conditions described in note 1b.Transient thermal response will change depending on the circuit board design. FDC6322C.Rev B1