Intersil ICM7242 Long range fixed timer Datasheet

ICM7242
Long Range Fixed Timer
November 1996
Features
Description
• Replaces the 2242 in Most Applications
The ICM7242 is a CMOS timer/counter circuit consisting of
an RC oscillator followed by an 8-bit binary counter. It will
replace the 2242 in most applications, with a significant
reduction in the number of external components.
• Timing From Microseconds to Days
• Cascadable
• Monostable or Astable Operation
• Wide Supply Voltage Range . . . . . . . . . . . . . . 2V to 16V
Three outputs are provided. They are the oscillator output,
and buffered outputs from the first and eighth counters.
• Low Supply Current. . . . . . . . . . . . . . . . . . . 115µA at 5V
Pinout
Ordering Information
PART NUMBER
(BRAND)
TEMP.
RANGE (oC)
PACKAGE
ICM7242
(PDIP, SOIC)
TOP VIEW
PKG.
NO.
ICM7242IPA
-25 to 85
8 Ld PDIP
E8.3
ICM7242CBA
(7242CBA)
0 to 70
8 Ld SOIC
M8.15
VDD
1
8
TB I/O
÷2 OUT
2
7
RC
÷128/256 OUT
3
6
TRIGGER
VSS
4
5
RESET
Functional Diagram
R1
50K
Q
CL
+
R3
50K
RC
Q
S
Q
S
S
R
S
Q
R
Q
Q
-
7
Q
CL
Q
S
-
Q
CL
Q
+
R2
86K
Q
CL
CL
Q
CL
Q
S
Q
CL
Q
S
Q
CL
Q
S
Q
S
1
4
8
5
6
VDD
VSS
TB I/O
RESET
TRIGGER
2
3
÷2 OUT ÷128/256
OUTPUT
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
8-163
File Number
2866.2
ICM7242
Absolute Maximum Ratings
Thermal Information
Supply Voltage (VDD to VSS) . . . . . . . . . . . . . . . . . . . . . . . . . . . 18V
Input Voltage (Note 1)
Terminals (Pins 5, 6, 7, 8) . . . . . . . . . .(VSS -0.3V) to (VDD +0.3V)
Continuous Output Current (Each Output) . . . . . . . . . . . . . . . . 50mA
Thermal Resistance (Typical, Note 2)
θJA (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
100
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
160
Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
Operating Conditions
Temperature Range
ICM7242I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25oC to 85oC
ICM7242C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0oC to 70oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Due to the SCR structure inherent in the CMOS process, connecting any terminal to voltages greater than VDD or less than VSS may cause
destructive device latchup. For this reason, it is recommended that no inputs from external sources not operating on the same supply be
applied to the device before its supply is established and, that in multiple supply systems, the supply to the ICM7242 be turned on first.
2. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
VDD = 5V, TA = 25oC, R = 10kΩ, C = 0.1µF, VSS = 0V, Unless Otherwise Specified
PARAMETER
SYMBOL
Guaranteed Supply Voltage
VDD
Supply Current
IDD
TEST CONDITIONS
MIN
TYP
MAX
UNITS
2
-
16
V
Reset
-
125
-
µA
Operating, R = 10kΩ, C = 0.1µF
-
340
800
µA
Operating, R = 1MΩ, C = 0.1µF
-
220
600
µA
TB Inhibited, RC Connected to VSS
-
225
-
µA
-
5
-
%
Timing Accuracy
RC Oscillator Frequency Temperature
Drift
∆f/∆t
Independent of RC Components
-
250
-
ppm/oC
Time Base Output Voltage
VOTB
ISOURCE = 100µA
-
3.5
-
V
ISINK = 1.0mA
-
0.40
-
V
Time Base Output Leakage Current
ITBLK
RC = Ground
-
-
25
µA
Trigger Input Voltage
VTRIG
VDD = 5V
-
1.6
2.0
V
VDD = 15V
-
3.5
4.5
V
VDD = 5V
-
1.3
2.0
V
VDD = 15V
-
2.7
4.0
V
-
10
-
µA
-
1
-
MHz
2
6
-
MHz
-
13
-
MHz
Reset Input Voltage
Trigger/Reset Input Current
Max Count Toggle Rate
VRST
ITRIG, IRST
fT
VDD = 2V
VDD = 5V
Counter/Divider Mode
VDD = 15V
50% Duty Cycle Input with Peak to Peak
Voltages Equal to VDD and VSS
Output Saturation Voltage
Output Sourcing Current
VSAT
All Outputs Except TB Output VDD = 5V,
IOUT = 3.2mA
-
0.22
0.4
V
ISOURCE
VDD = 5V Terminals 2 and 3, VOUT = 1V
-
300
-
µA
10
-
-
pF
1K
-
22M
Ω
MIN Timing Capacitor (Note 3)
CT
Timing Resistor Range (Note 3)
RT
VDD = 2 - 16V
NOTE:
3. For design only, not tested.
8-164
ICM7242
Test Circuit
VDD
÷21 (RC/2) OUTPUT
÷28 (RC/256) OUTPUT
1
8
2
7
3
6
4
5
TIME BASE INPUT/OUTPUT
VDD
C
RESET
R
TRIGGER
TIME BASE PERIOD = 1.0RC;
1s = 1MΩ x 1µF
NOTE:
4. ÷21 and ÷28 outputs are inverters and have active pullups.
Application Information
Operating Considerations
Shorting the RC terminal or output terminals to VDD may
exceed dissipation ratings and/or maximum DC current limits
(especially at high supply voltages).
There is a limitation of 50pF maximum loading on the TB I/O
terminal if the timebase is being used to drive the counter
section. If higher value loading is used, the counter sections
may miscount.
For greatest accuracy, use timing component values shown
in Figure 8. For highest frequency operation it will be desirable to use very low values for the capacitor; accuracy will
decrease for oscillator frequencies in excess of 200kHz.
The timing diagram for the ICM7242 is shown in Figure 1.
Assuming that the device is in the RESET mode, which
occurs on power up or after a positive signal on the RESET
terminal (if TRIGGER is low), a positive edge on the trigger
input signal will initiate normal operation. The discharge
transistor turns on, discharging the timing capacitor C, and
all the flip-flops in the counter chain change states. Thus, the
outputs on terminals 2 and 3 change from high to low states.
After 128 negative timebase edges, the ÷28 output returns to
the high state.
The timing capacitor should be connected between the RC
pin and the positive supply rail, VDD , as shown in Figure 1.
When system power is turned off, any charge remaining on
the capacitor will be discharged to ground through a large
internal diode between the RC node and VSS. Do NOT reference the timing capacitor to ground, since there is no high
current path in this direction to safely discharge the capacitor
when power is turned off. The discharge current from such a
configuration could potentially damage the device.
When driving the counter section from an external clock, the
optimum drive waveform is a square wave with an amplitude
equal to the supply voltage. If the clock is a very slow ramp
triangular, sine wave, etc., it will be necessary to “square up”
the waveform; this can be done by using two CMOS inverters in series, operating from the same supply voltage as the
ICM7242.
The ICM7242 is a non-programmable timer whose principal
applications will be very low frequency oscillators and long
range timers; it makes a much better low frequency oscillator/timer than a 555 or ICM7555, because of the on-chip
8-bit counter. Also, devices can be cascaded to produce
extremely low frequency signals.
Because outputs will not be ANDed, output inverters are
used instead of open drain N-Channel transistors, and the
external resistors used for the 2242 will not be required for
the ICM7242. The ICM7242 will, however, plug into a socket
for the 2242 having these resistors.
8-165
TRIGGER INPUT
(TERMINAL 6)
TIMEBASE INPUT
(TERMINAL 8)
÷ 2 OUTPUT
(TERMINAL 2)
128RC
÷ 128/256 OUTPUT
(TERMINAL 3) (ASTABLE
OR “FREE RUN” MODE)
128RC
÷ 128/256 OUTPUT
(TERMINAL 3)
(MONOSTABLE
OR “ONE SHOT” MODE)
128RC
FIGURE 1. TIMING DIAGRAMS OF OUTPUT WAVEFORMS
FOR THE ICM7242 (COMPARE WITH FIGURE 5)
VDD
fIN/2
OUTPUTS
fIN/256
fIN
1
8
2
7
3
6
4
5
≥3/4 (V+)
≤1/4 (V+)
VDD
FIGURE 2. USING THE ICM7242 AS A RIPPLE COUNTER
(DIVIDER)
ICM7242
To use the 8-bit counter without the timebase, Terminal 7
(RC) should be connected to ground and the outputs taken
from Terminals 2 and 3.
The ICM7242 may be used for a very low frequency square
wave reference. For this application the timing components
are more convenient than those that would be required by a
555 timer. For very low frequencies, devices may be cascaded (see Figure 3).
Comparing the ICM7242 With the 2242
ICM7242
Operating Voltage
2V - 16V
4V - 15V
-25oC to 85oC
0oC to 70oC
0.7mA (Max)
7mA (Max)
TB Output
No
Yes
÷2 Output
No
Yes
÷256 Output
No
Yes
3.0MHz
0.5MHz
Resistor to Inhibit Oscillator
No
Yes
Resistor in Series with Reset for
Monostable Operation
No
Yes
Capacitor TB Terminal for HF
Operation
No
Sometimes
Operating Temperature Range
Supply Current, VDD = 5V
Pullup Resistors
VDD
1
8
2
R
1
8
7
2
7
3
6
3
6
4
5
4
5
C
ICM7242
Toggle Rate
ICM7242
f = RC/216
FIGURE 3. LOW FREQUENCY REFERENCE (OSCILLATOR)
For monostable operation the ÷28 output is connected to the
RESET terminal. A positive edge on TRIGGER initiates the
cycle (NOTE: TRIGGER overrides RESET).
1
8
2
7
3
4
C
STOP
TRIGGER
6
5
S1
ICM7242
START
WAIT
5s
ENABLE
10s
ENABLE
5s
COUNT
TO 185
WAIT
5s
ICM7242
ICM7240
ICM7242
START
RESET
100kΩ
TRIGGER
ICM7242
R
ICM7242
OUTPUT
By selection of R and C, a wide variety of sequence timing
can be realized. A typical flow chart for a machine tool controller could be as shown in Figure 5.
TRIGGERING CAN BE
OBTAINED FROM A
PREVIOUS STAGE, A
LIMIT SWITCH, OPERATOR SWITCH, ETC.
VDD
2242
STOP
WAIT
5s
TERMINAL 8
OUTPUT
TERMINAL 3
WAIT
5s
COUNT
TO 185
ENABLE
5s
FIGURE 5. FLOW CHART FOR MACHINE TOOL CONTROLLER
TERMINAL 6
TB OUTPUT
ENABLE
10s
FIGURE 4. MONOSTABLE OPERATION
The ICM7242 is superior in all respects to the 2242 except
for initial accuracy and oscillator stability. This is primarily
due to the fact that high value p- resistors have been used
on the ICM7242 to provide the comparator timing points.
By cascading devices, use of low cost CMOS AND/OR gates
and appropriate RC delays between stages, numerous
sequential control variations can be obtained. Typical applications include injection molding machine controllers, phonograph record production machines, automatic sequencers
(no metal contacts or moving parts), milling machine controllers, process timers, automatic lubrication systems, etc.
Sequence Timing
• Process Control
• Machine Automation
• Electro-Pneumatic Drivers
• Multi Operation (Serial or Parallel Controlling)
8-166
ICM7242
VDD
VDD
R (NOTE)
C
TRIGGER
VDD
R (NOTE)
C
A
6
S1
50K
3
ICM7242
A
33K
10K
ICM7242
B
33K
10K
100pF
3
ICM7242
C
5
100pF
6
33K
5
10K
D
100pF
TRIGGER
128RC
OUTPUT A (NOTE)
128RC
OUTPUT B (NOTE)
128RC
OUTPUT C (NOTE)
128RC
OUTPUT D (NOTE)
NOTE: Select RC values for desired “ON TIME” for each ICM7242.
FIGURE 6. SEQUENCE TIMER
8-167
ON TIMEC
33K
5
100pF
MUST BE SHORTER THAN “ON TIMEA”
ON TIMEB
3
ICM7242
PUSH S1 TO START SEQUENCE:
ON TIMEA
D
1µF
6
3
R (NOTE)
C
C
1µF
6
5
R (NOTE)
C
B
1µF
VDD
VDD
ON TIMED
ICM7242
Typical Performance Curves
100M
260
240
TA = -20oC
10M
TIMING RESISTOR, R (Ω)
SUPPLY CURRENT (µA)
220
200
180
TA = 25oC
160
140
TA = 75oC
120
100
80
60
RECOMMENDED RANGE OF
TIMING COMPONENT VALUES
100k
10k
1k
RESET MODE
40
1M
TA = 25oC
20
100
100pF 0.001
0
0
2
4
6
8
10
12
14
16
0.01
FIGURE 7. SUPPLY CURRENT vs SUPPLY VOLTAGE
VDD = 5.0V
1,000µ
TRIGGER PULSE WIDTH (ns)
CAPACITANCE (F)
TA = 25oC
10kΩ
10µ
100kΩ
1µ
0.1µ
0.01µ
1MΩ
1kΩ
0.001µ
100p
10MΩ
10p
1p
0.1
1
10
100
1K
10K
100K
1M
1500
1400
1300
1200
1100
1000
900
800
700
600
500
400
300
200
100
0
10M
VDD = 16V
VDD = 5V
VDD = 2V
0
1
2
3
VDD = 5V
VDD = 2V
VDD = 16V
2
3
4
5
6
7
RESET AMPLITUDE (V)
4
5
6
7
8
9
10
8
FIGURE 11. MINIMUM RESET PULSE WIDTH vs RESET
AMPLITUDE
9
FIGURE 10. MINIMUM TRIGGER PULSE WIDTH vs TRIGGER
AMPLITUDE
NORMALIZED FREQUENCY DEVIATION (%)
RESET PULSE WIDTH (ns)
TA = 25oC
1
1000 10,000
TRIGGER AMPLITUDE (V)
FIGURE 9. TIMEBASE FREE RUNNING FREQUENCY vs R AND C
0
100
TA = 25oC
TIME BASE FREQUENCY (Hz)
1500
1400
1300
1200
1100
1000
900
800
700
600
500
400
300
200
100
0
10
FIGURE 8. RECOMMENDED RANGE OF TIMING COMPONENT
VALUES FOR ACCURATE TIMING
10,000µ
100µ
1
0.1
TIMING CAPACITOR, C (µF)
SUPPLY VOLTAGE (V)
+10.0
TA = 25oC
+8.0
+6.0
+4.0
+2.0
0.0
-2.0
C
0.001µF
100pF
0.1µF
0.001µF
0.01µF
0.01µF
-4.0
-6.0
-8.0
-10.0
2
10
R
10kΩ
1MΩ
1kΩ
100kΩ
10kΩ
100kΩ
4
6
8
10
12
14
SUPPLY VOLTAGE (V)
16
18
FIGURE 12. NORMALIZED FREQUENCY STABILITY IN THE
ASTABLE MODE vs SUPPLY VOLTAGE
8-168
20
ICM7242
(Continued)
100M
+5
+4
MAXIMUM DIVIDER FREQUENCY (Hz)
NORMALIZED FREQUENCY DEVIATION (%)
Typical Performance Curves
5V ≤ VDD ≤ 15V
+3
R = 10MΩ
C = 0.1µF
+2
+1
R = 1kΩ
C = 0.1µF
0
-1
-2
-3
-4
-5
-25
10M
TA = 25oC
RC CONNECTED
TO GROUND
1M
100K
10K
0
25
50
75
0
2
4
TEMPERATURE (oC)
12
14
16
18
20
100
TA = 25oC
OUTPUT SATURATION CURRENT (mA)
DISCHARGE SINK CURRENT (mA)
10
FIGURE 14. MAXIMUM DIVIDER FREQUENCY vs SUPPLY
VOLTAGE
VDD = 15V
VDD = 5V
10
VDD = 2V
1
0.1
0.01
8
SUPPLY VOLTAGE (V)
FIGURE 13. NORMALIZED FREQUENCY STABILITY IN THE
ASTABLE MODE vs TEMPERATURE
100
6
0.1
1
DISCHARGE SATURATION VOLTAGE (V)
VDD = 15V
VDD = 5V
10
VDD = 2V
1
0.1
0.01
10
FIGURE 15. DISCHARGE OUTPUT CURRENT vs DISCHARGE
OUTPUT VOLTAGE
TA = 25oC
0.1
1
OUTPUT SATURATION VOLTAGE (V)
FIGURE 16. OUTPUT SATURATION CURRENT vs OUTPUT
SATURATION VOLTAGE
8-169
10