AVAGO HFBR-5912EZ 850 nm vcsel small form factor mt-rj fiber optic transceivers for gigabit ethernet Datasheet

HFBR-5912EZ
850 nm VCSEL Small Form Factor MT-RJ Fiber Optic Transceivers
for Gigabit Ethernet
Data Sheet
Description
Features
The HFBR-5912EZ transceiver from Avago
Technologies allows the system designer to
implement a range of solutions for multimode and
single mode Gigabit Ethernet applications.
• RoHS Compliance
The transceivers are configured in the new
multisourced industry standard 2 x 5 dual-in-line
package with an integral MT-RJ fiber connector.
Transmitter Section
The transmitter section of the HFBR-5912EZ
consists of an 850 nm Vertical Cavity Surface
Emitting Laser (VCSEL) in an optical subassembly
(OSA), which mates to the fiber cable.
• Compliant with Specifications for IEEE 802.3z/ Gigabit
Ethernet
• Multisourced 2 x 5 Package Style with Integral MT-RJ
Connector
• Performance HFBR-5912EZ (1000 Base-SX)
– 220 m Links in 62.5/125 µm MMF 160 MHz*km
Cables
– 275 m Links in 62.5/125 µm MMF 200 MHz*km
Cables
– 500 m Links in 50/125 µm MMF 400 MHz*km Cables
– 550 m Links in 50/125 µm MMF 500 MHz*km Cables
Receiver Section
• IEC 60825-1 Class 1/CDRH Class 1 Laser Eye Safe
The receiver of the HFBR-5912EZ includes a
GaAs PIN photodiode mounted together with a
custom, silicon bipolar transimpedance preamplifier
IC in an OSA. This OSA is mated to a custom
silicon bipolar circuit that provides postamplification and quantization.
• Single +3.3 V Power Supply Operation with PECL Logic
I/O Interfaces, TTL Signal Detect and Transmit Disable
The post-amplifier also includes a Signal Detect
circuit which provides a TTL logic-high output
upon detection of an optical signal.
• Switched Backbone Applications
• Wave Solder and Aqueous Wash Process Compatible
Applications
• Switch to Switch Interface
• High Speed Interface for File Servers
• High Performance Desktops
Related Products
• Physical Layer ICs Available for Optical or Copper
Interface (HDMP-1636A/1646A)
• Quad SERDES IC Available for High Density Interfaces
(HDMP-1680)
• 1x9 Fiber Optic Transceivers for Gigabit Ethernet
(AFBR/HFCT-53D5Z)
• Gigabit Interface Converters (GBIC) for Gigabit
Ethernet - SX – AFBR-5601Z, LX – AFCT-5611Z
APPLICATION SUPPORT
Electrostatic Discharge (ESD)
Package and Handling Instructions
There are two design cases in which immunity
to ESD damage is important.
Flammability
The HFBR-5912EZ transceiver housing consists
of high strength, heat resistant, chemically
resistant, and UL 94 V-0 flame retardant plastic
and metal packaging.
Recommended Solder and Wash Process
The HFBR-5912EZ is compatible with industrystandard wave or hand solder processes.
Process plug
The first case is during handling of the transceiver
prior to mounting it on the circuit board. It is
important to use normal ESD handling precautions
for ESD sensitive devices. These precautions
include using grounded wrist straps, work
benches, and floor mats in ESD controlled areas.
The transceiver perform-ance has been shown
to provide adequate performance in typical
industry production environments.
This transceiver is supplied with a process plug
for protection of the optical port within the
MT-RJ connector receptacle. This process plug
prevents contamination during wave solder and
aqueous rinse as well as during handling, shipping
and storage. It is made of a high-temperature,
molded sealing material that can withstand +80°C
and a rinse pressure of 110 lbs per square inch.
The second case to consider is static discharges
to the exterior of the equipment chassis containing
the transceiver parts. To the extent that the
MT-RJ connector receptacle is exposed to the
outside of the equipment chassis it may be
subject to whatever system-level ESD test criteria
that the equipment is intended to meet. The
transceiver performance is more robust than
typical industry equipment requirements of today.
Recommended Solder fluxes
Electromagnetic Interference (EMI)
Solder fluxes used with the HFBR-5912EZ should
be water-soluble, organic fluxes. Recommended
solder fluxes include Lonco 3355-11 from London
Chemical West, Inc. of Burbank, CA, and 100
Flux from Alpha-Metals of Jersey City, NJ.
Most equipment designs utilizing these highspeed transceivers from Avago Technologies will
be required to meet the requirements of FCC
in the United States, CENELEC EN55022 (CISPR
22) in Europe and VCCI in Japan. Refer to
EMI section (page 5) for more details.
Recommended Cleaning/Degreasing Chemicals
Alcohols: methyl, isopropyl, isobutyl.
Aliphatics: hexane, heptane
Other: naphtha.
Do not use partially halogenated hydrocarbons
such as 1,1.1 trichloroethane, ketones such as
MEK, acetone, chloroform, ethyl acetate, methylene
dichloride, phenol, methylene chloride, or
N-methylpyrolldone. Also, Avago Technologies
does not recommend the use of cleaners that
use halogenated hydrocarbons because of their
potential environmental harm.
Regulatory Compliance
(See the Regulatory Compliance Table for
transceiver performance) The overall equipment
design will determine the certification level. The
transceiver performance is offered as a figure of
merit to assist the designer in considering their
use in equipment designs.
2
Immunity
Equipment utilizing these transceivers will be
subject to radio-frequency electromagnetic fields
in some environments. These transceivers have
good immunity to such fields due to their
shielded design.
Eye Safety
These laser-based transceivers are classified as
AEL Class I (U.S. 21 CFR(J) and AEL Class 1
per EN 60825-1 (+A11). They are eye safe
when used within the data sheet limits per
CDRH. They are also eye safe under normal
operating conditions and under all reasonably
foreseeable single fault conditions per EN608251. Avago Technologies has tested the transceiver
design for compliance with the requirements
listed below under normal operating conditions
and under single fault conditions where
applicable. TUV Rheinland has granted
certification to these transceivers for laser eye
safety and use in EN 60950 and EN 60825-2
applications. Their performance enables the
transceivers to be used without concern for
eye safety up to 5.0 V transmitter VCC.
CAUTION:
Optical Power Budget and Link Penalties
There are no user serviceable parts nor any
maintenance required for the HFBR-5912EZ. All
adjustments are made at the factory before shipment
to our customers. Tampering with or modifying the
performance of the HFBR-5912EZ will result in
voided product warranty. It may also result in
improper operation of the HFBR-5912EZ circuitry,
and possible overstress of the laser source. Device
degradation or product failure may result.
The worst-case Optical Power Budget (OPB) in dB
for a fiber-optic link is determined by the difference
between the minimum transmitter output optical
power (dBm avg) and the minimum receiver
sensitivity (dBm avg). This OPB provides the
necessary optical signal range to establish a working
fiber-optic link. The OPB is allocated for the fiberoptic cable length and the corre-sponding link
penalties. For proper link performance, all penalties
that affect the link performance must be accounted
for within the link optical power budget. The
Gigabit Ethernet IEEE 802.3z standard identifies,
and has modeled, the contributions of these OPB
penalties to establish the link length requirements
for 50/125 µm and 62.5/125 µm multimode fiber
usage. Refer to the IEEE 802.3z standard and its
supplemental documents that develop the model,
empirical results and final specifications.
Connection of the HFBR-5912EZ to a non-approved
optical source, operating above the recommended
absolute maximum conditions or operating the HFBR5912EZ in a manner inconsistent with its design
and function may result in hazardous radiation
exposure and may be considered an act of modifying
or manufacturing a laser product. The person(s)
performing such an act is required by law to
recertify and reidentify the laser product under the
provisions of U.S. 21 CFR (Subchapter J).
Regulatory Compliance
Feature
Electrostatic Discharge
(ESD) to the
Electrical Pins
Electrostatic Discharge
(ESD) to the MT-RJ
Receptacle
Electromagnetic
Interference (EMI)
Immunity
Laser Eye Safety
and Equipment Type
Testing
Component
Recognition
RoHS Compliance
3
Test Method
MIL-STD-883C
Method 3015.4
Performance
Class 1 (>1500 V).
Variation of IEC 61000-4-2
Typically withstand at least 15 kV without damage when
the MT-RJ connector receptacle is contacted by a
Human Body Model probe.
FCC Class B
Margins are dependent on customer board and chassis
CENELEC EN55022 Class B (CISPR designs.
22A)
VCCI Class I
Variation of IEC 61000-4-3
Typically show no measurable effect from a
10 V/m field swept from 80 to 1000 MHz applied to the
transceiver without a chassis enclosure.
US 21 CFR, Subchapter J
AEL Class I, FDA/CDRH
per Paragraphs 1002.10
HFBR-5912EZ Accession # 9720151-09
and 1002.12
EN 60825-1: 1994 +A11
EN 60825-2: 1994
EN 60950: 1992+A1+A2+A3
Underwriters Laboratories and
Canadian Standards Association
Joint Component Recognition for
Information Technology Equipment
Including Electrical Business
Equipment.
AEL Class 1, TUV Rheinland of North America
HFBR-5912EZ: Certificate # E9971083.01
Protection Class III
UL File # E173874
Less than 1000 ppm of cadmium, lead, mercury,
hexavalent chromium, polybrominated biphenyls, and
polybrominated biphenyl ethers.
Data Line Interconnections
Electrical and Mechanical Interface
Avago Technologies’ HFBR-5912EZ fiber-optic
transceiver is designed to couple to +3.3 V
PECL signals. In order to reduce the number
of passive components required on the
customer’s board, Avago Technologies has
included the functionality of the external
transmitter bias resistors and coupling capacitors
within the fiber optic module. The transceiver
is compatible with a “dc-coupled” configuration
and Figure 3 depicts the circuit options.
Additionally, there is an internal, 50 Ohm
termination resistance within the transmitter
input section. The transmitter driver circuit
regulates the output optical power. The regulated
light output will maintain a constant output
optical power provided the data pattern is
reasonably balanced in duty factor. If the data
duty factor has long, continuous state times
(low or high data duty factor), then the output
optical power will gradually change its average
output optical power level to its preset value.
Recommended Circuit
Per the multisource agreement, the HFBR-5912EZ
feature a transmit disable function which is a
single-ended +3.3 V TTL input signal dc-coupled
to pin 8.
As for the receiver section, it is internally accoupled between the preamplifier and the postamplifier stages. The actual Data and Data-bar
outputs of the post-amplifier are dc-coupled to
their respective output pins (pins 4, 5). Signal
Detect is a single-ended, +3.3 V TTL output
signal that is dc-coupled to pin 3 of the
module. Signal Detect should not be ac-coupled
externally to the follow-on circuits because of
its infrequent state changes.
Caution should be taken to account for the
proper intercon-nection between the supporting
Physical Layer integrated circuits and this HFBR5912EZ transceiver. Figure 3 illustrates a
recommended interface circuit for interconnecting
to a +3.3 V dc PECL fiber-optic transceiver.
Figure 3 shows the recommended interface for
deploying the Avago Technologies transceiver
in a +3.3 V system. Also present are power
supply filtering arrangements which comply with
the recommendations of the small form factor
multisource agreement. This configuration ensures
noise rejection compatibility between transceivers
from various vendors.
Power Supply Filtering and Ground Planes
It is important to exercise care in circuit
board layout to achieve optimum performance
from these transceivers. Figure 3 shows the
recommended power supply filter circuit for
the SFF transceiver. It is further recommended
that a contiguous ground plane be provided in
the circuit board directly under the transceiver
to provide a low inductance ground for signal
return current. This recommendation is in
keeping with good high frequency board layout
practices.
The HFBR-5912E is designed to cope with the
electrically noisy environment inside the chassis
box of Gigabit data communication systems.
To minimize the impact of conducted and
radiated noise upon receiver performance the
metal cover at the rear of the HFBR-5912EZ
should be connected to the host system’s circuit
common ground plane.
To maximize the
shielding effectiveness and minimize the radiated
emissions that escape from the host system’s
chassis box the metal shield that covers the
MT-RJ receptacle should make electrical contact
with the aperture required for the optical
connector. The metal cover at the rear of the
fiber-optic module is dielectrically isolated from
the metal shield that covers the
MT-RJ receptacle to avoid conflicts between
circuit and chassis common.
Package footprint and front panel considerations
The Avago Technologies transceiver complies
with the circuit board “Common Transceiver
Footprint” hole pattern defined in the original
multisource announcement which defined the 2
x 5 package style. This drawing is reproduced
in Figure 5 with the addition of ANSI Y14.5M
compliant dimensioning to be used as a guide
in the mechanical layout of your circuit board.
Figure 6 shows the front panel dimensions
associated with such a layout.
4
Eye Safety Circuit
For an optical transmitter device to be eyesafe in the event of a single fault failure, the
transmit-ter must either maintain eye-safe
operation or be disabled.
In the HFBR-5912EZ there are three key
elements to the laser driver safety circuitry: a
monitor diode, a window detector circuit, and
direct control of the laser bias. The window
detection circuit monitors the average optical
power using the monitor diode. If a fault
occurs such that the transmitter dc regulation
circuit cannot maintain the preset bias conditions
for the laser emitter within ± 20%, the
transmitter will automatically be disabled. Once
this has occurred, an electrical power reset or
toggling the transmit disable will allow an
attempted turn-on of the transmitter. If fault
remains the transmitter will stay disabled.
Signal Detect
The Signal Detect circuit provides a TTL low
output signal when the optical link is broken
or when the transmitter is OFF as defined by
the Gigabit Ethernet specification IEEE 802.3z,
Table 38.1. The Signal Detect threshold is set
to transition from a high to low state between
the minimum receiver input optional power
and -30 dBm avg. input optical power indicating
a definite optical fault (e.g. unplugged connector
for the receiver or transmitter, broken fiber, or
failed far-end transmitter or data source). A
Signal Detect indicating a working link is
functional when receiving encoded 8B/10B
characters. The Signal Detect does not detect
receiver data error or error-rate. Data errors
can be determined by signal processing offered
by upstream PHY ICs.
Electromagnetic Interference (EMI)
One of a circuit board designer’s foremost
concerns is the control of electromagnetic
emissions from electronic equipment. Success
in controlling generated Electromagnetic
Interference (EMI) enables the designer to pass
a governmental agency’s EMI regulatory standard
and more importantly, it reduces the possibility
of interference to neighboring equipment. Avago
Technologies has designed the HFBR-5912EZ to
provide excellent EMI performance. The EMI
5
performance of a chassis is dependent on
physical design and features which help improve
EMI suppression. Avago Technologies encourages
using standard RF suppression practices and
avoiding poorly EMI-sealed enclosures.
Radiated Emissions for the HFBR-5912EZ have
been tested successfully in several environments.
While this number is important for system
designers in terms of emissions levels inside a
system, Avago Technologies recognizes that the
performance of most interest to our customers
is the emissions levels, which could be expected
to radiate to the outside world from inside a
typical system.
In their application, SFF
transceivers are intended for use inside an
enclosed system, protruding through the specified
panel opening at the specified protrusion depth.
Along with the system advantage of high port
density comes the increase in the number of
apertures. Careful attention must be paid to
the locations of high-speed clocks or gigabit
circuitry with respect to these apertures. While
experimental measurements and experiences do
not indicate any specific transceiver emissions
issues, Avago Technologies recognizes that the
transceiver aperture is often a weak link in
system enclosure integrity and has designed
the modules to minimize emissions and if
necessary, contain the internal system emissions
by shielding the aperture.
To that end, Avago Technologies’ gigabit MT-RJ
transceivers HFBR-5912EZ has a nose shield
which provide a convenient chassis connection
to the nose of the transceiver. This nose
shield improves system EMI performance by
closing off the MT-RJ aperture.
Localized
shielding is also improved by tying the four
metal housing package grounding tabs to signal
ground on the PCB. Though not obvious by
inspection, the nose shield and metal housing
are electrically separated for customers who do
not wish to directly tie chassis and signal
grounds together.
Figure 6 shows the recommended positioning
of the transceivers with respect to the PCB
and faceplate.
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can cause catastrophic damage to the device. Limits apply to each parameter in
isolation, all other parameters having values within the recommended operating conditions. It should not be assumed that limiting values
of more than one parameter can be applied to the product at the same time. Exposure to the absolute maximum ratings for extended
periods can adversely affect device reliability.
Parameter
Storage Temperature
Supply Voltage
Received Data Output Current
Relative Humidity
TTL Transmit Disable Input Current - Low
TTL Transmit Disable Input Current - High
TTL Signal Detect Output Current - Low
TTL Signal Detect Output Current - High
Symbol
TS
VCC
ID
RH
IILMAX
IIHMAX
IOLMAX
IOHMAX
Min.
-40
-0.5
Symbol
TA
TC
VCC
PSR
VD
RDL
IOL
IOH
VIL
VIH
TASSERT
TDEASSERT
IIL
IIH
Min.
0
0
3.14
Typ.
5
-3.0
Max.
+85
5.0
30
95
Unit
°C
V
mA
%
mA
mA
mA
mA
Reference
Unit
°C
°C
V
mVP-P
V
Reference
4
400
Ω
mA
µA
V
V
µs
ms
mA
µA
Max.
+260/10
+260/10
Unit
°C/sec.
°C/sec.
Reference
3.0
-5.0
4.0
1
Recommended Operating Conditions
Parameter
Ambient Operating Temperature
Case Temperature
Supply Voltage
Power Supply Rejection
Transmitter Differential Input Voltage
Received Data Output Load
TTL Signal Detect Output Current
TTL Signal Detect Output Current
Transmit Disable Input Voltage - Low
Transmit Disable Input Voltage - High
Transmit Disable Assert Time
Transmit Disable Deassert Time
TTL Transmit Disable Input Current - Low
TTL Transmit Disable Input Current - High
Typ.
Max.
+70
+80
3.47
100
0.4
1.6
50
1.0
-400
0.8
VCC
10
1.0
VCC -1.3
-1.0
2
3
5
6
Process Compatibility
Parameter
Hand Lead Soldering Temperature/Time
Wave Soldering and Aqueous Wash
Symbol
TSOLD/tSOLD
TSOLD/tSOLD
Min.
Typ.
7
Notes:
1. The transceiver is Class 1 eye safe up to VCC = 5.0 V.
2. Case temperature measurement referenced to the metal housing.
3. Tested with a 100 mVP-P sinusoidal signal in the frequency range from 10 Hz to 2 MHz on the VCC supply with the recommended power supply filter
(with C8) in place. Typically less than a 1 dB change in sensitivity is experienced.
4. To VCC -2 V.
5. Time delay from Transmit Disable Assertion to laser shutdown.
6. Time delay from Transmit Disable Deassertion to laser startup.
7. Aqueous wash pressure <110 psi.
6
HFBR-5912EZ, 850 nm VCSEL
Transmitter Electrical Characteristics
(TA = 0°C to +70°C, VCC = 3.14 V to 3.47 V)
Parameter
Supply Current
Power Dissipation
Symbol
ICCT
PDIST
Min.
Typ.
55
0.18
Max.
75
0.26
Unit
mA
W
Reference
Symbol
ICCR
PDISR
VOL - VCC
VOH - VCC
tr
tf
VOL
VOH
TASSERT
TDEASSERT
Min.
Typ.
80
0.23
Max.
135
0.36
-1.620
-0.740
0.40
0.40
0.6
Unit
mA
W
V
V
ns
ns
V
V
µs
µs
Reference
1
2
3
3
4
4
5
5
Receiver Electrical Characteristics
(TA = 0°C to +70°C, VCC = 3.14 V to 3.47 V)
Parameter
Supply Current
Power Dissipation
Data Output Voltage - Low
Data Output Voltage - High
Data Output Rise Time
Data Output Fall Time
Signal Detect Output Voltage - Low
Signal Detect Output Voltage - High
Signal Detect Assert Time
Signal Detect Deassert Time
-1.950
-1.045
2.2
100
350
Notes:
1. With recommended 130 Ω receiver data output load.
2. Power dissipation value is the power dissipated in the receiver itself. It is calculated as the sum of the products of VCC and ICC minus the sum of the
products of the output voltages and currents.
3. These outputs are compatible with 10 k, 10 kH, and 100 k ECL and PECL inputs.
4. These are 20-80% values.
5. Under recommended operating conditions.
NORMALIZED AMPLITUDE
1.3
1.0
0.8
0.5
0.2
0
-0.2
0
0.22
0.375
0.625
NORMALIZED TIME
Figure 1. Transmitter Optical Eye Diagram Mask
7
0.78
1.0
HFBR-5912EZ Family, 850 nm VCSEL
Transmitter Optical Characteristics
(TA = 0°C to +70°C, VCC = 3.14 V to 3.47 V)
Parameter
Output Optical Power
50/125 µm, NA = 0.20 Fiber
Output Optical Power
62.5/125 µm, NA = 0.275 Fiber
Disabled Transmit Output Power
Optical Extinction Ratio
Center Wavelength
Spectral Width - rms
Optical Rise/Fall Time
RIN12
Coupled Power Ratio
Total Transmitter Jitter
Added at TP2
Symbol
POUT
Min.
-9.5
POUT
-9.5
Typ.
POUT DISABLED
λC
s
tr/tf
CPR
9
830
850
Max.
-4
Unit
dBm avg.
Reference
1
-4
dBm avg.
1
-30.0
dBm avg.
dB
nm
nm rms
ns
dB/Hz
dB
ps
860
0.85
0.26
-117
9
227
2
3,4, Figure 1
5
6
Receiver Optical Characteristics
(TA = 0°C to +70°C, VCC = 3.14 V to 3.47 V)
Parameter
Input Optical Power
Stressed Receiver Sensitivity
Stressed Receiver Eye Opening at TP4
Receive Electrical 3 dB
Upper Cutoff Frequency
Operating Center Wavelength
Return Loss
Signal Detect – Asserted
Signal Detect – Deasserted
Signal Detect – Hysteresis
Symbol
PIN
62.5 µm
50 µm
Min.
-17
Typ.
Max.
0
-12.5
-13.5
201
1500
λC
PA
PD
PA - PD
770
12
860
-17
-30
1.5
Unit
dBm avg.
dBm avg.
dBm avg.
ps
MHz
Reference
7
8
8
6,9
10
nm
dB
dBm avg.
dBm avg.
dB
11
12
12
12
Notes:
1. The maximum Optical Output Power complies with the IEEE 802.3z specification, and is Class 1 laser eye safe.
2. Optical Extinction Ratio is defined as the ratio of the average output optical power of the transmitter in the high (“1”) state to the low (“0”) state. The
transmitter is driven with a Gigabit Ethernet 1250 MBd 8B/10B encoded serial data pattern. This Optical Extinction Ratio is expressed in decibels
(dB) by the relationship 10log(Phigh avg/Plow avg).
3. These are unfiltered 20-80% values.
4. Laser transmitter pulse response characteristics are specified by an eye diagram (Figure 1). The characteristics include rise time, fall time, pulse
overshoot, pulse undershoot, and ringing, all of which are controlled to prevent excessive degradation of the receiver sensitivity. These parameters
are specified by the referenced Gigabit Ethernet eye diagram using the required filter. The output optical waveform complies with the requirements
of the eye mask discussed in section 38.6.5 and Fig. 38-2 of IEEE 802.3z.
5. CPR is measured in accordance with EIA/TIA-526-14A as referenced in 802.3z, section 38.6.10.
6. TP refers to the compliance point specified in 802.3z, section 38.2.1.
7. The receive sensitivity is measured using a worst case extinction ratio penalty while sampling at the center of the eye.
8. The stressed receiver sensitivity is measured using the conformance test signal defined in 802.3z, section 38.6.11. The conformance test signal is
conditioned by applying deterministic jitter and intersymbol interference.
9. The stressed receiver jitter is measured using the conformance test signal defined in 802.3z, section 38.6.11 and set to an average optical power 0.5
dB greater than the specified stressed receiver sensitivity.
10. The 3 dB electrical bandwidth of the receiver is measured using the technique outlined in 802.3z, section 38.6.12.
11. Return loss is defined as the minimum attenuation (dB) of received optical power for energy reflected back into the optical fiber.
12. With valid 8B/10B encoded data.
8
RX
TX
Mounting Studs/
Solder Posts
Package
Grounding Tabs
Top
View
RECEIVER SIGNAL GROUND
RECEIVER POWER SUPPLY
SIGNAL DETECT
RECEIVER DATA OUT BAR
RECEIVER DATA OUT
1
2
3
4
5
10
9
8
7
6
TRANSMITTER DATA IN BAR
TRANSMITTER DATA IN
TRANSMITTER DISABLE
TRANSMITTER SIGNAL GROUND
TRANSMITTER POWER SUPPLY
Figure 2. Pin Out
Table 1. Pin Out Table
Pin
Symbol
Functional Description
Two Mounting Studs The mounting studs are provided for transceiver mechanical attachment to the circuit board, they
may also provide an optional connection of the transceiver to the equipment chassis ground.
Note :- The holes in the circuit board must be tied to chassis ground.
Connect to signal ground.
Four Package
Grounding Tabs
1
VEER 1
Receiver Signal Ground
Directly connect this pin to receiver signal ground plane.
2
VCCR
Receiver Power Supply
3
SD
Signal Detect
Normal operation: Logic “1” Output
Fault Condition: Logic “0” Output
4
RDReceived Data Out Bar
No internal terminations provided.
5
RD+
Received Data Out
No internal terminations provided.
6
VCCT
Transmitter Power Supply
1
7
VEET
Transmitter Signal Ground
8
TDis
Transmitter Disable:
Normal Operation: Logic "0" - Laser On or Open Circuit
Transmit Disabled: Logic "1" - Laser Off
9
TD+
Transmitter Data In
An internal 50R termination consisting of 100R across TD+ and TD- will be provided
10
TDTransmitter Data In Bar
(See TD+ pin for terminaton details)
9
3.3 V dc
+
C11
0.1 µF
VEET
7
9
3.3 V dc
R7*
3.3 k
R8*
3.3 k
TD+
LASER
DRIVER
CIRCUIT
PECL
INPUT
100
TD-
HFBR-5912EZ
FIBER-OPTIC
TRANSCEIVER
10
8
TRANSMIT
DISABLE
VCCT
R5*
5.1 k
R6*
5.1 k
C1
50
C6*
0.01 µF
1.8
k
SD
0.1 µF
L2
C2
C8**
0.1 µF
10 µF
3
1 µH
EER
R10
150
VEE2
OUTPUT
DRIVER
R9
150
CLOCK
SYNTHESIS
CIRCUIT
PARALLEL
TO SERIAL
CIRCUIT
HDMP-1636A/-1646A
SERIAL/DE-SERIALIZER
(SERDES - 10 BIT
TRANSCEIVER)
3.3 V dc
0.1 µF
TO LVTTL STAGE
C3
0.01 µF
POSTAMPLIFIER
RD+ 5
1
V
TD-
+ C10
10 µF
C9
RD- 4
PREAMPLIFIER
TD+
C7
1 µH
0.1 µF
VCC
VCC2
50
C5*
0.01 µF
L1
6
VCCR 2
SIGNAL
DETECT
CIRCUIT
TO
LVTTL
STAGE
GND
R3
130
R4
130
C4
0.01 µF
50
RD-
R14
100
INPUT
BUFFER
RD+
50
CLOCK
RECOVERY
CIRCUIT
SERIAL TO
PARALLEL
CIRCUIT
SEE HDMP-1636A/-1646A DATA SHEET FOR
DETAILS ABOUT THIS TRANSCEIVER IC.
NOTES:
USE SURFACE-MOUNT COMPONENTS FOR OPTIMUM HIGH-FREQUENCY PERFORMANCE.
USE 50Ω MICROSTRIP OR STRIPLINE FOR SIGNAL PATHS.
LOCATE 50Ω TERMINATIONS AT THE INPUTS OF RECEIVING UNITS.
* IN ORDER TO ELIMINATE REQUIRED EXTERNAL PASSIVE COMPONENTS, AVAGO TECHNOLOGIES HAS INCLUDED THE EQUIVALENT OF RESISTORS R5 - R8 AND
CAPACITORS C5 AND C6 WITHIN THE MODULE. R5 - R8, C5 AND C6 ARE INCLUDED AS PART OF THE APPLICATION CIRCUIT TO ACCOMMODATE OTHER TRANSCEIVER
VENDORS' MODULES. THE HFBR-5912EZ WILL OPERATE IN BOTH CONFIGURATIONS.
**C8 IS A RECOMMENDED BYPASS CAPACITOR FOR ADDITIONAL LOW FREQUENCY NOISE FILTERING.
THE SIGNAL DETECT OUTPUT ON THE HFBR-5912EZ CONTAINS AN INTERNAL 1.8 k PULL UP RESISTOR.
Figure 3. Recommended Gigabit/sec Ethernet HFBR-5912EZ Fiber-Optic Transceiver and HDMP-1636A/1646A
SERDES Integrated Circuit Transceiver Interface and Power Supply Filter Circuits.
10
13.97
(0.55)
MIN.
5.15
(0.20)
(PCB to OVERALL
RECEPTACLE
CENTER LINE)
4.5 ±0.2
(0.177 ±0.008)
(PCB to OPTICS
CENTER LINE)
FRONT VIEW
7.11
(0.28)
13.59 10.0
(0.535) (0.394)
MAX. MAX.
10.16
(0.4)
TOP VIEW
4.57
(0.18)
Pin 1
1.778
(0.07)
7.59
(0.299)
17.778
(0.7)
12.4
(0.488)
+0
–0.2
(+000)
(0.24)
(–008)
Ø 0.61
7.112
(0.28)
HFBR = 48.57 (1.912) MAX.
HFBR = 36.04 (1.419) MAX.
9.3
9.8
(0.386) (0.366)
MAX. MAX.
SIDE VIEW
0.25
(0.01)
Ø 1.07
(0.042)
Full Radius
1
(0.039)
3.3
(0.13)
HFBR = 0
DIMENSIONS IN MILLIMETERS (INCHES)
NOTES:
1. THIS PAGE DESCRIBES THE MAXIMUM PACKAGE OUTLINE, MOUNTING STUDS, PINS AND THEIR RELATIONSHIPS TO EACH OTHER.
2. TOLERANCED TO ACCOMMODATE ROUND OR RECTANGULAR LEADS.
3. THE 10 I/O PINS, 2 SOLDER POSTS AND 4 PACKAGE GROUNDING TABS ARE TO BE TREATED AS A SINGLE PATTERN.
(SEE FIGURE 5 PCB LAYOUT).
4. THE MT-RJ HAS A 750 µm FIBER SPACING.
5. THE MT-RJ ALIGNMENT PINS ARE IN THE MODULE.
6. SEE MT-RJ TRANSCEIVER PIN OUT DIAGRAM FOR DETAILS.
Figure 4. Package Outline Drawing of HFBR-5912EZ
11
7.11
(0.28)
Ø 1.4 ±0.1
(0.55 ±0.004)
3.56
(0.14)
Ø 1.4 ±0.1
(0.55 ±0.004)
Holes For
Housing
Leads
7
(0.276)
Ø 1.4 ±0.1
(0.55 ±0.004)
10.16
(0.4)
10.8
(0.425)
13.34
(0.525)
3.08
(0.121)
7.59
(0.299)
3
(0.118)
3
(0.118)
27
(1.063)
4.57
(0.18)
6
(0.236)
9.59
(0.378)
1.778
(0.07)
2
(0.079)
Ø 2.29
(0.09)
7.112
(0.28)
17.78
(0.7)
13.97
(0.55)
MIN.
3.08
(0.121)
Ø 0.81 ±0.1
(0.032 ±0.004)
DIMENSIONS IN MILLIMETERS (INCHES)
NOTES:
1. THIS FIGURE DESCRIBES THE RECOMMENDED CIRCUIT BOARD LAYOUT FOR THE MT-RJ TRANSCEIVER PLACED AT
.550 SPACING.
2. THE HATCHED AREAS ARE KEEP-OUT AREAS RESERVED FOR HOUSING STANDOFFS. NO METAL TRACES OR GROUND
CONNECTION IN KEEP-OUT AREAS.
3. 2 x 5 TRANSCEIVER MODULE REQUIRES 16 PCB HOLES (10 I/O PINS, 2 SOLDER POSTS AND 4 PACKAGE GROUNDING
TABS).
PACKAGE GROUNDING TABS SHOULD BE CONNECTED TO SIGNAL GROUND.
4. SOLDER POSTS SHOULD BE SOLDERED TO PCB FOR MECHANICAL INTEGRITY AND THE HOLES IN THE CIRCUIT BOARD
CONNECTED TO CHASSIS GROUND.
Figure 5. Recommended Board Layout Hole Pattern
3.8
(0.15)
10.8 ±0.1
(0.425 ±0.004)
1
(0.039)
9.8 ±0.1
(0.386 ±0.004)
13.97
(0.55)
MIN.
0.25 ±0.1
(0.01 ±0.004)
(TOP OF PCB TO
BOTTOM OF
OPENING)
14.79
(0.589)
DIMENSIONS IN MILLIMETERS (INCHES)
NOTE: NOSE SHIELD SHOULD BE CONNECTED TO CHASSIS GROUND.
Figure 6. Recommended Panel Mounting
12
Ordering Information
HFBR-5912EZ - 850 nm VCSEL (Short Wavelength Laser) 1000 Base SX Application
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Pte. in the United States and other countries.
Data subject to change. Copyright © 2006 Avago Technologies Pte. All rights reserved.
AV01-0074EN - March 28, 2006
13