FEATURES FUNCTIONAL BLOCK DIAGRAMS S1 1 Ω typical on resistance 0.2 Ω on resistance flatness ±3.3 V to ±8 V dual-supply operation 3.3 V to 16 V single-supply operation No VL supply required 3 V logic-compatible inputs Rail-to-rail operation Continuous current per channel LFCSP package: 280 mA TSSOP package: 175 mA 16-lead TSSOP and 16-lead, 4 mm × 4 mm LFCSP IN1 D1 S2 IN2 ADG1611 D3 S4 IN4 07981-001 D4 NOTES 1. SWITCHES SHOWN FOR A LOGIC 1 INPUT. Figure 1. S1 Communication systems Medical systems Audio signal routing Video signal routing Automatic test equipment Data acquisition systems Battery-powered systems Sample-and-hold systems Relay replacements IN1 D1 S2 IN2 ADG1612 D2 S3 IN3 D3 S4 IN4 NOTES 1. SWITCHES SHOWN FOR A LOGIC 1 INPUT. The ADG1611/ADG1612/ADG1613 contain four independent single-pole/single-throw (SPST) switches. The ADG1611 and ADG1612 differ only in that the digital control logic is inverted. The ADG1611 switches are turned on with Logic 0 on the appropriate control input, while Logic 1 is required for the ADG1612 switches. The ADG1613 has two switches with digital control logic similar to that of the ADG1611; the logic is inverted on the other two switches. Each switch conducts equally well in both directions when on and has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked. 07981-033 D4 GENERAL DESCRIPTION Figure 2. S1 IN1 D1 S2 IN2 ADG1613 D2 S3 IN3 D3 S4 IN4 D4 The ADG1613 exhibits break-before-make switching action for use in multiplexer applications. Inherent in the design is the low charge injection for minimum transients when switching the digital inputs. The CMOS construction ensures ultralow power dissipation, making them ideally suited for portable and battery-powered instruments. S3 IN3 APPLICATIONS The ultralow on resistance of these switches make them ideal solutions for data acquisition and gain switching applications where low on resistance and distortion is critical. The on resistance profile is very flat over the full analog input range, ensuring excellent linearity and low distortion when switching audio signals. D2 NOTES 1. SWITCHES SHOWN FOR A LOGIC 1 INPUT. 07981-034 Data Sheet 1 Ω Typical On Resistance, ±5 V, +12 V, +5 V, and +3.3 V Quad SPST Switches ADG1611/ADG1612/ADG1613 Figure 3. PRODUCT HIGHLIGHTS 1. 2. 3. 4. 5. 6. 1.6 Ω maximum on resistance over temperature. Minimum distortion: THD + N = 0.007%. 3 V logic-compatible digital inputs: VINH = 2.0 V, VINL = 0.8 V. No VL logic power supply required. Ultralow power dissipation: <16 nW. 16-lead TSSOP and 16-lead, 4 mm × 4 mm LFCSP. Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2009-2012 Analog Devices, Inc. All rights reserved. ADG1611/ADG1612/ADG1613 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 3.3 V Single Supply........................................................................6 Applications....................................................................................... 1 Continuous Current per Channel, S or D..................................7 General Description ......................................................................... 1 Absolute Maximum Ratings ............................................................8 Functional Block Diagrams............................................................... 1 ESD Caution...................................................................................8 Product Highlights ........................................................................... 1 Pin Configurations and Function Descriptions ............................9 Revision History ............................................................................... 2 Typical Performance Characteristics ........................................... 10 Specifications..................................................................................... 3 Test Circuits..................................................................................... 13 ±5 V Dual Supply ......................................................................... 3 Terminology .................................................................................... 15 12 V Single Supply........................................................................ 4 Outline Dimensions ....................................................................... 16 5 V Single Supply.......................................................................... 5 Ordering Guide .......................................................................... 16 REVISION HISTORY 3/12—Rev. A to Rev. B Changes to Figure 16...................................................................... 11 8/09—Rev. 0 to Rev. A Changes to On Resistance (RON) Parameter, On Resistance Match Between Channels (ΔRON) Parameter, and On Resistance Flatness (RFLATON) Parameter, Table 4 ............................................................ 6 Changes to Figure 7 Caption......................................................... 10 1/09—Revision 0: Initial Version Rev. B | Page 2 of 16 Data Sheet ADG1611/ADG1612/ADG1613 SPECIFICATIONS ±5 V DUAL SUPPLY VDD = +5 V ± 10%, VSS = −5 V ± 10%, GND = 0 V, unless otherwise noted. Table 1. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (∆RON) On Resistance Flatness (RFLAT(ON)) 25°C −40°C to +85°C −40°C to +125°C VDD to VSS 1 1.2 0.04 0.08 0.2 0.25 1.4 1.6 0.09 0.1 0.29 0.34 LEAKAGE CURRENTS Source Off Leakage, IS (Off ) ±0.1 ±1 Drain Off Leakage, ID (Off ) ±0.3 ±0.1 ±0.3 ±0.2 ±0.4 ±1 ±6 ±1.5 ±10 Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 1 tON V Ω typ Ω max Ω typ Ω max Ω typ Ω max ±6 VS = ±4.5 V, IS = −10 mA 2.0 0.8 ±0.1 ±0.1 +0.005 5 VS = ±4.5 V, VD = ∓4.5 V; see Figure 25 nA max nA typ VS = ±4.5 V, VD = ∓4.5 V; see Figure 25 nA max nA typ nA max VS = VD = ±4.5 V; see Figure 26 V min V max μA typ μA max pF typ VIN = VGND or VDD Break-Before-Make Time Delay, tD (ADG1613 Only) Charge Injection Off Isolation 140 70 Channel-to-Channel Crosstalk 110 dB typ Total Harmonic Distortion + Noise (THD + N) 0.007 % typ 42 63 63 154 MHz typ pF typ pF typ pF typ 253 285 150 159 20 VDD/VSS VS = ±4.5 V, IS = −10 mA; see Figure 24 VDD = ±4.5 V, VSS = ±4.5 V VS = ±4.5 V, IS = −10 mA VDD = +5.5 V, VSS = −5.5 V ns typ ns max ns typ ns max ns typ ns min pC typ dB typ −3 dB Bandwidth CS (Off ) CD (Off ) CD, CS (On) POWER REQUIREMENTS IDD Test Conditions/Comments nA typ 165 212 105 137 25 tOFF 1 Unit 0.001 1.0 ±3.3/±8 Guaranteed by design, not subject to production test. Rev. B | Page 3 of 16 μA typ μA max V min/max RL = 300 Ω, CL = 35 pF VS = 2.5 V; see Figure 31 RL = 300 Ω, CL = 35 pF VS = 2.5 V; see Figure 31 RL = 300 Ω, CL = 35 pF VS1 = VS2 = 2.5 V; see Figure 32 VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 33 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 27 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 28 RL = 110 Ω, 5 V p-p, f = 20 Hz to 20 kHz; see Figure 30 RL = 50 Ω, CL = 5 pF; see Figure 29 VS = 0 V, f = 1 MHz VS = 0 V, f = 1 MHz VS = 0 V, f = 1 MHz VDD = +5.5 V, VSS = −5.5 V Digital inputs = 0 V or VDD ADG1611/ADG1612/ADG1613 Data Sheet 12 V SINGLE SUPPLY VDD = 12 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted. Table 2. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (∆RON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH 25°C −40°C to +85°C −40°C to +125°C 0 V to VDD 0.95 1.1 0.03 0.06 0.2 0.23 ±0.1 ±0.3 ±0.1 ±0.3 ±0.2 ±0.4 1.25 1.45 0.7 0.08 0.27 0.32 ±1 ±6 ±1 ±6 ±1.5 ±10 2.0 0.8 0.001 ±0.1 Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 1 tON 5 V Ω typ Ω max Ω typ Ω max Ω typ Ω max nA typ nA max nA typ nA max nA typ nA max V min V max μA typ μA max pF typ Break-Before-Make Time Delay, tD (ADG1613 Only) 125 156 75 87 35 Charge Injection Off Isolation Channel-to-Channel Crosstalk Total Harmonic Distortion + Noise 170 70 110 0.012 ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ % typ 38 60 60 154 MHz typ pF typ pF typ pF typ tOFF 190 215 93 99 30 −3 dB Bandwidth CS (Off ) CD (Off ) CD, CS (On) POWER REQUIREMENTS IDD 0.001 1 IDD VDD 1 Unit 320 480 3.3/16 Guaranteed by design, not subject to production test. Rev. B | Page 4 of 16 μA typ μA max μA typ μA max V min/max Test Conditions/Comments VS = 0 V to 10 V, IS = −10 mA; see Figure 24 VDD = 10.8 V, VSS = 0 V VS = 0 V to 10 V, IS = −10 mA VS = 0 V to 10 V, IS = −10 mA VDD = 13.2 V, VSS = 0 V VS = 1 V/10 V, VS = 10 V/1 V, see Figure 25 VS = 1 V/10 V, VS = 10 V/1 V see Figure 25 VS = VD = 1 V or 10 V; see Figure 26 VIN = VGND or VDD RL = 300 Ω, CL = 35 pF VS = 8 V; see Figure 31 RL = 300 Ω, CL = 35 pF VS = 8 V; see Figure 31 RL = 300 Ω, CL = 35 pF VS1 = VS2 = 8 V; see Figure 32 VS = 6 V, RS = 0 Ω, CL = 1 nF; see Figure 33 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 27 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 28 RL = 110 Ω, 5 V p-p, f = 20 Hz to 20 kHz; see Figure 30 RL = 50 Ω, CL = 5 pF; see Figure 29 VS = 6 V, f = 1 MHz VS = 6 V, f = 1 MHz VS = 6 V, f = 1 MHz VDD = 12 V Digital inputs = 0 V or VDD Digital inputs = 5 V Data Sheet ADG1611/ADG1612/ADG1613 5 V SINGLE SUPPLY VDD = 5 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted. Table 3. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (∆RON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH 25°C −40°C to +85°C −40°C to 125°C 0 V to VDD 1.7 2.15 0.05 0.09 0.4 0.53 ±0.05 ±0.3 ±0.05 ±0.3 ±0.15 ±0.4 2.4 2.7 0.12 0.15 0.55 0.6 ±1 ±6 ±1 ±6 ±1.5 ±10 2.0 0.8 0.001 ±0.1 Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 1 tON 5 V Ω typ Ω max Ω typ Ω max Ω typ Ω max nA typ nA max nA typ nA max nA typ nA max V min V max μA typ μA max pF typ Break-Before-Make Time Delay, tD (ADG1613 Only) 215 279 115 150 35 Charge Injection Off Isolation 80 70 ns typ ns max ns typ ns max ns typ ns min pC typ dB typ Channel-to-Channel Crosstalk 110 dB typ Total Harmonic Distortion + Noise 0.093 % typ 42 72 72 160 MHz typ pF typ pF typ pF typ tOFF 334 376 169 180 25 −3 dB Bandwidth CS (Off ) CD (Off ) CD, CS (On) POWER REQUIREMENTS IDD VDD 1 Unit 0.001 1 3.3/16 Guaranteed by design, not subject to production test. Rev. B | Page 5 of 16 μA typ μA max V min/max Test Conditions/Comments VS = 0 V to 4.5 V, IS = −10 mA; see Figure 24 VDD = 4.5 V, VSS = 0 V VS = 0 V to 4.5 V, IS = −10 mA VS = 0 V to 4.5 V, IS = −10 mA VDD = 5.5 V, VSS = 0 V VS = 1 V/4.5 V, VD = 4.5 V/1 V; see Figure 25 VS = 1 V/4.5 V, VD = 4.5 V/1 V; see Figure 25 VS = VD = 1 V or 4.5 V; see Figure 26 VIN = VGND or VDD RL = 300 Ω, CL = 35 pF VS = 2.5 V; see Figure 31 RL = 300 Ω, CL = 35 pF VS = 2.5 V; see Figure 31 RL = 300 Ω, CL = 35 pF VS1 = VS2 = 2.5 V; see Figure 32 VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 33 RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 27 RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 28 RL = 110 Ω, f = 20 Hz to 20 kHz, VS = 3.5 V p-p; see Figure 30 RL = 50 Ω, CL = 5 pF; see Figure 29 VS = 2.5 V, f = 1 MHz VS = 2.5 V, f = 1 MHz VS = 2.5 V, f = 1 MHz VDD = 5.5 V Digital inputs = 0 V or VDD ADG1611/ADG1612/ADG1613 Data Sheet 3.3 V SINGLE SUPPLY VDD = 3.3 V, VSS = 0 V, GND = 0 V, unless otherwise noted. Table 4. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (∆RON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH 25°C −40°C to +85°C −40°C to +125°C Unit 3.2 3.4 0 V to VDD 3.6 V Ω typ 0.06 1.2 0.07 1.3 0.08 1.4 Ω typ Ω typ ±1 ±6 ±1 ±6 ±1.5 ±10 ±0.02 ±0.3 ±0.02 ±0.3 ±0.1 ±0.4 2.0 0.8 0.001 ±0.1 Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 1 tON 3 V min V max μA typ μA max pF typ Break-Before-Make Time Delay, tD (ADG1613 Only) 350 493 190 263 25 Charge Injection Off Isolation 50 70 ns typ ns max ns typ ns max ns typ ns min pC typ dB typ Channel-to-Channel Crosstalk 110 dB typ Total Harmonic Distortion + Noise 0.18 % typ 52 76 76 160 MHz typ pF typ pF typ pF typ tOFF 556 603 286 300 18 −3 dB Bandwidth CS (Off ) CD (Off ) CD, CS (On) POWER REQUIREMENTS IDD 0.001 1.0 VDD 1 nA typ nA max nA typ nA max nA typ nA max 1.0 3.3/16 Guaranteed by design, not subject to production test. Rev. B | Page 6 of 16 μA typ μA max V min/max Test Conditions/Comments VS = 0 V to VDD, IS = −10 mA, VDD = 3.3 V, VSS = 0 V; see Figure 24 VS = 0 V to VDD, IS = −10 mA VS = 0 V to VDD, IS = −10 mA VDD = 3.6 V, VSS = 0 V VS = 0.6 V/3 V, VD = 3 V/0.6 V; see Figure 25 VS = 0.6 V/3 V, VD = 3 V/0.6 V; see Figure 25 VS = VD = 0.6 V or 3 V; see Figure 26 VIN = VGND or VDD RL = 300 Ω, CL = 35 pF VS = 1.5 V; see Figure 31 RL = 300 Ω, CL = 35 pF VS = 1.5 V; see Figure 31 RL = 300 Ω, CL = 35 pF VS1 = VS2 = 1.5 V; see Figure 32 VS = 1.5 V, RS = 0 Ω, CL = 1 nF; see Figure 33 RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 27 RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 28 RL = 110 Ω, f = 20 Hz to 20 kHz, VS = 2 V p-p; see Figure 30 RL = 50 Ω, CL = 5 pF; see Figure 29 VS = 1.5 V, f = 1 MHz VS = 1.5 V, f = 1 MHz VS = 1.5 V, f = 1 MHz VDD = 3.6 V Digital inputs = 0 V or VDD Data Sheet ADG1611/ADG1612/ADG1613 CONTINUOUS CURRENT PER CHANNEL, S OR D Table 5. Parameter CONTINUOUS CURRENT, S OR D VDD = +5 V, VSS = −5 V TSSOP (θJA = 150.4°C/W) LFCSP (θJA = 48.7°C/W) VDD = 12 V, VSS = 0 V TSSOP (θJA = 150.4°C/W) LFCSP (θJA = 48.7°C/W) VDD = 5 V, VSS = 0 V TSSOP (θJA = 150.4°C/W) LFCSP (θJA = 48.7°C/W) VDD = 3.3 V, VSS = 0 V TSSOP (θJA = 150.4°C/W) LFCSP (θJA = 48.7°C/W) 25°C 85°C 125°C Unit 175 280 119 175 70 95 mA maximum mA maximum 206 336 135 203 84 108 mA maximum mA maximum 140 220 91 140 63 84 mA maximum mA maximum 140 228 98 150 70 91 mA maximum mA maximum Rev. B | Page 7 of 16 ADG1611/ADG1612/ADG1613 Data Sheet ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 6. Parameter VDD to VSS VDD to GND VSS to GND Analog Inputs 1 Digital Inputs1 Peak Current, S or D Continuous Current, S or D 2 Operating Temperature Range Industrial (Y Version) Storage Temperature Range Junction Temperature 16-Lead TSSOP, θJA Thermal Impedance (2-Layer Board) 16-Lead LFCSP, θJA Thermal Impedance (4-Layer Board) Reflow Soldering Peak Temperature, Pb free 1 2 Rating 18 V −0.3 V to +18 V +0.3 V to −18 V VSS − 0.3 V to VDD + 0.3 V or 30 mA, whichever occurs first GND − 0.3 V to VDD + 0.3 V or 30 mA, whichever occurs first 630 mA (pulsed at 1 ms, 10% duty-cycle maximum) Data + 15% Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION −40°C to +125°C −65°C to +150°C 150°C 150.4°C/W 48.7°C/W 260°C Overvoltages at IN, S, or D are clamped by internal diodes. Current should be limited to the maximum ratings given. See Table 5. Rev. B | Page 8 of 16 Data Sheet ADG1611/ADG1612/ADG1613 13 VDD TOP VIEW (Not to Scale) 12 NC 11 S3 7 10 D3 IN4 8 9 IN3 VSS 4 GND 5 S4 6 D4 NC = NO CONNECT VSS 2 GND 3 S4 4 14 IN2 13 D2 12 S2 ADG1611/ ADG1612/ ADG1613 11 VDD TOP VIEW (Not to Scale) 9 S3 10 NC NOTES 1. NC = NO CONNECT. 2. EXPOSED PAD TIED TO SUBSTRATE, VSS. Figure 4. 16-Lead TSSOP Pin Configuration Figure 5. 16-Lead LFCSP Pin Configuration Table 7. Pin Function Descriptions 16-Lead TSSOP 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Not applicable Pin No. 16-Lead LFCSP 15 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 17 (EPAD) Mnemonic IN1 D1 S1 VSS GND S4 D4 IN4 IN3 D3 S3 NC VDD S2 D2 IN2 EP (EPAD) Description Logic Control Input. Drain Terminal. This pin can be an input or output. Source Terminal. This pin can be an input or output. Most Negative Power Supply Potential. Ground (0 V) Reference. Source Terminal. This pin can be an input or output. Drain Terminal. This pin can be an input or output. Logic Control Input. Logic Control Input. Drain Terminal. This pin can be an input or output. Source Terminal. This pin can be an input or output. No Connection. Most Positive Power Supply Potential. Source Terminal. This pin can be an input or output. Drain Terminal. This pin can be an input or output. Logic Control Input. Exposed Pad. Tied to substrate, VSS. Table 8. ADG1611/ADG1612 Truth Table ADG1611 INx 0 1 ADG1612 INx 1 0 Switch Condition On Off Switch 1, Switch 4 Off On Switch 2, Switch 3 On Off Table 9. ADG1613 Truth Table Logic (INx) 0 1 07981-003 S2 D3 8 14 PIN 1 INDICATOR IN3 7 ADG1611/ ADG1612/ ADG1613 S1 3 S1 1 D4 5 D2 D1 IN4 6 IN2 15 2 07981-002 16 IN1 1 15 IN1 16 D1 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS Rev. B | Page 9 of 16 ADG1611/ADG1612/ADG1613 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 1.4 TA = 25°C VDD = +3.3V VSS = –3.3V ON RESISTANCE (Ω) 1.2 1.0 VDD = +5V VSS = –5V VDD = +8V VSS = –8V 0.6 –6 –4 –2 0 1.0 0.8 0.6 2 4 6 8 VS OR VD VOLTAGE (V) 0.4 Figure 6. On Resistance as a Function of VD (VS) for Dual Supply 0 2 4 ON RESISTANCE (Ω) 2.5 2.0 VDD = 5V VSS = 0V 1.5 VDD = 12V VSS = 0V 2 4 6 8 10 2.0 1.5 VDD = 16V VSS = 0V 12 14 16 VS OR VD VOLTAGE (V) 1.0 07981-014 ON RESISTANCE (Ω) VDD = 3.3V VSS = 0V 1.0 1.2 3.5 ON RESISTANCE (Ω) 4.0 1.0 0.8 –2 0 2 VS OR VD VOLTAGE (V) 4 6 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 VDD = 3.3V VSS = 0V 3.0 TA = +125°C TA = +85°C TA = +25°C TA = –40°C 2.5 1.5 07981-011 –4 1.0 2.0 TA = +125°C TA = +85°C TA = +25°C TA = –40°C VDD = +5V VSS = –5V 0.5 VS OR VD VOLTAGE (V) 1.4 0.6 0 Figure 10. On Resistance as a Function of VD (VS) for Different Temperatures, 5 V Single Supply Figure 7. On Resistance as a Function of VD (VS) for Single Supply ON RESISTANCE (Ω) 12 VDD = 5V VSS = 0V TA = +125°C TA = +85°C TA = +25°C TA = –40°C 3.0 0.4 –6 10 2.5 TA = 25°C 0 8 Figure 9. On Resistance as a Function of VD (VS) for Different Temperatures, 12 V Single Supply 3.5 0.5 6 VS OR VD VOLTAGE (V) 07981-012 0.4 –8 TA = +125°C TA = +85°C TA = +25°C TA = –40°C 07981-010 0.8 07981-013 ON RESISTANCE (Ω) 1.2 VDD = 12V VSS = 0V 0 0.5 1.0 1.5 2.0 VS OR VD VOLTAGE (V) Figure 8. On Resistance as a Function of VD (VS) for Different Temperatures, ±5 V Dual Supply 2.5 3.0 3.5 07981-006 1.4 Figure 11. On Resistance as a Function of VD (VS) for Different Temperatures, 3.3 V Single Supply Rev. B | Page 10 of 16 Data Sheet ADG1611/ADG1612/ADG1613 20 18 16 ID, IS (ON) +, + 14 10 ID (OFF) –, + 5 IS (OFF) +, – 0 ID, IS (ON) –, – IS (OFF) –, + –5 10 8 ID, IS (OFF) –, – 6 ID (OFF) –, + 4 IS (OFF) +, – 2 0 ID (OFF) +, – –10 ID, IS (OFF) +, + 12 IS (OFF) –, + –2 0 20 40 60 80 100 120 TEMPERATURE (°C) –4 07981-032 80 100 120 IS (OFF) +, – 300 IDD (µA) 0 –5 ID, IS (ON) –, – IS (OFF) –, + –10 200 100 ID (OFF) +, – 0 20 40 60 80 100 VDD = +5V VSS = 0V 0 120 TEMPERATURE (°C) –100 07981-031 –15 VDD = +5V VSS = –5V VDD = +3.3V VSS = 0V 0 2 4 6 8 10 07981-005 5 VDD = +12V VSS = 0V 400 ID (OFF) –, + 10 IDD PER CHANNEL TA = 25°C 500 ID, IS (ON) +, + 15 12 LOGIC (V) Figure 16. IDD vs. Logic Level Figure 13. Leakage Currents as a Function of Temperature, 12 V Single Supply 300 20 VDD = +5V VSS = –5V 250 CHARGE INJECTION (pC) 15 ID, IS (OFF) +, + 10 ID, IS (OFF) –, – 5 ID (OFF) –, + 0 0 20 40 60 80 200 150 VDD = +12V VSS = 0V 100 VDD = +5V VSS = 0V 50 IS (OFF) +, – IS (OFF) –, + ID (OFF) +, – 100 120 TEMPERATURE (°C) 0 –6 07981-019 LEAKAGE CURRENT (nA) 60 600 20 –5 40 Figure 15. Leakage Currents as a Function of Temperature, 3.3 V Single Supply 25 LEAKAGE CURRENT (nA) 20 TEMPERATURE (°C) Figure 12. Leakage Currents as a Function of Temperature, ±5 V Dual Supply –20 ID (OFF) +, – 0 VDD = +3.3V VSS = 0V –4 –2 0 2 4 6 8 10 12 VS (V) Figure 17. Charge Injection vs. Source Voltage (VS) Figure 14. Leakage Currents as a Function of Temperature, 5 V Single Supply Rev. B | Page 11 of 16 14 07981-009 –15 07981-030 LEAKAGE CURRENT (nA) LEAKAGE CURRENT (nA) 15 ADG1611/ADG1612/ADG1613 Data Sheet 500 0 TA = 25°C VDD = +5V VSS = –5V 450 –1 300 tOFF (+3.3V) tON (+3.3V) tOFF (+5V) tOFF (±5V) 250 200 150 100 –2 –3 –4 –40 –20 0 20 tOFF (±5V) tON (+12V) 40 60 80 100 120 140 TEMPERATURE (°C) –6 1k 07981-018 0 –60 tON (+5V) tOFF (+12V) TA = 25°C VDD = +5V VSS = –5V –20 1G ACPSRR (dB) –60 DECOUPLING CAPACITORS –80 10k 100k 1M 10M 100M 1G –120 1k 10k 100k 1M 10M 07981-008 –100 25k FREQUENCY (Hz) Figure 22. ACPSRR vs. Frequency 0.20 TA = 25°C VDD = +5V VSS = –5V 0.18 –40 VDD = +3.3V VS = 2V RL = 110Ω TA = 25°C 0.16 THD + N (%) 0.14 –60 –80 0.12 VDD = +5V VS = 3.5V 0.10 0.08 0.06 –100 –120 VDD = +5V VSS = –5V VS = 5V p-p VDD = +12V VS = 5V p-p 0.04 0.02 10k 100k 1M 10M FREQUENCY (Hz) 100M 1G 07981-017 CROSSTALK (dB) 100M NO DECOUPLING CAPACITORS Figure 19. Off Isolation vs. Frequency –140 1k 10M –40 07981-007 OFF ISOLATION (dB) 0 FREQUENCY (Hz) –20 1M Figure 21. On Response vs. Frequency –5 T = 25°C –10 VA = +5V DD –15 VSS = –5V –20 –25 –30 0 100k FREQUENCY (Hz) Figure 18. tON/tOFF Times vs. Temperature –35 –40 –45 –50 –55 –60 –65 –70 –75 –80 –85 1k 10k 07981-004 –5 50 07981-016 TIME (ns) 350 INSERTION LOSS (dB) 400 Figure 20. Crosstalk vs. Frequency 0 0 5k 10k 15k FREQUENCY (Hz) Figure 23. THD + N vs. Frequency Rev. B | Page 12 of 16 20k Data Sheet ADG1611/ADG1612/ADG1613 TEST CIRCUITS VDD VSS 0.1µF VDD NETWORK ANALYZER VSS IS Sx INx VS Dx V1 VIN RL 50Ω GND Dx 07981-020 RON = V1/IS VOUT OFF ISOLATION = 20 log VOUT Figure 27. Off Isolation Figure 24. On Resistance VDD VSS 0.1µF 0.1µF NETWORK ANALYZER VOUT VDD VSS S1 RL 50Ω Dx RL 50Ω S2 VS A Sx Dx GND ID (OFF) A 07981-021 VD VS CHANNEL-TO-CHANNEL CROSSTALK = 20 log Figure 25. Off Leakage VOUT VS 07981-027 IS (OFF) Figure 28. Channel-to-Channel Crosstalk VDD VSS 0.1µF 0.1µF VDD NETWORK ANALYZER VSS Sx 50Ω INx VS Dx VIN ID (ON) Dx NC = NO CONNECT VD RL 50Ω GND A 07981-022 NC Sx VS INSERTION LOSS = 20 log Figure 26. On Leakage VOUT WITH SWITCH VOUT WITHOUT SWITCH Figure 29. Bandwidth Rev. B | Page 13 of 16 VOUT 07981-028 Sx VS 50Ω 50Ω 07981-026 0.1µF ADG1611/ADG1612/ADG1613 Data Sheet VDD VSS 0.1µF 0.1µF AUDIO PRECISION VDD VSS RS Sx INx VS V p-p Dx VIN VOUT RL 110Ω 07981-029 GND Figure 30. THD + Noise VDD VSS 0.1µF 0.1µF VDD Sx VS VIN ADG1612 50% 50% VIN ADG1611 50% 50% VSS VOUT Dx CL 35pF RL 300Ω INx 90% VOUT 90% tOFF tON 07981-023 GND Figure 31. Switching Times VDD VSS VSS D1 S2 D2 RL 300Ω IN1, IN2 CL 35pF RL 300Ω VOUT2 CL 35pF VOUT1 VOUT2 ADG1613 50% 90% 90% 0V 90% 90% 0V GND tD tD Figure 32. Break-Before-Make Time Delay RS VS VDD VSS VDD VSS Sx Dx VIN CL 1nF INx GND ADG1612 ON VOUT VIN OFF ADG1611 VOUT QINJ = CL × ∆VOUT Figure 33. Charge Injection Rev. B | Page 14 of 16 ∆VOUT 07981-025 VS2 VOUT1 50% 0V 07981-024 VDD S1 VS1 VIN 0.1µF 0.1µF Data Sheet ADG1611/ADG1612/ADG1613 TERMINOLOGY tON The delay between applying the digital control input and the output switching on. See Figure 31. IDD The positive supply current. ISS The negative supply current. tOFF The delay between applying the digital control input and the output switching off. See Figure 31. VD (VS) The analog voltage on Terminal D and Terminal S. RON The ohmic resistance between Terminal D and Terminal S. RFLAT(ON) Flatness that is defined as the difference between the maximum and minimum value of on resistance measured over the specified analog signal range. Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during switching. See Figure 33. Off Isolation A measure of unwanted signal coupling through an off switch. See Figure 27. Crosstalk A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. See Figure 28. IS (Off) The source leakage current with the switch off. ID (Off) The drain leakage current with the switch off. ID, IS (On) The channel leakage current with the switch on. Bandwidth The frequency at which the output is attenuated by 3 dB. See Figure 29. VINL The maximum input voltage for Logic 0. On Response The frequency response of the on switch. VINH The minimum input voltage for Logic 1. Insertion Loss The loss due to the on resistance of the switch. IINL (IINH) The input current of the digital input. Total Harmonic Distortion + Noise (THD + N) The ratio of the harmonic amplitude plus noise of the signal to the fundamental. See Figure 30. CS (Off) The off switch source capacitance, which is measured with reference to ground. CD (Off) The off switch drain capacitance, which is measured with reference to ground. CD, CS (On) The on switch capacitance, which is measured with reference to ground. AC Power Supply Rejection Ratio (ACPSRR) The ratio of the amplitude of signal on the output to the amplitude of the modulation. This is a measure of the ability of the part to avoid coupling noise and spurious signals that appear on the supply voltage pin to the output of the switch. The dc voltage on the device is modulated by a sine wave of 0.62 V p-p. CIN The digital input capacitance. Rev. B | Page 15 of 16 ADG1611/ADG1612/ADG1613 Data Sheet OUTLINE DIMENSIONS 5.10 5.00 4.90 16 9 4.50 4.40 4.30 6.40 BSC 1 8 PIN 1 1.20 MAX 0.15 0.05 0.30 0.19 0.65 BSC 0.20 0.09 SEATING PLANE COPLANARITY 0.10 0.75 0.60 0.45 8° 0° COMPLIANT TO JEDEC STANDARDS MO-153-AB Figure 34. 16-Lead Thin Shrink Small Outline Package [TSSOP] (RU-16) Dimensions shown in millimeters 4.00 BSC SQ 0.60 MAX 12 13 3.75 BSC SQ TOP VIEW 12° MAX 1.00 0.85 0.80 SEATING PLANE 4 9 8 2.65 2.50 SQ 2.35 5 0.25 MIN 1.95 BCS 0.80 MAX 0.65 TYP BOTTOM VIEW 0.05 MAX 0.02 NOM COPLANARITY 0.20 REF 0.08 0.30 0.23 0.18 1 16 EXPOSED PAD 0.65 BSC PIN 1 INDICATOR FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. COMPLIANT TO JEDEC STANDARDS MO-220-VGGC. 031006-A PIN 1 INDICATOR 0.50 0.40 0.30 Figure 35. 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 4 mm × 4 mm Body, Very Thin Quad (CP-16-13) Dimensions shown in millimeters ORDERING GUIDE Model 1 ADG1611BRUZ ADG1611BRUZ-REEL ADG1611BRUZ-REEL7 ADG1611BCPZ-REEL ADG1611BCPZ-REEL7 ADG1612BRUZ ADG1612BRUZ-REEL ADG1612BRUZ-REEL7 ADG1612BCPZ- REEL ADG1612BCPZ-REEL7 ADG1613BRUZ ADG1613BRUZ-REEL ADG1613BRUZ-REEL7 ADG1613BCPZ-REEL ADG1613BCPZ-REEL7 1 Temperature Range −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C Package Description 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] Z = RoHS Compliant Part. ©2009-2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07981-0-3/12(B) Rev. B | Page 16 of 16 Package Option RU-16 RU-16 RU-16 CP-16-13 CP-16-13 RU-16 RU-16 RU-16 CP-16-13 CP-16-13 RU-16 RU-16 RU-16 CP-16-13 CP-16-13