ams AS1334-BTDT-33 650ma, ultra low ripple step down dc/dc converter Datasheet

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Datasheet
AS1334
650mA, Ultra low Ripple Step Down DC/DC Converter
1 General Description
2 Key Features
Output Voltage Ripple: 2mV
The AS1334 is a step-down DC-DC converter designed to power
portable applications from a single Li-Ion battery. The device also
achieves high-performance in mobile phones and other applications
requiring low dropout voltage.
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PWM Switching Frequency: 2MHz
Single Lithium-Ion Cell Operation
Fixed-frequency PWM operation minimizes RF interference.
Shutdown function turns the device off and reduces battery
consumption to 0.01µA (typ).
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Output Voltage Range: 1.2V to 3.4V
(available in 100mV steps, see Ordering Information on page 17)
Fixed Output Voltages:
- 1.2V, 1.5V, 1.8V, 2.5V, 3.0V, 3.3V
The AS1334 operates from an input voltage range of 2.7 to 5.5V
while providing output voltages of 1.2, 1.5, 1.8, 2.5, 3.0 and 3.3V.
Maximum Load Capability of 650mA
The AS1334 is available in a TDFN(3x3) 8-pin package. A high
switching frequency (2 MHz) allows use of tiny surface-mount
components. Only three small external surface-mount components,
an inductor and two ceramic capacitors are required.
97% High Efficiency, 94% Average Efficiency
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Current Overload Protection
Thermal Overload Protection
Power-OK
Soft Start
Low Dropout Voltage (140 mΩ Typ PFET)
TDFN(3x3) 8-pin
3 Applications
The AS1334 is an ideal solution to supply noise sensitive
applications as cellular phones, hand-held radios, RF PC cards,
battery powered RF devices, RFID chipsets, A/D Converter, Sensors
and OpAmps.
PVIN
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VIN
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Figure 1. AS1334 - Typical Application Circuit
SW
3.3 µH
VOUT
VDD
FB
AS1334
10 µF
ON
OFF
EN
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10 µF
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POK
PGND
Revision 1.09
SGND
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AS1334
Datasheet - P i n A s s i g n m e n t s
4 Pin Assignments
8 PGND
POK 2
7 SW
AS1334
EN 3
SGND 9
5 SGND
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VDD 4
6 PVIN
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FB 1
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Figure 2. Pin Configuration
4.1 Pin Descriptions
Table 1. Pin Descriptions
Pin Number
1
Pin Name
FB
2
POK
3
4
5, 9
6
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PGND
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8
SW
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7
EN
VDD
SGND
PVIN
Description
Feedback Pin. Connect to the output at the output filter capacitor.
Power-OK.
0 = VOUT < 90% of VOUTNOM.
1 = VOUT > 90% of VOUTNOM.
Enable Input. Set this digital input high for normal operation. For shutdown, set low.
+2.7V to +5.5V Power Supply Voltage. Analog Supply Input.
Analog and Control Ground. Connect these pins with low resistance to PGND.
+2.7V to +5.5V Power Supply Voltage. Input to the internal PFET switch.
Switch Pin. Switch node connection to the internal PFET switch and NFET synchronous rectifier.
Connect to an inductor with a saturation current rating that exceeds the maximum switch peak
current limit specification of the AS1334.
Power Ground. Connect this pin with low resistance to SGND.
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AS1334
Datasheet - A b s o l u t e M a x i m u m R a t i n g s
5 Absolute Maximum Ratings
Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only, and functional operation of
the device at these or any other conditions beyond those indicated in Electrical Characteristics on page 4 is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Table 2. Absolute Maximum Ratings
Min
Max
Units
VDD, PVIN to SGND
-0.3
+7.0
V
PGND to SGND
-0.3
+0.3
V
POK, EN, FB
SGND - 0.3
VDD + 0.3
V
SW
PGND - 0.3
PVIN + 0.3
V
PVIN to VDD
-0.3
+0.3
V
Input Voltage Range
2.7
5.5
V
Notes
Electrical Parameters
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7.0V max
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Parameter
Recommended Load Current
Ambient Temperature (TA) Range
Electrostatic Discharge
650
-40
Human Body Model
mA
+85
ºC
In applications where high power dissipation and/
or poor package thermal resistance is present,
the maximum ambient temperature may have to
be derated.
Maximum ambient temperature (TA-MAX) is
dependent on the maximum operating junction
temperature (TJ-MAX-OP = 125ºC), the maximum
power dissipation
of the device in the application (PD-MAX), and the
junction-to ambient thermal resistance of the
part/package in the application (θJA), as given by
the following
equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX).
2
kV
Norm: MIL 883 E method 3015
+150
ºC
+150
ºC
Temperature Ranges and Storage Conditions
Junction Temperature (TJ-MAX)
-55
ca
Storage Temperature Range
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Package Body Temperature
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Humidity
5
ºC
86
%
Non-condensing
1
Represents a max. floor life time of unlimited
Te
Moisture Sensitive Level
+260
The reflow peak soldering temperature (body
temperature) specified is in accordance with IPC/
JEDEC J-STD-020“Moisture/Reflow Sensitivity
Classification for Non-Hermetic Solid State
Surface Mount Devices”.
The lead finish for Pb-free leaded packages is
matte tin (100% Sn).
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Revision 1.09
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AS1334
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
6 Electrical Characteristics
TA = TJ = -40ºC to +85ºC; PVIN = VDD = EN = 3.6V, unless otherwise noted. Typical values are at TA=25°C.
Table 3. Electrical Characteristics
VOUT
Operating Temperature Range
Output Voltage
Shutdown supply current
IQ
DC bias current into VDD
RDSON(P)
Pin-Pin Resistance for PFET
RDSON(N)
Pin-Pin Resistance for NFET
ILIM,PFET
Switch peak current limit
POK Output
PVIN = 3.6V
EN = SW = 0V
1
FB = 0V, No Switching
Max
Units
+85
°C
1.224
V
1.53
V
1.836
V
2.55
V
3.06
V
1.176
1.2
1.47
1.5
1.764
1.8
2.45
2.5
2.94
3.0
3.234
3.3
3.366
V
0.01
2
µA
2
ISW = 200mA; TA = +25°C
Falling edge, referenced to VOUT(NOM)
415
485
87
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Internal oscillator frequency
1.8
mA
mΩ
mΩ
1100
1200
mA
0.05
0.2
V
500
nA
93
%
90
1.2
Pin pull down current
Oscillator
200
300
935
POK Threshold
Logic low input threshold
140
ISW = -200mA
POK = 3.6V
VIL,EN
1.4
230
ISW = -200mA; TA = +25°C
POK Output High Leakage Current
Logic high input threshold
1
ISW = 200mA
POK sinking 0.1mA
VIH,EN
FOSC
Typ
-40
POK Output Low Voltage
Enable Input
IPIN,ENABLE
Min
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ISHDN
VOL
Conditions
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TA
Parameter
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Symbol
V
0.5
V
5
10
µA
2
2.2
MHz
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1. Shutdown current includes leakage current of PFET.
2. IQ specified here is when the part is operating at 100% duty cycle.
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AS1334
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
6.1 System Characteristics
TA = 25ºC; PVIN = VDD = EN = 3.6V, unless otherwise noted. The following parameters are verified by characterisation and are not production
tested.
Table 4. System Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Units
350
µs
Turn on time (from Enable low to high
transition)
EN = Low to High, VIN = 4.2V, COUT = 10µF,
IOUT ≤ 1mA
210
η
Efficiency (L = 3.3µH, DCR ≤ 100mΩ)
VIN = 3.6V, IOUT = 400mA
96
VIN = 4.2V, IOUT = 10mA to 400mA
5
Line_tr
Line transient response
VIN = 600mV perturbance, over VIN range 3.4V
to 5.5V; TRISE = TFALL = 10µs, VOUT = 3.0V,
IOUT = 100mA
50
Load_tr
Load transient response
VIN = 4.2V, VOUT = 3.0V, transients up to
100mA, TRISE = TFALL = 10µs
%
mVp-p
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mVpk
50
mVpk
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VOUT_ripple Ripple voltage, PWM mode
1
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T_ON
1. Ripple voltage should measured at COUT electrode on good layout PC board and under condition using suggested inductors and capacitors.
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Note: All limits are guaranteed. The parameters with min and max values are guaranteed with production tests or SQC (Statistical Quality
Control) methods.
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AS1334
Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
7 Typical Operating Characteristics
Circuit in Figure 23 on page 11, PVIN = VDD = EN = 3.6V, L = 3.3µH (LPS4018-332ML_), CIN = COUT = 10µF (GRM21BR61C106KA01)
unless otherwise noted.
Figure 3. Quiescent Current vs. VIN
Figure 4. Shutdown Current vs. Temperature
0.3
0.55
Vi n=3.25V
0.45
0.4
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0.5
Vi n=4.2V
Vi n=5.5V
0.2
0.15
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Shutdown Current (µA)
Quiescent Current (mA)
Vi n=3.6V
0.25
0.1
0.05
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- 45°C
+ 25°C
+ 85°C
0.35
2.5
3
3.5
4
4.5
5
0
-40
5.5
-15
10
Supply Voltage (V)
3
85
Figure 6. Output Voltage vs. Supply Voltage
3.04
Output Voltage (V)
2
1
0
-1
-2
3.02
3
2.98
2.96
Vi n=3.6V
-3
Vi n=4.2V
-15
10
35
60
Iout=50mA
Iout=300mA
Vi n=5.5V
-4
-40
60
3.06
ca
Switching Frequency Variation (%)
Figure 5. Switching Frequency Variation vs. Temperature
4
35
Temperature (°C)
Iout=650mA
85
2.94
3.25
Temperature (°C)
3.75
4.25
4.75
5.25
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Supply Voltage (V)
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AS1334
Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
Figure 8. Efficiency vs. Output Current
3.06
100
3.04
95
3
2.98
90
85
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3.02
Efficiency (%)
Output Voltage (V)
Figure 7. Output Voltage vs. Temperature
80
Vi n=3.25V
Vi n=3.6V
Vi n=3.9V
75
Iout=50mA
Vi n=4.2V
Iout=300mA
Vi n=5.5V
70
35
60
85
0
300
400
500
600
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VOUT
1.1
1.05
IOUT
Vi n=2.7V
Vi n=3.6V
Vi n=5.5V
1
-40
-15
10
35
700
Figure 10. Load Transient Response; VOUT = 3.0V, VIN = 4.2V
IL
Peak Current Limit (A)
1.15
200
Output Current (mA)
Figure 9. Switch Peak Current Limit vs. Temperature; closed loop
1.2
100
60
85
10µs/Div
200mV/Div
10
Temperature (°C)
200mA/Div
-15
400mA
2.94
-40
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Vi n=4.5V
Iout=650mA
100mA
2.96
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Temperature (°C)
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5V/Div
2V/Div
500mA/DIV
VSW
VOUT
IL
EN
50µs/Div
1V/Div
5V/Div
2V/Div
500mA/DIV
Figure 12. Startup; VIN = 4.2V, VOUT = 3.0V, IOUT<1mA,
RLOAD=3.3kΩ
2V/Div
EN
IL
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VOUT
VSW
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Figure 11. Startup; VIN = 3.6V, VOUT = 3.0V, IOUT<1mA,
RLOAD=3.3kΩ
50µs/Div
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AS1334
Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
5V/Div
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2V/Div
500mA/Div
2V/Div
VSW
VOUT
IL
EN
50µs/Div
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50µs/Div
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5V/Div
2V/Div
500mA/Div
Figure 14. Shutdown Response; VIN=4.2V, VOUT=3.0V,
RLOAD=5Ω
2V/Div
VOUT
2V/Div
2V/Div
VSW
VOUT
IL
1V/Div
100mA/Div
Figure 16. Timed Current Limit Response; VIN=3.6V, VOUT=3.0V
50mV/Div
IL
VIN
Figure 15. Line Transient Response; VIN=3.3V to 3.9V,
IOUT=100mA, VOUT=3.0V
2A/Div
EN
IL
VOUT
VSW
Figure 13. Shutdown Response; VIN=3.6V, VOUT=3.0V,
RLOAD=5Ω
10µs/Div
2V/Div
200mA/Div
VSW
IL
2V/Div
Figure 18. VOUT Ripple in Skip Mode; VIN=3.31V, VOUT=3.0V,
RLOAD=5Ω
10mV/Div
VOUT
5mV/Div
100mA/Div
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IL
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VSW
Figure 17. Output Voltage Ripple; VOUT = 3.0V, IOUT = 200mA
VOUT
ca
50µs/Div
200ns/Div
1µs/Div
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AS1334
Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
Figure 20. RDSON (N-Channel) vs. Temp.; ISW=-200mA
350
350
300
300
250
250
200
150
100
200
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R DSON (m Ω )
150
100
Vi n=2.7V
50
Vi n=2.7V
50
Vi n=3.6V
Vi n=3.6V
Vi n=5.5V
0
-40
-15
10
35
Vi n=5.5V
60
85
0
-40
-15
10
35
60
85
Temperature (°C)
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Temperature (°C)
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R DSON (m Ω )
Figure 19. RDSON (P-Channel) vs. Temp.; ISW=200mA
Figure 21. EN High Threshold vs. VIN
1.2
EN High Threshold (V)
1.15
1.1
1.05
1
0.95
0.9
- 45°C
0.85
+ 25°C
+ 90°C
0.8
2.5
3
3.5
4
4.5
5
5.5
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Supply Voltage (V)
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AS1334
Datasheet - D e t a i l e d D e s c r i p t i o n
8 Detailed Description
The AS1334 is a simple, step-down DC-DC converter optimized for powering portable applications that require low dropout voltages such as
mobile phones, portable communicators, and similar battery powered RFID devices. Besides being packed with numerous features like current
overload protection, thermal overload shutdown and soft start, AS1334 displays the following characteristics:
Its operation is based on current-mode buck architecture with synchronous rectification for high efficiency.
Allows the application to operate at maximum efficiency over a wide range of power levels from a single Li-Ion battery cell.
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Provides for a maximum load capability of 650mA in PWM mode, wherein the maximum load range may vary depending on input voltage,
output voltage and the selected inductor.
Is ranked at an efficiency of around 96% for a 400mA load with a 3.6V input voltage.
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Figure 22. AS1334 - Functional Block Diagram
POK
1.13V
PVIN
VDD
–
Oscillator
+
Current
Sense
FB
PWM
COMP
Error
Amplifier
Mosfet
Control
Logic
Soft Start
SW
Shutdown
Control
AS1334
ni
EN
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Main Control
PGND
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SGND
The size of the external components is reduced by using a high switching frequency (2MHz). Figure 1 on page 1 demonstrates that only three
external power components are required for implementation. Also, the system controller should set EN low during power-up and other low supply
voltage conditions. See Shutdown Mode on page 12.
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AS1334
Datasheet - D e t a i l e d D e s c r i p t i o n
PVIN
VIN
SW
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Figure 23. Typical Operating System Circuit
3.3 µH
VOUT
2.7V to 5.5V
10 µF
FB
AS1334
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VDD
10 µF
EN
System Controller
POK
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ON/OFF
PGND
SGND
8.1 Operating the AS1334
AS1334’s control block turns on the internal PFET (P-channel MOSFET) switch during the first part of each switching cycle, thus allowing current
to flow from the input through the inductor to the output filter capacitor and load. The inductor limits the current to a ramp with a slope of around
(VIN - VOUT) / L, by storing energy in a magnetic field.
During the second part of each cycle, the controller turns the PFET switch off, blocking current flow from the input, and then turns the NFET (Nchannel MOSFET) synchronous rectifier on. As a result, the inductor’s magnetic field collapses, generating a voltage that forces current from
ground through the synchronous rectifier to the output filter capacitor and load.
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While the stored energy is transferred back into the circuit and depleted, the inductor current ramps down with a slope around VOUT / L. The
output filter capacitor stores charge when the inductor current is high, and releases it when low, smoothing the voltage across the load. The
output voltage is regulated by modulating the PFET switch on time to control the average current sent to the load. The effect is identical to
sending a duty-cycle modulated rectangular wave formed by the switch and synchronous rectifier at SW to a low-pass filter formed by the
inductor and output filter capacitor.
The output voltage is equal to the average voltage at the SW pin.
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While in operation, the output voltage is regulated by switching at a constant frequency and then modulating the energy per cycle to control
power to the load. Energy per cycle is set by modulating the PFET switch on-time pulse width to control the peak inductor current. This is done
by comparing the signal from the current-sense amplifier with a slope compensated error signal from the voltage-feedback error amplifier. At the
beginning of each cycle, the clock turns on the PFET switch, causing the inductor current to ramp up. When the current sense signal ramps past
the error amplifier signal, the PWM comparator turns off the PFET switch and turns on the NFET synchronous rectifier, ending the first part of the
cycle.
If an increase in load pulls the output down, the error amplifier output increases, which allows the inductor current to ramp higher before the
comparator turns off the PFET. This increases the average current sent to the output and adjusts for the increase in the load. Before appearing
at the PWM comparator, a slope compensation ramp from the oscillator is subtracted from the error signal for stability of the current feedback
loop. The minimum on time of PFET in PWM mode is 50ns (typ).
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AS1334
Datasheet - D e t a i l e d D e s c r i p t i o n
8.2 Internal Synchronous Rectifier
To reduce the rectifier forward voltage drop and the associated power loss, the AS1334 uses an internal NFET as a synchronous rectifier. The
big advantage of a synchronous rectification is the higher efficiency in a condition where the output voltage is low compared to the voltage drop
across an ordinary rectifier diode. During the inductor current down slope in the second part of each cycle the synchronous rectifier is turned on.
Before the next cycle the synchronous rectifier is turned off.
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There is no need for an external diode because the NFET is conducting through its intrinsic body diode during the transient intervals before it
turns on.
8.3 Power-OK
The POK output indicates if the output voltage is within 90% of the nominal voltage level. As long as the output voltage is within regulation the
open-drain POK output sinks current.
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8.4 Shutdown Mode
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If EN is set to high (>1.2V) the AS1334 is in normal operation mode. During power-up and when the power supply is less than 2.7V minimum
operating voltage, the chip should be turned off by setting EN low. In shutdown mode the following blocks of the AS1334 are turned off, PFET
switch, NFET synchronous rectifier, reference voltage source, control and bias circuitry. The AS1334 is designed for compact portable
applications, such as mobile phones where the system controller controls operation mode for maximizing battery life and requirements for small
package size outweigh the additional size required for inclusion of UVLO (Under Voltage Lock-Out) circuitry.
Note: Setting the EN digital pin low (<0.5V) places the AS1334 in a 0.01µA (typ) shutdown mode.
8.5 Thermal Overload Protection
To prevent the AS1334 from short-term misuse and overload conditions the chip includes a thermal overload protection. To block the normal
operation mode the device is turning the PFET and the NFET off in PWM mode as soon as the junction temperature exceeds 150°C. To resume
normal operation the temperature has to drop below 140°C.
Note: Continuing operation in thermal overload conditions may damage the device and is considered bad practice.
8.6 Current Limiting For Protection
If in the PWM mode the cycle-by-cycle current limit of 1200mA (max.) is reached the current limit feature takes place and protects the device and
the external components. A timed current limiting mode is working when a load pulls the output voltage down to approximately 0.375V. In this
timed current limit mode the inductor current is forced to ramp down to a safe value. This is achieved by turning off the internal PFET switch and
delaying the start of the next cycle for 3.5us. The synchronous rectifier is also turned off in the timed current limit mode.
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The advantage of the timed current limit mode is to prevent the device from the loss of the current control.
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AS1334
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
9 Application Information
9.1 Inductor Selection
For the external inductor, a 3.3µH inductor is recommended. Minimum inductor size is dependant on the desired efficiency and output current.
Inductors with low core losses and small DCR at 2MHz are recommended.
Part Number
L
DCR
Current Rating
Dimensions (L/W/T)
2.2µH
0.070Ω
2.9A
3.9x3.9x1.7mm
3.3µH
0.080Ω
2.4A
3.9x3.9x1.7mm
LPS4018-472ML_
4.7µH
0.125Ω
1.9A
3.9x3.9x1.7mm
Manufacturer
Coilcraft
www.coilcraft.com
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LPS4018-222ML_
LPS4018-332ML_
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Table 5. Recommended Inductor
9.2 Capacitor Selection
9.2.1
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A 10µF capacitor is recommended for CIN as well as a 10µF for COUT. Small-sized X5R or X7R ceramic capacitors are recommended as they
retain capacitance over wide ranges of voltages and temperatures.
Input and Output Capacitor Selection
Low ESR input capacitors reduce input switching noise and reduce the peak current drawn from the battery. Also low ESR capacitors should be
used to minimize VOUT ripple. Multi-layer ceramic capacitors are recommended since they have extremely low ESR and are available in small
footprints.
For input decoupling the ceramic capacitor should be located as close to the device as practical. A 4.7µF input capacitor is sufficient for most
applications. Larger values may be used without limitations.
A 2.2µF to 10µF output ceramic capacitor is sufficient for most applications. Larger values up to 22µF may be used to obtain extremely low output voltage ripple and improve transient response.
Table 6. Recommended Input and Output Capacitor
Part Number
GRM188R60J475KE19
GRM219R60J475KE19
GRM21BR61C475KA88
GRM31CR71E475KA88
GRM188R60J106ME47
C
TC Code
Rated Voltage
Dimensions (L/W/T)
4.7µF
X5R
6.3V
0603
4.7µF
X5R
6.3V
0805
4.7µF
X5R
16V
0805
4.7µF
X7R
25V
1206
10µF
X5R
6.3V
0603
10µF
X5R
6.3V
0805
GRM21BR61A106KE19
10µF
X5R
10V
0805
GRM32DR71C106KA01
10µF
X7R
16V
1210
ca
GRM21BR60J106KE19
22µF
X5R
6.3V
0805
GRM32ER71A226KE20
22µF
X7R
10V
1210
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GRM21BR60J226ME39
Manufacturer
Murata
www.murata.com
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9.3 EN Pin Control
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Drive the EN pin using the system controller to turn the AS1334 ON and OFF. Use a comparator, Schmidt trigger or logic gate to drive the EN pin.
Set EN high (>1.2V) for normal operation and low (<0.5V) for a 0.01µA (typ) shutdown mode. Set EN low to turn off the AS1334 during power-up
and under voltage conditions when the power supply is less than the 2.7V minimum operating voltage. The part is out of regulation when the
input voltage is less than 2.7V.
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Revision 1.09
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AS1334
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
9.4 Layout Considerations
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The AS1334 converts higher input voltage to lower output voltage with high efficiency. This is achieved with an inductor based switching
topology. During the first half of the switching cycle, the internal PMOS switch turns on, the input voltage is applied to the inductor, and the
current flows from PVDD line to the output capacitor (C2) through the inductor. During the second half cycle, the PMOS turns off and the internal
NMOS turns on. The inductor current continues to flow via the inductor from the device PGND line to the output capacitor (C2). Referring to
Figure 24, the AS1334 has two major current loops where pulse and ripple current flow. The loop shown in the left hand side is most important,
because pulse current shown in Figure 24 flows in this path. The right hand side is next. The current waveform in this path is triangular, as shown
in Figure 24. Pulse current has many high-frequency components due to fast di/dt. Triangular ripple current also has wide high-frequency
components. Board layout and circuit pattern design of these two loops are the key factors for reducing noise radiation and stable operation.
Other lines, such as from battery to C1(+) and C2(+) to load, are almost DC current, so it is not necessary to take so much care. Only pattern
width (current capability) and DCR drop considerations are needed.
VIN
3.25V to 5.5V
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Figure 24. Current Loop
i
fOSC = 2MHz
+ C1
i
VDD
PVIN
L1
- 10 µF
3.3 µH
VOUT
SW
EN
FB
PGND
C2
+
10 µF
-
SGND
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POK
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Revision 1.09
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AS1334
Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s
10 Package Drawings and Markings
Table 7. Packaging Code YYWWQZZ
WW
manufacturing week
Q
ZZ
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YY
plant identifier
free choice / traceability code
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year identifier
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Figure 25. TDFN(3x3) 8-pin Marking
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AS1334
Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s
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Figure 26. TDFN(3x3) 8-pin Package
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Revision 1.09
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AS1334
Datasheet - O r d e r i n g I n f o r m a t i o n
11 Ordering Information
The device is available as the standard products shown in Table 8.
Table 8. Ordering Information
AS1334-BTDT-12
ASR2
1.2V
AS1334-BTDT-15
ASR3
1.5V
AS1334-BTDT-18
ASR4
1.8V
AS1334-BTDT-25
ASR5
2.5V
AS1334-BTDT-30
ASQY
3.0V
AS1334-BTDT-33
ASR6
3.3V
1
AS1334-BTDT-xx
Description
650mA, Ultra low Ripple Step Down DC/DC
Converter
650mA, Ultra low Ripple Step Down DC/DC
Converter
650mA, Ultra low Ripple Step Down DC/DC
Converter
650mA, Ultra low Ripple Step Down DC/DC
Converter
650mA, Ultra low Ripple Step Down DC/DC
Converter
650mA, Ultra low Ripple Step Down DC/DC
Converter
650mA, Ultra low Ripple Step Down DC/DC
Converter
Delivery Form
Package
Tape and Reel
TDFN(3x3) 8-pin
Tape and Reel
Tape and Reel
Tape and Reel
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Output
TDFN(3x3) 8-pin
TDFN(3x3) 8-pin
TDFN(3x3) 8-pin
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Marking
Tape and Reel
TDFN(3x3) 8-pin
Tape and Reel
TDFN(3x3) 8-pin
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Ordering Code
xxxx
xxxx
Tape and Reel
TDFN(3x3) 8-pin
1. Non-standard devices are available between 1.2V and 3.4V in 100mV steps. For more information and inquiries contact http://www.austriamicrosystems.com/contact
Note: All products are RoHS compliant.
Buy our products or get free samples online at ICdirect: http://www.austriamicrosystems.com/ICdirect
Technical Support is found at http://www.austriamicrosystems.com/Technical-Support
For further information and requests, please contact us mailto:[email protected]
or find your local distributor at http://www.austriamicrosystems.com/distributor
Design the AS1334 online at http://www.austriamicrosystems.com/analogbench
analogbench is a powerful design and simulation support tool that operates in on-line and off-line mode to evaluate performance and
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generate application-specific bill-of-materials for austriamicrosystems' power management devices.
www.austriamicrosystems.com/DC-DC_Step-Down/AS1334
Revision 1.09
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AS1334
Datasheet
Copyrights
Copyright © 1997-2010, austriamicrosystems AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®.
All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of
the copyright owner.
All products and companies mentioned are trademarks or registered trademarks of their respective companies.
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Disclaimer
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Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale.
austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding
the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at
any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for
current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range,
unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are
specifically not recommended without additional processing by austriamicrosystems AG for each application. For shipments of less than 100
parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location.
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The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not
be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use,
interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing,
performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of
austriamicrosystems AG rendering of technical or other services.
Headquarters
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Contact Information
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austriamicrosystems AG
Tobelbaderstrasse 30
A-8141 Unterpremstaetten, Austria
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Tel: +43 (0) 3136 500 0
Fax: +43 (0) 3136 525 01
For Sales Offices, Distributors and Representatives, please visit:
http://www.austriamicrosystems.com/contact
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