PD - 97492
AUIRFR3504Z
AUTOMOTIVE GRADE
HEXFET® Power MOSFET
Features
l
l
l
l
l
l
l
Advanced Process Technology
Low On-Resistance
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified *
D
G
S
Description
V(BR)DSS
40V
RDS(on) max.
9.0mΩ
ID (Silicon Limited)
77A
ID (Package Limited)
42A
D
Specifically designed for Automotive applications,
this HEXFET® Power MOSFET utilizes the latest
processing techniques to achieve extremely low onresistance per silicon area. Additional features of
this design are a 175°C junction operating temperature, fast switching speed and improved repetitive
avalanche rating . These features combine to make
this design an extremely efficient and reliable device
for use in Automotive applications and a wide variety
of other applications.
G
S
D-Pak
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These
are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in
the specifications is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions.
Ambient temperature (T A) is 25°C, unless otherwise specified.
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
ID @ TC = 25°C
IDM
PD @TC = 25°C
VGS
EAS
EAS (tested )
IAR
EAR
TJ
TSTG
Max.
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Package Limited)
Pulsed Drain Current
c
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy (Thermally Limited)
Single Pulse Avalanche Energy Tested Value
Avalanche Current
Repetitive Avalanche Energy
h
c
d
g
j
Junction-to-Ambient
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W
W/°C
V
mJ
A
mJ
-55 to + 175
°C
Thermal Resistance
Parameter
Junction-to-Case
Junction-to-Ambient (PCB mount)
A
0.60
± 20
77
110
See Fig.12a, 12b, 15, 16
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case )
Mounting Torque, 6-32 or M3 screw
RθJC
RθJA
RθJA
Units
77
54
42
310
90
i
300
10 lbf in (1.1N m)
y
y
Typ.
Max.
Units
–––
–––
–––
1.66
40
110
°C/W
1
04/12/2010
AUIRFR3504Z
Static Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
V(BR)DSS
∆V(BR)DSS/∆TJ
RDS(on)
VGS(th)
gfs
IDSS
IGSS
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min. Typ. Max. Units
40
–––
–––
2.0
32
–––
–––
–––
–––
–––
0.032
8.23
–––
–––
–––
–––
–––
–––
–––
–––
9.0
4.0
–––
20
250
200
-200
Conditions
V VGS = 0V, ID = 250µA
V/°C Reference to 25°C, ID = 1mA
mΩ VGS = 10V, ID = 42A
V VDS = VGS, ID = 250µA
S VDS = 10V, ID = 42A
µA VDS = 40V, VGS = 0V
VDS = 40V, VGS = 0V, TJ = 125°C
nA VGS = 20V
VGS = -20V
e
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
LD
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
Min. Typ. Max. Units
–––
–––
–––
–––
–––
–––
–––
–––
30
9.6
12
15
74
30
38
4.5
45
–––
–––
–––
–––
–––
–––
–––
nC
ns
nH
Conditions
ID = 42A
VDS = 32V
VGS = 10V
VDD = 20V
ID = 42A
RG = 15 Ω
VGS = 10V
Between lead,
e
e
D
LS
Internal Source Inductance
–––
7.5
–––
6mm (0.25in.)
from package
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
–––
–––
–––
–––
–––
–––
1510
340
190
1100
340
460
–––
–––
–––
–––
–––
–––
S
and center of die contact
VGS = 0V
VDS = 25V
ƒ = 1.0MHz
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 32V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 32V
pF
G
f
Diode Characteristics
Parameter
Min. Typ. Max. Units
IS
Continuous Source Current
–––
–––
42
ISM
(Body Diode)
Pulsed Source Current
–––
–––
310
VSD
trr
Qrr
ton
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
–––
–––
–––
–––
18
9.2
1.3
27
14
2
c
Conditions
MOSFET symbol
A
V
ns
nC
showing the
integral reverse
p-n junction diode.
TJ = 25°C, IS = 42A, VGS = 0V
TJ = 25°C, IF = 42A, VDD = 20V
di/dt = 100A/µs
e
e
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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AUIRFR3504Z
Qualification Information†
Automotive
(per AEC-Q101)
Qualification Level
Moisture Sensitivity Level
Machine Model
††
Comments: This part number(s) passed Automotive
qualification. IR’s Industrial and Consumer qualification level
is granted by extension of the higher Automotive level.
D-PAK
MSL1
Class M4
AEC-Q101-002
ESD
Human Body Model
Class H1C
AEC-Q101-001
Charged Device
Model
RoHS Compliant
Class C5
AEC-Q101-005
Yes
Qualification standards can be found at International Rectifiers web site: http//www.irf.com/
Exceptions to AEC-Q101 requirements are noted in the qualification report.
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3
AUIRFR3504Z
1000
1000
100
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
10
1
4.5V
30µs PULSE WIDTH
Tj = 25°C
100
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
10
4.5V
30µs PULSE WIDTH
Tj = 175°C
0.1
1
0.1
1
10
100
0.1
VDS, Drain-to-Source Voltage (V)
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000.0
100.0
T J = 175°C
10.0
T J = 25°C
1.0
VDS = 20V
30µs PULSE WIDTH
0.1
4.0
5.0
6.0
7.0
8.0
9.0
VGS, Gate-to-Source Voltage (V)
10.0
Gfs, Forward Transconductance (S)
ID, Drain-to-Source Current (Α)
60
T J = 175°C
50
40
T J = 25°C
30
20
10
VDS = 10V
380µs PULSE WIDTH
0
0
10
20
30
40
50
ID, Drain-to-Source Current (A)
Fig 3. Typical Transfer Characteristics
4
Fig 4. Typical Forward Transconductance
Vs. Drain Current
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ance
AUIRFR3504Z
2500
VGS, Gate-to-Source Voltage (V)
2000
C, Capacitance (pF)
20
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
C oss = C ds + C gd
Ciss
1500
1000
Coss
500
ID= 42A
VDS= 32V
VDS= 20V
VDS= 8.0V
16
12
8
4
FOR TEST CIRCUIT
SEE FIGURE 13
Crss
0
0
1
10
0
100
20
30
40
50
QG Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000.0
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
10
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
100.0
T J = 175°C
10.0
T J = 25°C
1.0
100µsec
10
1msec
1
VGS = 0V
0.1
0.1
0.2
0.6
1.0
1.4
1.8
VSD, Source-toDrain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
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2.2
10msec
Tc = 25°C
Tj = 175°C
Single Pulse
0
1
10
100
1000
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
5
AUIRFR3504Z
2.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
80
ID , Drain Current (A)
LIMITED BY PACKAGE
60
40
20
0
25
50
75
100
125
150
175
ID = 42A
VGS = 10V
1.5
1.0
0.5
-60 -40 -20
T C , Case Temperature (°C)
0
20 40 60 80 100 120 140 160 180
T J , Junction Temperature (°C)
Fig 10. Normalized On-Resistance
Vs. Temperature
Fig 9. Maximum Drain Current Vs.
Case Temperature
Thermal Response ( Z thJC )
10
1
D = 0.50
0.20
0.10
0.1
R1
R1
0.05
τJ
0.02
0.01
0.01
τJ
τ1
R2
R2
τC
τ2
τ1
τ2
Ci= τi/Ri
Ci i/Ri
SINGLE PULSE
( THERMAL RESPONSE )
τ
Ri (°C/W) τi (sec)
1.117
0.000536
0.5422
0.004428
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
6
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AUIRFR3504Z
15V
+
V
- DD
IAS
A
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
EAS, Single Pulse Avalanche Energy (mJ)
D.U.T
RG
20V
VGS
DRIVER
L
VDS
320
tp
ID
5.0A
6.4A
BOTTOM 42A
280
TOP
240
200
160
120
80
40
0
25
50
75
100
125
150
175
Starting T J, Junction Temperature (°C)
I AS
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
QG
10 V
4.5
QGD
VGS(th) Gate threshold Voltage (V)
QGS
VG
Charge
Fig 13a. Basic Gate Charge Waveform
0
ID = 250µA
3.5
3.0
2.5
2.0
L
DUT
4.0
VCC
-75 -50 -25
0
25
50
75
100 125 150 175
T J , Temperature ( °C )
1K
Fig 14. Threshold Voltage Vs. Temperature
Fig 13b. Gate Charge Test Circuit
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7
AUIRFR3504Z
1000
Avalanche Current (A)
Duty Cycle = Single Pulse
100
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ∆ Tj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
0.01
10
0.05
0.10
1
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
EAR , Avalanche Energy (mJ)
80
TOP
Single Pulse
BOTTOM 1% Duty Cycle
ID = 42A
60
40
20
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy
Vs. Temperature
8
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T jmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
175
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav ) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
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AUIRFR3504Z
D.U.T
Driver Gate Drive
+
-
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
• dv/dt controlled by RG
• Driver same type as D.U.T.
• I SD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
P.W.
Period
*
RG
D=
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
Period
P.W.
+
V DD
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
-
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
*
ISD
VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V DS
V GS
RG
RD
D.U.T.
+
-V DD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
VDS
90%
10%
VGS
td(on)
tr
t d(off)
tf
Fig 18b. Switching Time Waveforms
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9
AUIRFR3504Z
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak Part Marking Information
Part Number
AUFR3504Z
YWWA
IR Logo
XX
or
Date Code
Y= Year
WW= Work Week
A= Automotive, LeadFree
XX
Lot Code
10
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AUIRFR3504Z
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRR
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
TRL
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
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11