Fairchild NDH8504P Dual p-channel enhancement mode field effect transistor Datasheet

February 1997
NDH8504P
Dual P-Channel Enhancement Mode Field Effect Transistor
General Description
Features
TM
SuperSOT -8 P-Channel enhancement mode power field
effect transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state resistance.
These devices are particularly suited for low voltage
applications such as notebook computer power management
and other battery powered circuits where fast high-side
switching, and low in-line power loss are needed in a very small
outline surface mount package.
-2.7 A, -30 V. RDS(ON) = 0.07Ω @ VGS = -10 V
RDS(ON) = 0.115 Ω @ VGS = -4.5 V.
Proprietary SuperSOTTM-8 package design using copper
lead frame for superior thermal and electrical capabilities.
High density cell design for extremely low RDS(ON).
Exceptional on-resistance and maximum DC current
capability.
___________________________________________________________________________________________
5
4
6
3
7
2
8
1
Absolute Maximum Ratings T A = 25°C unless otherwise noted
Symbol
Parameter
NDH8504P
Units
VDSS
Drain-Source Voltage
-30
V
VGSS
Gate-Source Voltage
±20
V
ID
Drain Current - Continuous
(Note 1)
-2.7
A
PD
Maximum Power Dissipation
(Note 1)
0.8
W
TJ,TSTG
Operating and Storage Temperature Range
-55 to 150
°C
- Pulsed
-8
THERMAL CHARACTERISTICS
RθJA
Thermal Resistance, Junction-to-Ambient
(Note 1)
156
°C/W
RθJC
Thermal Resistance, Junction-to-Case
(Note 1)
40
°C/W
© 1997 Fairchild Semiconductor Corporation
NDH8504P Rev.C
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
-30
Typ
Max
Units
-1
µA
OFF CHARACTERISTICS
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = -250 µA
IDSS
Zero Gate Voltage Drain Current
VDS = -24V, VGS = 0 V
V
-10
µA
IGSSF
Gate - Body Leakage, Forward
VGS = 20 V, VDS = 0 V
100
nA
IGSSR
Gate - Body Leakage, Reverse
VGS = -20 V, VDS= 0 V
-100
nA
V
TJ= 55°C
ON CHARACTERISTICS (Note 2)
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = - 250 µA
TJ= 125°C
RDS(ON)
Static Drain-Source On-Resistance
-1
-1.6
-3
-0.8
-1.2
-2.4
VGS = -10 V, ID = -2.7 A
TJ= 125°C
VGS = -4.5 V, ID = -2.1 A
ID(on)
On-State Drain Current
gFS
Forward Transconductance
VGS = -10 V, VDS = -5 V
-8
VGS = -4.5 V, VDS = -5 V
-3
VDS = -10 V, ID = -2.7 A
0.062
0.07
0.088
0.125
0.102
0.115
Ω
A
5.5
S
DYNAMIC CHARACTERISTICS
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
VDS = -15 V, VGS = 0 V,
f = 1.0 MHz
560
pF
340
pF
130
pF
SWITCHING CHARACTERISTICS (Note 2)
tD(on)
Turn - On Delay Time
tr
Turn - On Rise Time
13
25
ns
16
30
ns
tD(off)
tf
Turn - Off Delay Time
35
70
ns
Turn - Off Fall Time
40
80
ns
19
27
nC
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
VDD = -10 V, ID = -1 A,
VGS = -10 V, RGEN = 6 Ω
VDS = -10 V,
ID = -2.7 A, VGS = -10 V
3.8
nC
4.7
nC
NDH8504P Rev.C
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
-0.67
A
-1.2
V
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
IS
Maximum Continuous Drain-Source Diode Forward Current
VSD
Drain-Source Diode Forward Voltage
VGS = 0 V, IS = -0.67 A
(Note 2)
-0.74
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by
design while RθCA is determined by the user's board design.
PD (t ) =
T J−T A
R θJ A(t )
=
T J−T A
R θJ C+R θCA(t )
= I 2D (t ) × RDS(ON)@TJ
Typical RθJA using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:
156oC/W when mounted on a 0.0025 in2 pad of 2oz copper.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
NDH8504P Rev.C
Typical Electrical Characteristics
3
-10
R DS(on), NORMALIZED
-4.0
-8
-3.5
-6
-4
-3.0
I
D
-2
0
DRAIN-SOURCE ON-RESISTANCE
, DRAIN-SOURCE CURRENT (A)
VGS = -10V -6.0 -5.0
-4.5
2.5
VGS = -3.5V
2
-4.0
-4.5
-5.0
1.5
-6.0
-7.0
-10
1
0.5
0
-0.5
-1
-1.5
-2
-2.5
0
-3
-2
I
V DS , DRAIN-SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics.
R DS(on) , NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
R DS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
V GS = -10V
-10
1.2
1
0.8
-25
0
25
50
75
100
T , JUNCTION TEMPERATURE (°C)
125
V GS = -10V
1.6
1.2
25°C
1
-55°C
0.8
0.6
0.4
150
TJ = 125°C
1.4
0
-2
-4
-6
I D , DRAIN CURRENT (A)
J
Figure 3. On-Resistance Variation with
Temperature.
-8
-10
Figure 4. On-Resistance Variation with Drain
Current and Temperature.
-10
T
J
= -55°C
-8
25°C
V GS(th), NORMALIZED
125°C
-6
-4
-2
GATE-SOURCE THRESHOLD VOLTAGE
1.2
V DS = -10V
I D , DRAIN CURRENT (A)
-8
1.8
I D = -2.7A
0.6
-50
-4
-6
, DRAIN CURRENT (A)
Figure 2. On-Resistance Variation with Gate
Voltage and Drain Current.
1.6
1.4
D
VDS = V G S
1.1
1
0.9
0.8
0.7
0.6
-50
0
-1
-2
-3
-4
V GS , GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
-5
I D = -250µA
-25
0
25
50
75
100
T , JUNCTION TEMPERATURE (°C)
125
150
J
Figure 6. Gate Threshold Variation with
Temperature.
NDH8504P Rev.C
Typical Electrical Characteristics
10
3
I D = -250µA
-I , REVERSE DRAIN CURRENT (A)
1.06
1.04
1.02
1
0.98
0.96
0.94
-50
VGS = 0V
1
0.5
T J = 125°C
25°C
0.1
-55°C
0.01
0.001
S
BV DSS , NORMALIZED
DRAIN-SOURCE BREAKDOWN VOLTAGE
1.1
1.08
-25
0
25
50
75
100
TJ , JUNCTION TEMPERATURE (°C)
125
150
0.0001
0.2
0.4
-V
SD
0.6
0.8
1
Figure 8. Body Diode Forward Voltage Variation
with Current and Temperature.
Figure 7. Breakdown Voltage Variation with
Temperature.
1500
10
V
I
600
Ciss
400
Coss
-V GS , GATE-SOURCE VOLTAGE (V)
CAPACITANCE (pF)
1000
200
Crss
100
f = 1 MHz
V GS = 0 V
50
0 .1
0 .2
-V
0 .5
1
2
5
10
, DRAIN TO SOURCE VOLTAGE (V)
DS
20
D
=-5V
-10V
-15V
6
4
2
0
4
8
12
Q g , GATE CHARGE (nC)
16
20
Figure 10. Gate Charge Characteristics.
ton
t d(on)
RL
t off
tr
t d(off)
tf
90%
90%
V OUT
D
R GEN
DS
8
-VDD
V IN
= -2.7A
0
30
Figure 9. Capacitance Characteristics.
VGS
1.2
, BODY DIODE FORWARD VOLTAGE (V)
VOUT
10%
DUT
G
10%
90%
S
V IN
50%
50%
10%
PULSE WIDTH
Figure 11. Switching Test Circuit.
INVERTED
Figure 12. Switching Waveforms.
NDH8504P Rev.C
12
15
10
V DS = -10V
TJ = -55°C
5
RD
9
-I , DRAIN CURRENT (A)
25°C
125°C
6
3
S(O
N)
LIM
0
-3
-6
-9
-12
-15
1m
10
10
1
0.5
0.01
0.1
s
SINGLE PULSE
R
θJ A
= See Note 1
TA = 25°C
0.2
0.5
- V
ID , DRAIN CURRENT (A)
DS
Figure 13. Transconductance Variation with Drain
Current and Temperature.
ms
10
s
DC
V GS = -10V
0.1
0.05
0m
s
1s
A
0
IT
2
D
gFS , TRANSCONDUCTANCE (SIEMENS)
Typical Electrical and Thermal Characteristics
1
2
5
10
, DRAIN-SOURCE VOLTAGE (V)
20
30
Figure 14. Maximum Safe Operating Area.
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
1
D = 0.5
0.1
R θJA (t) = r(t) * R θJA
R JA = See Note 1
θ
0.2
0.1
0.05
P(pk)
0.02
0.01
t1
0.01
0.001
0.0001
0.001
t2
TJ - T
= P * R
(t)
A
θJA
Duty Cycle, D = t 1 / t 2
Single Pulse
0.01
0.1
t 1 , TIME (sec)
1
10
100
300
Figure 15. Transient Thermal Response Curve.
Note:
Thermal characterization performed using the conditions described in note1 .Transient thermal response will change
depending on the circuit board design.
NDH8504P Rev.C
SuperSOTTM-8 Tape and Reel Data and Package Dimensions
SSOT-8 Packaging
Configuration: Figure 1.0
Customized Label
Packaging Description:
F63TNR Label
Anti static Cover Tape
SSOT-8 parts are shipped in tape. The carrier tape is
made from a di ssipat ive (carbo n filled) po ly carbon ate
resin. The cover tape is a multilayer film (Heat Activated
Adhesive in nature) primarily composed of polyester film ,
adhesive layer, sealant, and anti-static sprayed agent.
These reeled parts in standard option are shipped w ith
3,000 units per 13" or 330cm diameter reel. The reels are
dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 500 unit s per 7" or
177cm diameter reel. This and some other options are
further described in the Packagin g Information table.
These full reels are in di vidu ally barcod e labeled and
placed inside a standard intermediate box (ill ustrated in
figure 1.0) made of recyclable corrugated brow n paper.
One box contains two reels maximum. And t hese boxes
are placed ins ide a barcode labeled shipp ing bo x whic h
comes in di fferent sizes depend in g on t he nu mber of parts
shippe d.
Static Dissi pat ive
Emboss ed Carrier Tape
F852
831N
F852
831N
F852
831N
F852
831N
F852
831N
Pin 1
SSOT-8 Packaging Information
Packaging Option
Packaging type
Qty per Reel/Tube/Bag
Reel Size
Box Dimension (mm)
Standard
(no f l ow c ode )
TNR
D84Z
SSOT-8 Unit Orientation
TNR
3,000
500
13" D ia
7" Dia
343x64x343
184x187x47
Max qty per Box
6,000
1,000
Weight per unit (gm)
0.0416
0.0416
Weight per Reel (kg)
0.5615
0.0980
343mm x 342mm x 64mm
Intermediate box for Standar d
and L99Z Opti ons
Note/Comments
F63TNR Label
F63TNR
Label
F63TNR Labe l sa mpl e
184mm x 187mm x 47mm
Pizza Box fo r D84Z Option
F63TNR
Label
SSOT-8 Tape Leader and Trailer
Configuration: Figur e 2.0
LOT: CBVK741B019
QTY: 3000
FSID: FDR835N
SPEC:
D/C1: D9842
D/C2:
QTY1:
QTY2:
SPEC REV:
CPN:
N/F: F
(F63TNR)3
Carrier Tape
Cover Tape
Components
Traile r Tape
300mm mi nimum or
38 empty pockets
Lead er Tape
500mm mi nimum or
62 empty poc kets
August 1999, Rev. C
SuperSOTTM-8 Tape and Reel Data and Package Dimensions, continued
SSOT-8 Embossed Carrier Tape
Configuration: Figur e 3.0
P0
D0
T
E1
F
K0
Wc
W
E2
B0
Tc
A0
D1
P1
User Direction of Feed
Dimensions are in millimeter
Pkg type
A0
B0
SSOT-8
(12mm)
4.47
+/-0.10
5.00
+/-0.10
W
12.0
+/-0.3
D0
D1
E1
E2
1.55
+/-0.05
1.50
+/-0.10
1.75
+/-0.10
F
10.25
mi n
5.50
+/-0.05
P1
P0
8.0
+/-0.1
4.0
+/-0.1
K0
T
Wc
1.37
+/-0.10
0.280
+/-0.150
9.5
+/-0.025
Notes : A0, B0, and K0 dimensions are deter mined with r espec t to t he EIA/Jedec RS-481
rotationa l and lateral movement requi remen ts (see sketches A, B, and C).
0.06
+/-0.02
0.5mm
maximum
20 deg maximum
Typical
component
cavity
center line
B0
Tc
0.5mm
maximum
20 deg maximum component rotation
Typical
component
center line
Sketch A (Si de or Front Sectional View)
A0
Component Rotation
Sketch C (Top View)
Component lateral movement
Sketch B (Top View)
SSOT-8 Reel Configuration: Figur e 4.0
Component Rotation
W1 Measured at Hub
Dim A
Max
Dim A
max
See detail AA
Dim N
7" Diameter Option
B Min
Dim C
See detail AA
W3
13" Diameter Option
Dim D
min
W2 max Measured at Hub
DETAIL AA
Dimensions are in inches and millimeters
Tape Size
Reel
Option
Dim A
Dim B
Dim C
Dim D
Dim N
Dim W1
Dim W2
Dim W3 (LSL-USL)
12mm
7" Dia
7.00
177.8
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
5.906
150
0.488 +0.078/-0.000
12.4 +2/0
0.724
18.4
0.469 – 0.606
11.9 – 15.4
12mm
13" Dia
13.00
330
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
7.00
178
0.488 +0.078/-0.000
12.4 +2/0
0.724
18.4
0.469 – 0.606
11.9 – 15.4
 1998 Fairchild Semiconductor Corporation
July 1999, Rev. C
SuperSOTTM-8 Tape and Reel Data and Package Dimensions, continued
SuperSOT-8 (FS PKG Code 34, 35)
1:1
Scale 1:1 on letter size paper
Di mensions shown below are in:
inches [millimeters]
Part Weight per unit (gram): 0.0416
September 1998, Rev. A
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QFET™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
TinyLogic™
UHC™
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Similar pages