LTC2924 Quad Power Supply Sequencer DESCRIPTIO FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ U ■ Fully Sequence and Monitor Four Supplies – Six with Minimal External Circuitry Cascadable for Additional Supplies Power Off in Reverse Order or Simultaneously Charge Pump Drives External MOSFETs Drives Power Supply Shutdown Pins with No External Pull-Up Resistors 10µA Output Current Allows Soft-Starting of Supplies Done Indicator for Both Power On and Power Off Adjustable Time Delay Between Power Supplies Power Good Timer Power Supply Voltage Monitoring and Power Sequence Error Detection and Reporting Available in a 16-Lead Narrow SSOP Package The LTC®2924 is a power supply sequencer designed for use with external N-channel MOSFETs or power supplies with shutdown pins. Four power supplies can be fully sequenced by a single LTC2924 and up to five supplies can be sequenced to a sixth master supply. The LTC2924 requires a minimum of external components, using only two feedback resistors per sequenced power supply and a single resistor to set hysteresis. An internally regulated charge pump provides gate drive voltages for external logic and sub-logic-level MOSFETs. Adding a single capacitor enables an adjustable time delay between power supplies during both Power On and Power Off sequencing. A second capacitor can be added to enable a power good timer for detecting the failure of any power supply to turn on within the selected time. Errors in power supply sequencing and the control input are detected and reported at the FAULT output. The LTC2924 features precision input comparators which can provide 1% accuracy in monitoring power supply voltages. U APPLICATIO S ■ ■ Sequenced Power Supplies for ASICs with Multiple I/O and Core Voltages Latch-Up Prevention in Systems with Multiple Power Supplies Multiple LTC2924s may be easily cascaded to sequence a virtually unlimited number of power supplies. , LTC and LT are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATIO U Power-Up Sequence VON = 2.64V VOFF = 1.98V 3.3V SHDN Q2 1V VON = 0.93V VOFF = 0.915V 5V SHDN 5V VON = 3.97V VOFF = 2.97V 0.1µF Q1 3V VCC 5V EARLY 10k 10k OUT1 IN1 OUT2 IN2 OUT3 IN3 OUT4 IN4 ON LTC2924 SYSTEM CONTROLLER 1V 5V/DIV 100k 1.62k DONE 2V/DIV TMR ON 5V/DIV VON = 2.79V VOFF = 2.73V 6.04k 5V 3.3V 3V 2V/DIV 10ms/DIV 66.5k 2924 TA01b Power-Down Sequence 5V 3.3V 3V 2V/DIV 1.69k 18.2k 3.09k 1V 20k DONE DONE FAULT TMR 150nF 150nF PGT 5V/DIV HYS/CFG GND 49.9k Q1-Q4: IRL3714S ALL RESISTORS 1% TMR 2V/DIV ON 5V/DIV 2924 TA01a 10ms/DIV 2924 TA01c 2924fa 1 LTC2924 U W U PACKAGE/ORDER I FOR ATIO AXI U RATI GS U W W W ABSOLUTE (Note 1) Supply Voltage (VCC) ................................ –0.3V to 6.5V Input Voltages ON, IN1-IN4 ............................... –0.3V to VCC + 0.3V PGT, TMR, HYS/CFG .................. –0.3V to VCC + 0.3V Open-Drain Output Voltages FAULT, DONE .............................. –0.3V to VCC + 0.3V Output Voltages (OUT1 - OUT4) (Note 5).............. –0.3V to VCC + 4.5V Operating Temperature Range LTC2924C ................................................ 0°C to 70°C LTC2924I ............................................ –40°C to 85°C Storage Temperature Range................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec) .................. 300°C ELECTRICAL CHARACTERISTICS ELECTRICAL CHARACTERISTICS ORDER PART NUMBER TOP VIEW IN1 1 16 ON IN2 2 15 HYS/CFG IN3 3 14 TMR IN4 4 13 GND OUT1 5 12 PGT OUT2 6 11 VCC OUT3 7 10 DONE OUT4 8 9 LTC2924CGN LTC2924IGN GN PART MARKING FAULT 2924 2924I GN PACKAGE 16-LEAD PLASTIC SSOP TJMAX = 125°C, θJA = 130°C/W Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 3V to 6V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS Supply VCC Input Supply Range ICC Input Supply Current ON Threshold VON(TH) ON, Low to High Threshold VOFF(TH) ON, High to Low Threshold IN1-IN4 Threshold VON(TH) IN1-IN4 Low to High Threshold VOFF(TH) IN1-IN4 High to Low Threshold ON, IN1-IN4 Characteristics VFAULT ON, IN1-IN4 High Speed Low Fault Threshold ION(HYS) ON, IN1-IN4 Hysteresis Current Range VON ≥ VON(TH) (Note 2) ION(ERROR) ON, IN1-IN4 Hysteresis Current Error 1 – (ION(HYS)/(0.5/RHYS)), VON(TH) = 1V 0.5µA ≤ ION < 25µA 25µA ≤ ION ≤ 50µA ILEAK ON, IN1-IN4 Leakage (Below Threshold) VON(TH) = 0.5V VON(HYS) ON, IN1-IN4 Minimum Hysteresis Voltage IHYS • RIN (Note 6) OUT1-OUT4 Characteristics VOUT(EN) OUT1-OUT4 Gate Drive Voltage IOUT(EN) OUT1-OUT4 On Current ROUT(OFF) OUT1-OUT4 Off Resistance to GND HYS Characteristics RHYS HYS Current Programming Resistor Range VHYS HYS Programming Voltage IOUTn = 0 OUTn On, VOUT = (VCC + 4V) OUTn Off, IOUT = 2mA (Notes 2, 3) RHYS Tied to GND RHYS Tied to VCC MIN ● TYP MAX 1.5 6 3 0.6000 0.6014 0.6060 0.6074 0.6121 0.6135 V V 0.6020 0.6026 0.6081 0.6087 0.6142 0.6148 V V 0.33 0.5 0.4 0.48 50 V µA ±22 ±10 ±100 % % nA mV VCC + 6 11.2 240 V µA Ω 1M Ω V V 3 ● ● ● ● ● ● ● ● ● 2 ● ● 4 ● VCC + 4.5 8.6 10 ● 10k 0.5 VCC – 0.5 UNITS V mA 2924fa 2 LTC2924 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 3V to 6V, unless otherwise noted. SYMBOL PARAMETER TMR Characteristics ITMR Timer Pin Output Current VTH(HI) Timer High Voltage Threshold PGT Characteristics IPGT Power Good Timer Pin Output Current VPGT Power Good Timer Fault Detected Voltage Threshold DONE Characteristics DONE Pin Pull-Down Resistance to GND RD(LO) DONE Pin Off Leakage Current ID(HI) FAULT Characteristics U L T Pin Pull-Down Resistance to GND RFAULT (LO) F A IFAULT(HI) VFAULT(HI) CONDITIONS FAULT Pin Off Leakage Current RF(EXT) tFAULT tFAULT(MIN) TYP MAX UNITS Timer On, VTMR ≤ 0.9V VCC = 5V ● 4 0.93 5 1 6 1.07 µA V Power Good Timer On, VPGT ≤ 0.9V VCC = 5V ● 4 0.93 5 1 6 1.07 µA V DONE = Low, I = 2mA DONE = High ● ● 100 15 Ω µA FAULT Being Pulled Low Internally, I = 2mA FAULT High ● 400 Ω 2 µA V 0.6 V Voltage Above Which an Externally Generated FAULT Condition Will Not be Detected Voltage Below Which an Externally Generated FAULT Condition Will be Detected External Pull-Up Resistance Externally Commanded FAULT Below VFAULT(LO) to OUT1-OUT4 Pull-Down On Delay Externally Commanded FAULT Minimum Time (Note 4) Below VFAULT(LO) VFAULT(LO) MIN ● 1.6 ● ● 10 ● kΩ µs 1 ● 1 µs Note 4: Determined by design, not production tested. External circuits pulling down on the FAULT pin must maintain the signal below VFAULT(LO) for ≥1µs. Note 5: Internal circuits may drive the OUTn pins higher than the Absolute Maximum Ratings. Note 6: RIN is the parallel combination of the two resistors forming the resistive divider connected to the ON and IN1-IN4 pins. Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: Hysteresis current must be 500nA minimum. Hysteresis current may exceed 50µA, but accuracy is not guaranteed. Note 3: HYS/CFG pin must be pulled to GND or VCC with an external resistor. See Applications Information for details. TYPICAL PERFOR A CE CHARACTERISTICS U W ICC vs VCC 14 IOUT1-4 = –10µA RHYS = 51k 2.1 VOUT(EN) vs VCC IOUT1-4 < 1µA 11 10 ON HIGH 1.7 VOUT (V) ICC (mA) 12 VCC = 6V 12 1.9 1.5 1.3 VCC = 3V 8 6 10 9 4 ON LOW 1.1 0.9 VOUT(EN) vs IOUT VOUT (V) 2.3 3 3.5 4 4.5 VCC (V) 5 8 2 5.5 6 2924 G01 0 ONE OUTPUT DRIVING CURRENT 0 2 4 6 IOUT (µA) 8 10 12 2924 G02 7 2 3 4 VCC (V) 5 6 2924 G03 2924fa 3 LTC2924 TYPICAL PERFOR A CE CHARACTERISTICS U W 55 RDONE vs VCC 200 180 RFAULT AT 2mA (Ω) RDONE AT 2mA (Ω) 50 45 40 35 30 RFAULT vs VCC 160 140 120 100 3 5 4 80 6 5 4 3 VCC (V) 6 VCC (V) 2924 G04 45 2924 G05 OUTn (Off) ISAT vs Temperature 35 VOUT = 5V 40 VOUT = 5V 30 VCC = 6V ISAT (mA) ISAT (mA) 35 OUTn (Off) ISAT vs VCC 30 25 25 20 20 15 VCC = 3V 10 20 40 60 –60 –40 –20 0 TEMPERATURE (°C) 15 80 100 10 2.5 3 3.5 4 4.5 5 5.5 6 6.5 VCC (V) 2924 G06 2924 G07 2924fa 4 LTC2924 PI FU CTIO S U U U IN1-IN4 (Pins 1, 2, 3, 4): Sequenced Power Supply Monitor Input. Connect this pin to an external resistive divider between each sequenced power supply and GND. During Power On sequencing, 0.61V (typ) at this pin indicates that the sequenced power supply (enabled with each of the OUT1-OUT4 pins) has reached the desired Power On sequence voltage. A hysteresis current (programmed by the HYS pin) is sourced out of each of the IN1-IN4 pins after the 0.61V threshold is detected. During the Power Off sequence, 0.61V at this pin indicates that the sequenced power supply has reached the desired Power Off voltage. The hysteresis current is removed after the 0.61V threshold is detected. OUT1-OUT4 (Pins 5, 6, 7, 8): Sequenced Power Supply Enable. Connect this pin to the shutdown pin or an external series N-channel MOSFET gate for each power supply being sequenced. (A low at this pin means the sequenced power supply is commanded to turn off.) When disabled, each output is connected to GND with a resistance of <240Ω. When enabled, each output is connected to an internally generated charge pump supply (nominally VCC + 5V) via an internal 10µA (typ) current source. FAULT (Pin 9): Fault Pin. Pull this pin high with an external 10k resistor. The LTC2924 will pull this pin low if a fault condition is detected (see Applications Information for details). Pulling this pin low externally causes a simultaneous unsequenced Power Off. DONE (Pin 10): Done Pin. Pull this pin high with an external 10k resistor. This open-drain output pulls low at the completion of the Power-On sequence. At the end of the Power Off sequence, the LTC2924 floats this pin. For cascading multiple LTC2924s, see Application Information for connecting the DONE pin. VCC (Pin 11): LTC2924 Power Supply Input. All internal circuits are powered from this pin. VCC should be connected to a low noise power supply voltage and should be bypassed with at least a 0.1µF capacitor to the GND pin in close proximity to the LTC2924. PGT (Pin 12): Power Good Timer. The PGT pin sets the time allowed for a power supply to turn on after being enabled with the OUT1-OUT4 pins. Connecting a capacitor between this pin and ground programs a 200mS/µF duration. The PGT pin is reset before each of the OUT1-OUT4 pins are asserted. If the voltage at the PGT pin reaches 1V, a fault condition is asserted. The PGT pin must be connected directly to ground to disable the power good timer function. GND (Pin 13): Ground. All internal circuits are returned to the GND pin. Connect this pin to the ground of the power supplies that are being sequenced. TMR (Pin 14): Timer. A capacitor connected between this pin and ground sets the time delay between a supply ready (IN1-IN4) signal and the enabling of the next power supply in the sequence (OUT1-OUT4), with a 200mS/µF duration. The TMR pin may be left floating if no delay is required between supplies being sequenced on or off. If an internal fault condition occurs, TMR will indicate so by going to VCC until the fault condition is cleared. Do not connect any other circuits to the TMR pin. HYS/CFG (Pin 15): Hysteresis Current Setting and Cascade Configuration. Connecting a resistor between this pin and GND programs a 0.5/REXT (typ) hysteresis current which is sourced out of each IN and ON pin. When multiple LTC2924s are cascaded, the HYS/CFG pin is also used to configure the position of the first LTC2924. See Applications Information for details. ON (Pin 16): On Pin. Commands the LTC2924 to sequence the power supplies up (Power On sequence) or down (Power Off sequence). Typically connected to a system controller. Hysteresis current is applied to this pin when above 0.61V (typ). This pin has a precision 0.61V threshold and can be used to sense a nonsequenced power supply’s voltage to start the Power On sequence. See Applications Information for details. For cascading multiple LTC2924s, see Applications Information for connecting the ON pin. 2924fa 5 LTC2924 W FU CTIO AL DIAGRA U U 11 VCC IH VCP 16 ON 10µA + – 0.61V OUT1 5 IH VCP 1 IN1 0.61V + 1V 0.5V – 0.61V OUT2 VCP CLOCK IN2 + 10µA CHARGE PUMP – 0.61V 6 UVLO IH 2 10µA INTERNAL REFERENCE 5 IH VCP OUT3 7 4 VCP 3 IN3 + 10µA LOGIC – 0.61V OUT4 8 IH 4 IN4 + LAST IH HYS/CFG FIRST DETECT FAULT 0.5V 5µA TMR 1V 9 5µA + + 14 10 – 0.61V 15 DONE – 1V PGT 12 – GND 13 2924 BD 2924fa 6 LTC2924 U OPERATIO PS1 VPS1(ON) PS3 VPS3(ON) PS2 VPS1(OFF) VPS2(ON) PS4 VPS3(OFF) VPS4(ON) 0V VPS2(OFF) VPS4(OFF) TMR* ON DONE 2924 F01 *TMR IS CAPACITOR ADJUSTABLE Figure 1. Power On and Power Off Sequence for Four Supplies The LTC2924 is a power supply sequencer designed for use with external N-channel MOSFETs or power supplies with shutdown pins. Four power supplies can be fully sequenced by a single LTC2924 (see Figure 1). An internally regulated charge pump provides (VCC + 5V) gate voltages for driving external logic-level and sub-logic level MOSFETs. Adding a single capacitor enables an adjustable time delay between power supplies during both Power On and Power Off sequencing. A second capacitor can be added to enable a power good timer which detects the failure of any power supply to turn on within the set time. The ON pin signal is used to command the LTC2924 to start the Power On and Power Down sequences. To command the Power On sequence, the ON pin is pulled above 0.61V by a system controller or a resistive divider from a power supply. A voltage comparator senses the ON command and signals the sequencing logic to start the Power On sequence. When the Power On sequence starts, the TMR grounding switch is released and a 5µA current source charges an external capacitor, CTMR (see Figure 2). When the voltage on this capacitor exceeds 1V, a comparator signals the ON 0.61V 1V TMR OUT1 IN1 0.61V OUT2 IN2 0.61V OUT3 IN3 0.61V OUT4 IN4 0.61V DONE 2924 F02 Figure 2. On Sequence for Four Supplies 2924fa 7 LTC2924 U OPERATIO logic, which starts the charge pump and enables OUT1 to turn on the first power supply. The power good timer circuit is also enabled by turning off the switch that is shorting the external capacitor to ground and enabling a 5µA current source to charge the CPGT capacitor. The output circuit responds by opening a switch, which is shorting the OUT1 pin to ground and enabling a 10µA current source, which is connected to the charge pump. The OUT1 pin can be connected to either the shutdown pin of a power supply or the gate of a N-channel MOSFET that is in series with the output of the sequenced power supply. As the power supply turns on, the resistive divider connected to the IN1 pin starts to drive up the voltage at the IN1 pin. When the voltage at this pin exceeds 0.61V, the comparator signals the logic that the first power supply is on. At this time a current is sourced out of the IN1 pin which serves as the hysteresis current for the input comparator. This allows the application to choose a lower Power Off voltage sense during the Power Off sequence. The power good timer (PGT) circuit is signaled and resets the PGT capacitor. The timer circuit is enabled and the cycle repeats until the last power supply has turned on. O N E pin When the last power supply has turned on, the D pull-down switch is turned on to signal that the Power On sequence has completed. If a power supply fails to turn on after it is enabled and the voltage at the PGT pin exceeds 1V, the LTC2924 will disable all power supplies by pulling all OUT pins to ground. A fault condition will be indicated by the FAULT pin pulling low. The hysteresis current sourced at the ON pin and each IN pin is set at the HYS/CFG pin. The current is determined by an external resistor nominally pulled to ground. The hysteresis current is 0.5V/RHYS. The Power Off sequence is initiated by pulling the ON pin below 0.61V after a Power On sequence has completed (see Figure 3). The Power Off sequence turns off the power supplies in the reverse order of the Power On sequence. OUT4 is turned off first. The timer function is used between each supply being sequenced down. The PGT is not used. The end of the Power Off sequence is indicated by the LTC2924 floating the DONE pin. ON 0.61V TMR OUT4 IN4 0.61V OUT3 IN3 0.61V OUT2 IN2 0.61V OUT1 IN1 0.61V DONE 2924 F03 Figure 3. 4-Power Supply Power Off Sequence 2924fa 8 LTC2924 APPLICATIO S I FOR ATIO U W U U Up to five supplies can be sequenced to a sixth master supply by a single LTC2924 (Figure 4). The turn on of the first power supply is sensed by the ON pin. Power supplies two through five are enabled by the OUT1 through OUT4 pins, and their turn on sensed by the IN1 through IN4 pins respectively. The last power supply is enabled by the DONE pin, which is generally connected through an inverter. This application is used where power supplies are sequentially sequenced on and the turn off is simultaneous. Multiple LTC2924s can be cascaded to facilitate sequencing of eight or more power supplies. See the Cascading Multiple LTC2924s section. Selecting the Hysteresis Current and IN Pin Feedback Resistors The IN1-IN4 pins are connected to a sequenced power supply with a resistive divider. The resistors are calculated by first selecting a hysteresis current, IHYS, and calculating RHYS: RHYS = 0.5V ; 0.5µA ≤ IHYS ≤ 50µA IHYS For each sequenced power supply, choose a voltage when the power supply is considered to be On during PS1 SHDN VOUT PS2 SHDN VOUT PS3 SHDN VOUT PS4 SHDN VOUT PS5 SHDN VOUT PS6 SHDN VOUT VCC OUT1 VCC EARLY* SYSTEM CONTROLLER OUT2 TURN OFF *VCC EARLY MUST BE ON BEFORE SEQUENCING SUPPLIES LTC2924 ON IN1 OUT3 IN2 OUT4 IN3 DONE IN4 FAULT GND 2924 F04 Figure 4. 6-Power Supply Sequencer Block Diagram 2924fa 9 LTC2924 APPLICATIO S I FOR ATIO U W U U a Power On sequence (VON) and Off during a Power Off sequence (VOFF). RHYS = Referring to Figures 5 and 6, each set of resistors can then be calculated by: 0.5V = 10kΩ 50µA In Figure 5, VON = 2.2V and VOFF = 1V. Using the equations provided above: VON – VOFF IHYS R • 0.61V RA = B VON – 0.61V RB = 2.2V – 1V = 24kΩ 50µA 24kΩ • 0.61V = 9.2kΩ RA = 2.2V – 0.61V RB = In the following example (Figure 5) IHYS is 50µA. This corresponds to a RHYS resistor of: IHYS VPS IHYS IN + – RB Hysteresis Voltage Check After calculating the resistors RB and RA, check to make sure the hystersis voltage at the ON and IN1-IN4 pins is greater than 4mV. Use the following equation: VON = 2.2V VOFF = 1V IRB RA VHYS = ( VON – VOFF ) • RA RA + RB For this example: IFB = IRB + IHYS 0.61V VHYS = 2924 F05 Figure 5. Designing IHYS, Feedback Resistors (2.2V – 1V) • 9.2kΩ = 0.33V 9.2kΩ + 24kΩ which is greater than 4mV. VON ≥ 3.01V VOFF ≤ 2.68V 3.3V SHDN POWER SUPPLY 1 POWER SUPPLY 2 SHDN POWER SUPPLY 3 5V VON ≥ 4.49V VOFF ≤ 3.99V 1.6V SHDN VON ≥ 1.43V VOFF ≤ 1.27V VON ≥ 2.25V VOFF ≤ 2V 2.5V SHDN POWER SUPPLY 4 0.1µF 5V EARLY* 24.9k 15.8k 49.9k 33.2k 9.31k 11.81k 7.87k 8.45k VCC OUT1 10k 10k OUT2 LTC2924 IN1 IN2 OUT3 IN3 OUT4 IN4 ON SYSTEM CONTROLLER DONE FAULT TMR *5V EARLY MUST BE ON BEFORE SEQUENCING SUPPLIES 150nF 150nF PGT HYS/CFG GND 49.9k 2924 TA03 Figure 6. Typical Power Supply Sequencer 2924fa 10 LTC2924 APPLICATIO S I FOR ATIO U W U U Minimize stray capacitance on the ON and IN1-IN4 pins. As a practical matter, lay out these resistors as close to the LTC2924 as possible. Details of Resistor Calculations In this example, the voltage at the IN pins is 0.61V when the LTC2924 detects that the power supply is On during a Power On sequence or Off during a Power Off sequence. The delta voltage, ΔV, represents the difference: ΔV = 2.2V – 1V = 1.2V This delta voltage on RB will be equal to the product of hysteresis current IHYS and RB. Therefore: RB = 1.2V ∆V = = 24kΩ IHYS 50µA The current IRB at the Power On voltage of 2.2V is: 2.2V – 0.61V IRB = = 66µA 24k During the Power On sequence, IHYS = 0, so IFB is equal to IRB and RA is: RA = 0.61 = 9.2k 66µA VOFF Precaution Use caution if designs call for VOFF voltages less than ~0.8V. Many loads stop using significant current at this level, and the power supply may take a long time to go below this voltage. If VOFF voltages at or less than this voltage are necessary, consider adding an extra resistive load at the output of the power supply to ensure it discharges in a reasonable amount of time. Selecting the Timing Capacitor During the Power On sequence, the timer is used to create a delay between the time one supply reaches the On threshold and the next supply is enabled. During the Power Off sequence, the timer is used to create a delay between the time one supply reaches the Off threshold and the next supply is disabled. Select the timing capacitor with the following equation: CTMR [µF] = tDELAY • 5µF/s Leaving the TMR pin unconnected will generate the minimum delay. The accuracy of the time delay will be affected by the capacitor leakage (the nominal charge current is 5µA) and capacitor tolerance. A low leakage ceramic capacitor is recommended. Selecting the Power Good Timer (PGT) Capacitor During the Power On sequence, the PGT can be used to detect the failure of a power supply to reach the desired On voltage. The PGT is enabled each time a power supply is enabled by the OUT1-OUT4 pins. The PGT is reset each time an IN1-IN4 pin detects that a power supply is at the desired On voltage. Select the PGT timeout capacitor with the following equation: CPGT [µF] = tPGT • 5µF/s If no PGT is desired, the PGT pin must be shorted to ground. The accuracy of the PGT timeout will be affected by the capacitor leakage (the nominal charge current is 5µA) and capacitor tolerance. A low leakage ceramic capacitor is recommended. 2924fa 11 LTC2924 APPLICATIO S I FOR ATIO U W U U VCC TMR RHYS ON RHYS VCC HYS/CFG TMR VCC HYS/CFG GND GND ON LTC2924 PGT ON LTC2924 PGT IN1 OUT1 IN1 OUT1 IN2 OUT2 IN2 OUT2 IN3 OUT3 IN3 OUT3 OUT4 IN4 IN4 VCC OUT4 10k DONE DONE DONE VCC FAULT FAULT 10k FAULT 2924 F07 Figure 7. Cascading Two LTC2924s to Fully Sequence Up to Eight Power Supplies VCC TMR VCC HYS/CFG RHYS ON GND RHYS TMR VCC HYS/CFG GND RHYS TMR VCC HYS/CFG GND ON LTC2924 PGT ON LTC2924 PGT ON LTC2924 PGT IN1 OUT1 IN1 OUT1 IN1 OUT1 IN2 OUT2 IN2 OUT2 IN2 OUT2 IN3 OUT3 IN3 OUT3 IN3 OUT3 OUT4 IN4 OUT4 IN4 IN4 DONE FAULT OUT4 DONE DONE FAULT VCC FAULT 10k VCC DONE 10k FAULT 2924 F08 Figure 8. Cascading Three LTC2924s to Fully Sequence Up to 12 Power Supplies Cascading Multiple LTC2924s Two or more LTC2924s may be cascaded to fully sequence 8,12 or more power supplies. Figures 7 and 8 show how to configure the LTC2924 to sequence 8 and 12 power supplies. To sequence more power supplies, use the circuit in Figure 8 and add more LTC2924s in the middle. Notice that the last LTC2924 in the cascade string must have a pull-up resistor on the DONE pin. Any LTC2924 that is not the first in the cascade string should have the hysteresis current setting resistor, RHYS, pulled to VCC instead of ground. The value of the RHYS resistor remains unchanged. The FAULT pins should all be connected together and pulled up with a single 10k resistor. Care should be taken when designing a circuit cascading multiple LTC2924s. Use the following guidelines: • All VCC and ground pins for the LTC2924s in the cascade chain must be connected to the same power supply. • The ground pins should be connected via a ground plane. • Cascaded LTC2924s communicate using a combination of levels and pulses which do not look like the normal output of a DONE pin nor input to an ON pin. Do not connect any other components to the node between the DONE and ON pins. Keep the parasitic capacitance on this node below 75pF. Care should be taken when routing a circuit trace between DONE and ON. If possible, run the trace adjacent to the ground plane, and/or shield the trace with a ground trace on either side. Leakage currents must be maintained below 2µA on this node. 2924fa 12 LTC2924 APPLICATIO S I FOR ATIO U W U U PS1 PS2 LTC2924 IN1 OUT1 IN2 OUT2 IN3 OUT3 IN4 OUT4 2924 F09 Figure 9. Connecting Unused OUT and IN Pins Connecting Unused OUT and IN Pins Clearing the Fault Condition Figure 9 shows how to connect unused OUT and IN pins on the LTC2924. Unused OUT-IN pairs must be connected together to ensure proper operation. In order to clear the fault condition within the LTC2924, the following conditions must exist: Fault Detection • The ON pin must be below 0.61V The LTC2924 has sophisticated fault detection which can detect: • In the case of an externally generated fault, the FAULT pin must not be pulled down. • Power On and Power Off sequence errors Fault Condition Indicator • System controller command errors If the LTC2924 receives a commanded fault (a cascaded LTC2924 or an external source pulls down on the FAULT pin) the LTC2924 will pull the TMR pin low. If the LTC2924 has detected the fault itself (from its internal fault detection circuits) it will indicate so by raising the TMR pin to VCC. This internal/external fault indicator can be especially helpful while searching for the source of a fault condition when multiple LTC2924s are cascaded. • Power On timeout failure (with the power good timer enabled) • Externally commanded faults (FAULT pin pulled low) If any of the above faults are detected, the LTC2924 immediately pulls the OUT1-OUT4 pins low turning off all of the power supplies. If the fault condition is detected in one of the supplies controlled by the LTC2924 (an “internally generated” fault), the FAULT pin is immediately pulled low indicating the fault condition. • All four IN pins must be below 0.61V If a fault occurs when the ON pin is high, the fault status indication on the TMR pin will remain valid until the ON pin goes low. 2924fa 13 LTC2924 APPLICATIO S I FOR ATIO U W U U Note that the TMR pin may take a while to reach the VCC voltage. The pin is pulled to VCC with the same 5µA current source used for the TMR function. The larger the timer capacitor, the longer this will take. To estimate the amount of time required for the TMR pin to reach VCC in a fault condition, multiply the normal timer duration by VCC (in Volts). See Figures 7 and 8 for FAULT pin connections when two or more LTC2924 chips are cascaded. System Controller ON Command Errors Sequence Errors The same is true for the Power Off sequence. If the LTC2924 has completed the Power On sequence and the ON pin goes low, the ON pin must remain below 0.61V until the Power Off sequence has completed. Raising the ON pin above 0.61V before the Power Off sequence has completed is considered a fault condition. Any OUTn pins that are still high will immediately be pulled low and the FAULT pin will be pulled low. The LTC2924 keeps track of power supplies that should be on during the Power On sequence and the Power Off sequence. The LTC2924 also monitors each IN pin after all of the power supplies have sequenced on. If a power supply (as monitored at the IN1-IN4 pins) goes low when it should be high, a fault condition is detected. All four OUT pins are pulled low and the FAULT pin will be pulled low. The precision voltage threshold for detection of a sequence error at any of the IN1-IN4 pins is the same as the normal threshold (~0.61V). The precision voltage comparators used in the LTC2924 employ a sampled technique to improve accuracy. The sample time is approximately 20µs. To improve the speed of detection for a sequence error, a second high speed comparator is used for detecting a low power supply. The voltage threshold for the high speed comparators is approximately 0.4V (VON(FAULT)). Voltages sensed below this threshold when a power supply should be ON will cause a fault in ~1µs. Once the LTC2924 receives the Power On command via the ON pin, the ON pin must remain above 0.61V until the O N E is asserted). Power On sequence has completed (e.g. D Removing the ON command before the LTC2924 Power On sequence has completed is considered a fault condition. All of the OUT1-OUT4 pins that are already high will be pulled low and the FAULT pin will be pulled low. Power On Timeout Errors If the LTC2924 PGT is being used (not tied to ground) a fault condition will be detected when the PGT pin goes above ~1V. If this occurs during Power On, all of the OUT1-OUT4 pins that are already high will be pulled low and the FAULT pin will be pulled low. Externally Commanded Faults If an external circuit pulls the FAULT pin low, an external fault condition is detected and all OUT pins will be pulled low. After sensing the Externally Commanded Fault, the LTC2924 will also pull down on the FAULT pin until the conditions for clearing the fault condition exist (see Clearing the Fault Condition). 2924fa 14 LTC2924 TYPICAL APPLICATIO S U Series MOSFET Power Supply Sequencer Q1 1V VON = 0.93V VOFF = 0.91V 0.1µF Q2 3.3V VON = 2.79V VOFF = 2.73V 0.1µF Q3 5V VON = 4.21V VOFF = 3.76V 0.1µF 0.1µF Q4 5V EARLY VON = 3.32V VOFF = 2.80V 0.1µF VCC 10k 10k OUT1 IN1 OUT2 IN2 OUT3 IN3 OUT4 IN4 ON LTC2924 SYSTEM CONTROLLER 52.3k 45.3k 6.04k 1.62k 11.8k 7.68k 1.69k 3.09k DONE FAULT TMR 150nF 150nF PGT HYS/CFG GND 49.9k Q1-Q4: IRL3714S ALL RESISTORS 1% 2924 TA02a Power-Up Sequence Power-Down Sequence 5V 5V 3.3V 2V/DIV 3.3V 2V/DIV 1V 1V 10V/DIV DONE 10V/DIV DONE 2V/DIV ON 2V/DIV ON 2V/DIV TMR 2V/DIV TMR 25ms/DIV 2924 TA02b 25ms/DIV 2924 TA02c 2924fa 15 LTC2924 TYPICAL APPLICATIO S U Shutdown Pin Power Supply Sequencer VON ≥ 3.01V VOFF ≤ 2.68V 3.3V SHDN POWER SUPPLY 1 POWER SUPPLY 2 SHDN POWER SUPPLY 3 5V VON ≥ 4.49V VOFF ≤ 3.99V 1.6V SHDN VON ≥ 1.43V VOFF ≤ 1.27V VON ≥ 2.25V VOFF ≤ 2V 2.5V SHDN POWER SUPPLY 4 0.1µF 5V EARLY* 24.9k 15.8k 49.9k 33.2k 9.31k 11.81k 7.87k 8.45k VCC OUT1 10k 10k OUT2 LTC2924 IN1 IN2 OUT3 IN3 OUT4 IN4 ON SYSTEM CONTROLLER DONE FAULT HYS/CFG TMR *5V EARLY MUST BE ON BEFORE SEQUENCING SUPPLIES 150nF PGT 150nF GND 49.9k 2924 TA03 Power On Sequence Timer Delay Longer than Power Off Sequence Timer Delay VCC IN1 0.1µF VCC OUT1 OUT2 IN2 IN3 IN4 ON TMR 150nF 150nF LTC2924 OUT3 OUT4 PGT VCC FAULT 10k GND DONE 2924 TA04 2N7002 POWER ON TIMER DELAY = 30ms POWER OFF TIMER DELAY = 15ms 2924fa 16 LTC2924 TYPICAL APPLICATIO S U 2-Supply Sequencer with Delayed Sense Pin, One Channel Unused PARASITIC RESISTANCE Q1 OUT+ MODULE VOUT VON ≥ 4.64V 5V VOFF ≤ 4V Q2 SENSE+ D1 5V DC/DC 3.3V VOUT VON ≥ 2.98V 3.3V VOFF ≤ 2.65V 1M SHDN 0.1µF 10k 10k OUT4 VCC OUT3 IN4 OUT2 IN3 64.9k 33.2k 9.83k 8.55k IN2 OUT1 LTC2924 ON IN1 SYSTEM CONTROLLER D1: 1N5711 Q1, Q2: IRL3714S FAULT PGT DONE HYS TMR GND 49.9k 150nF 150nF 2924 TA05a Power-Off Power-On REMOTE SENSE DISABLE REMOTE SENSE ENABLE 5V 5V 3.3V 2V/DIV 3.3V 2V/DIV DONE ON 1V/DIV 1V/DIV TMR 25ms/DIV 2924 TA05b 1V/DIV ON 1V/DIV TMR 25ms/DIV 2924 TA05c 2924fa 17 LTC2924 TYPICAL APPLICATIO S U Precision Negative Rail Sequencer Q1 –5V 0.1µF VON – 4.5V VOFF – 3.9V 10k 1M 1.36k – 7k LM321 + 100k 2N3906 SOT-23 Q2 3V VON = 2.79V VOFF = 2.73V 0.1µF Q3 5V VON = 4.21V VOFF = 3.76V 0.1µF 0.1µF Q4 5V EARLY VON = 3.32V VOFF = 2.80V 0.1µF VCC 10k 10k OUT1 IN1 OUT2 IN2 OUT3 IN3 OUT4 IN4 ON LTC2924 SYSTEM CONTROLLER 52.3k 45.3k 6.04k 11.8k 7.68k 1.69k DONE FAULT TMR 150nF 150nF PGT HYS/CFG GND 49.9k Q1-Q4: IRL3714S ALL RESISTORS 1% 2924 TA06a Power-Up Sequence Power-Down Sequence 5V 3.3V 5V/DIV 5V 3.3V 5V/DIV –5V 5V/DIV DONE 2V/DIV TMR ON 2V/DIV 10ms/DIV 2924 TA07b –5V DONE 5V/DIV 2V/DIV TMR 2V/DIV 10ms/DIV 2924 TA07c ON 2924fa 18 LTC2924 PACKAGE DESCRIPTIO U GN Package 16-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641) .189 – .196* (4.801 – 4.978) .045 ±.005 16 15 14 13 12 11 10 9 .254 MIN .009 (0.229) REF .150 – .165 .229 – .244 (5.817 – 6.198) .0165 ± .0015 .150 – .157** (3.810 – 3.988) .0250 BSC RECOMMENDED SOLDER PAD LAYOUT 1 .015 ± .004 × 45° (0.38 ± 0.10) .007 – .0098 (0.178 – 0.249) 2 3 4 5 6 7 .0532 – .0688 (1.35 – 1.75) 8 .004 – .0098 (0.102 – 0.249) 0° – 8° TYP .016 – .050 (0.406 – 1.270) .008 – .012 (0.203 – 0.305) TYP .0250 (0.635) BSC GN16 (SSOP) 0204 NOTE: 1. CONTROLLING DIMENSION: INCHES INCHES 2. DIMENSIONS ARE IN (MILLIMETERS) 3. DRAWING NOT TO SCALE *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 2924fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LTC2924 TYPICAL APPLICATIO U 12V 3-Supply Sequencer with LTC2924 Power Supplied by a Zener Shunt Regulator 12V SYSTEM 12V SUPPLY µC VCC1 VCC2 ON ≥ 1.1V, OFF ≤ 1.09V VIN 1.2V SHDN RESET_B 1k 1.24k FPGA VCC1 VCC2 ON ≥ 3V, OFF ≤ 2.8V VIN 3.3V SHDN 20k 5.11k VIN 2.5V SHDN 1.5k 7.68k OUT4 IN4 2.94k OUT3 LTC2924 IN3 OUT2 VCC 5.1V ZENER BZX84C5V1 VCC2 20k 49.9k ON ASIC VCC1 ON ≥ 2.2V, OFF ≤ 2V VCC IN2 0.1µF VCC OUT1 10k IN1 HYS/CFG 49.9k TMR GND 10k DONE FAULT PGT 2924 TA08 150nF 150nF RELATED PARTS PART NUMBER LTC2920-1/ LTC2920-2 LTC2921/LTC2922 LTC2923 LTC2925 LTC2926 LTC2927 DESCRIPTION Single/Dual Power Supply Margining Controller Power Supply Tracker with Input Monitors Power Supply Tracking Controller Multiple Power Supply Tracking Controller Master Controlled Power Supply Tracker Single Power Supply Tracker COMMENTS Symmetric/Asymmetric High and Low Voltage Margining 3 (LTC2921) or 5 (LTC2922) Remote Sense Switching Up to 3 Supplies Power Good Timer, Remote Sense Switch Closed Loop (Feedback) Tracking for 3 Supplies For Point of Load or Distributed Applications 2924fa 20 Linear Technology Corporation LT/LT 1005 REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LINEAR TECHNOLOGY CORPORATION 2005