® LY61L102416A 1024K X 16 BIT HIGH SPEED CMOS SRAM Rev. 1.4 REVISION HISTORY Revision Description Issue Date Rev. 1.0 Rev. 1.1 Rev. 1.2 Initial Issued Add 48 pin BGA package type. 1.“CE# ≧VCC - 0.2V” revised as ”CE# ≦0.2” for TEST CONDITION of Average Operating Power supply Current Icc1 on page3 2.Revised ORDERING INFORMATION Page11 1. Revise “TEST CONDITION” for VOH, VOL on page 3 IOH = -8mA revised as -4mA IOL =4mA revised as 8mA 2. Revise VIH(max) & VIL(min) note on page 3 VIH(max) = VCC + 2.0V for pulse width less than 6ns. VIL(min) = VSS - 2.0V for pulse width less than 6ns. Revised the address pin sequence of pin configuration of 48 pin TSOP-I on page 2 in order to be compatible with industry convention. (No function specifications and applications have been changed and all the characteristics are kept all the same as Rev 1.3 ) Jan.09. 2012 Mar.12. 2012 July.19. 2012 Rev. 1.3 Rev.1.4 Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan TEL: 886-3-6668838 FAX: 886-3-6668836 0 June. 04. 2013 Oct. 30. 2013 ® LY61L102416A 1024K X 16 BIT HIGH SPEED CMOS SRAM Rev. 1.4 FEATURES Fast access time : 10/12ns low power consumption: Operating current: 90/80mA (typical) Standby current: 4mA(Typical) Single 3.3V power supply All inputs and outputs TTL compatible Fully static operation Tri-state output Data byte control : LB# (DQ0 ~ DQ7) UB# (DQ8 ~ DQ15) Data retention voltage : 1.5V (MIN.) Green package available Package : 48-pin 12mm x 20mm TSOP-I 48-ball 6mmx8mm TFBGA GENERAL DESCRIPTION The LY61L102416A is a 16M-bit high speed CMOS static random access memory organized as 1024K words by 16 bits. It is fabricated using very high performance, high reliability CMOS technology. Its standby current is stable within the range of operating temperature. The LY61L102416A operates from a single power supply of 3.3V and all inputs and outputs are fully TTL compatible PRODUCT FAMILY Product Operating Family Temperature 0 ~ 70℃ LY61L102416A LY61L102416A(I) -40 ~ 85℃ Vcc Range Speed 2.7 ~ 3.6V 2.7 ~ 3.6V 10/12ns 10/12ns FUNCTIONAL BLOCK DIAGRAM Power Dissipation Standby(ISB1,TYP.) Operating(Icc1,TYP.) 4mA 90/80mA 4mA 90/80mA PIN DESCRIPTION SYMBOL DESCRIPTION A0 - A19 Address Inputs DQ0 – DQ15 Data Inputs/Outputs CE# Chip Enable Input WE# Write Enable Input OE# Output Enable Input LB# Lower Byte Control UB# Upper Byte Control VCC Power Supply VSS Ground Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan TEL: 886-3-6668838 FAX: 886-3-6668836 1 ® LY61L102416A 1024K X 16 BIT HIGH SPEED CMOS SRAM Rev. 1.4 PIN CONFIGURATION A LB# OE# A0 A1 B DQ8 UB# A3 A4 CE# DQ0 C DQ9 DQ10 A5 A6 DQ1 DQ2 D Vss DQ11 A17 A7 DQ3 Vcc E Vcc DQ12 NC A16 DQ4 Vss F DQ14 DQ13 A14 A15 DQ5 DQ6 G DQ15 A19 A12 A13 WE# DQ7 A10 H A18 A8 A9 1 2 3 4 TFBGA A2 NC A11 NC 5 6 Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan TEL: 886-3-6668838 FAX: 886-3-6668836 2 ® LY61L102416A 1024K X 16 BIT HIGH SPEED CMOS SRAM Rev. 1.4 ABSOLUTE MAXIMUN RATINGS* PARAMETER Voltage on Vcc relative to VSS Voltage on any other pin relative to VSS SYMBOL VT1 VT2 Operating Temperature RATING -0.5 to 4.6 -0.5 to Vcc+0.5 0 to 70(C grade) -40 to 85(I grade) -65 to 150 1 50 TA Storage Temperature Power Dissipation DC Output Current TSTG PD IOUT UNIT V V ℃ ℃ W mA *Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability. TRUTH TABLE MODE Standby Output Disable Read Write Note: CE# OE# H L L L L L L L L X H X L L L X X X WE# LB# X H X H H H L L L X X H L H L L H L UB# X X H H L L H L L I/O OPERATION DQ0-DQ7 DQ8-DQ15 High – Z High – Z High – Z High – Z High – Z High – Z DOUT High – Z DOUT High – Z DOUT DOUT DIN High – Z High – Z DIN DIN DIN SUPPLY CURRENT Isb , ISB1, ICC ICC ICC H = VIH, L = VIL, X = Don't care. DC ELECTRICAL CHARACTERISTICS PARAMETER Supply Voltage Input High Voltage Input Low Voltage Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage AverageOperating Power supply Current Standby Power Supply Current SYMBOL TEST CONDITION VCC *1 VIH *2 VIL ILI VCC ≧ VIN ≧ VSS VCC ≧ VOUT ≧ VSS, ILO Output Disabled VOH IOH = -4mA VOL IOL =8mA Icc Icc1 Isb CE# = VIL , II/O = 0mA ;f=max MIN. 2.7 2.2 - 0.3 -1 -10 -12 -10 CE# ≦0.2, Other pin is at 0.2V or Vcc-0.2V -12 II/O = 0mA;f=max CE# ≧Vih Other pin is at Vil or Vih *4 MAX. 3.6 VCC+0.3 0.8 1 UNIT V V V µA -1 - 1 µA 2.4 - - 0.4 V V - 110 100 90 160 140 120 mA mA mA 80 110 mA - 80 mA - Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan TEL: 886-3-6668838 FAX: 886-3-6668836 3 TYP. 3.3 - ® LY61L102416A 1024K X 16 BIT HIGH SPEED CMOS SRAM Rev. 1.4 Standby Power Supply Current ISB1 CE# ≧VCC - 0.2V; Other pin is at 0.2V or Vcc-0.2V - 4 40 mA Notes: 1. VIH(max) = VCC + 2.0V for pulse width less than 6ns. 2. VIL(min) = VSS - 2.0V for pulse width less than 6ns. 3. Over/Undershoot specifications are characterized on engineering evaluation stage, not for mass production test. 4. Typical values are included for reference only and are not guaranteed or tested. Typical valued are measured at VCC = VCC(TYP.) and TA = 25℃ CAPACITANCE (TA = 25℃, f = 1.0MHz) PARAMETER Input Capacitance Input/Output Capacitance SYMBOL CIN CI/O MIN. MAX 8 10 - UNIT pF pF Note : These parameters are guaranteed by device characterization, but not production tested. AC TEST CONDITIONS speed Input Pulse Levels Input Rise and Fall Times Input and Output Timing Reference Levels 10/12ns 0.2V to Vcc-0.2V 3ns Vcc/2 CL = 30pF + 1TTL, IOH/IOL = -8mA/4mA Output Load AC ELECTRICAL CHARACTERISTICS (1) READ CYCLE PARAMETER Read Cycle Time Address Access Time Chip Enable Access Time Output Enable Access Time Chip Enable to Output in Low-Z Output Enable to Output in Low-Z Chip Disable to Output in High-Z Output Disable to Output in High-Z Output Hold from Address Change LB#, UB# Access Time LB#, UB# to High-Z Output LB#, UB# to Low-Z Output LY61L102416A-10 SYM. MIN. 10 2 0 2 0 tRC tAA tACE tOE tCLZ* tOLZ* tCHZ* tOHZ* tOH tBA tBHZ* tBLZ* MAX. 10 10 4.5 4 4 4.5 4 - LY61L102416A-12 MIN. 12 3 0 2 0 MAX. 12 12 5 5 5 5 5 - UNIT ns ns ns ns ns ns ns ns ns ns ns ns (2) WRITE CYCLE PARAMETER Write Cycle Time Address Valid to End of Write Chip Enable to End of Write Address Set-up Time Write Pulse Width LY61L102416A-10 SYM. MIN. 10 8 8 0 8 tWC tAW tCW tAS tWP MAX. - LY61L102416A-12 MIN. 12 10 10 0 10 Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan TEL: 886-3-6668838 FAX: 886-3-6668836 4 MAX. - UNIT ns ns ns ns ns ® LY61L102416A 1024K X 16 BIT HIGH SPEED CMOS SRAM Rev. 1.4 tWR tDW tDH tOW* tWHZ* tBW Write Recovery Time Data to Write Time Overlap Data Hold from End of Write Time Output Active from End of Write Write to Output in High-Z LB#, UB# Valid to End of Write 0 6 0 2 8 4 - 0 7 0 2 10 5 - ns ns ns ns ns ns *These parameters are guaranteed by device characterization, but not production tested. TIMING WAVEFORMS READ CYCLE 1 (Address Controlled) (1,2) tRC Address tAA Dout tOH Previous Data Valid Data Valid READ CYCLE 2 (CE# and OE# Controlled) (1,3,4,5) tRC Address tAA CE# tACE LB#,UB# tBA OE# tOE tOH tOHZ tBHZ tCHZ tOLZ tBLZ tCLZ Dout High-Z Data Valid High-Z Notes : 1.WE#is high for read cycle. 2.Device is continuously selected OE# = low, CE# = low, LB# or UB# = low. 3.Address must be valid prior to or coincident with CE# = low, LB# or UB# = low transition; otherwise tAA is the limiting parameter. 4.tCLZ, tBLZ, tOLZ, tCHZ, tBHZ and tOHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state. 5.At any given temperature and voltage condition, tCHZ is less than tCLZ , tBHZ is less than tBLZ, tOHZ is less than tOLZ. Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan TEL: 886-3-6668838 FAX: 886-3-6668836 5 ® LY61L102416A 1024K X 16 BIT HIGH SPEED CMOS SRAM Rev. 1.4 WRITE CYCLE 1 (WE# Controlled) (1,2,3,5,6) tWC Address tAW CE# tCW tBW LB#,UB# tAS tWP tWR WE# tWHZ Dout TOW High-Z (4) tDW Din (4) tDH Data Valid WRITE CYCLE 2 (CE# Controlled) (1,2,5,6) tWC Address tAW CE# tAS tWR tCW tBW LB#,UB# tWP WE# tWHZ Dout High-Z (4) tDW tDH Data Valid Din Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan TEL: 886-3-6668838 FAX: 886-3-6668836 6 ® LY61L102416A 1024K X 16 BIT HIGH SPEED CMOS SRAM Rev. 1.4 WRITE CYCLE 3 (LB#,UB# Controlled) (1,2,5,6) tWC Address tAW tWR CE# tAS tCW tBW LB#,UB# tWP WE# tWHZ Dout High-Z (4) tDW tDH Data Valid Din Notes : 1.WE#,CE#, LB#, UB# must be high during all address transitions. 2.A write occurs during the overlap of a low CE#, low WE#, LB# or UB# = low. 3.During a WE# controlled write cycle with OE# low, tWP must be greater than tWHZ + tDW to allow the drivers to turn off and data to be placed on the bus. 4.During this period, I/O pins are in the output state, and input signals must not be applied. 5.If the CE#, LB#, UB# low transition occurs simultaneously with or after WE# low transition, the outputs remain in a high impedance state. 6.tOW and tWHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state. Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan TEL: 886-3-6668838 FAX: 886-3-6668836 7 ® LY61L102416A 1024K X 16 BIT HIGH SPEED CMOS SRAM Rev. 1.4 DATA RETENTION CHARACTERISTICS PARAMETER VCC for Data Retention Data Retention Current Chip Disable to Data Retention Time Recovery Time tRC* = Read Cycle Time SYMBOL TEST CONDITION VDR CE# ≧ VCC - 0.2V VCC = 1.5V CE# ≧VCC - 0.2V; IDR Other pin is at 0.2V or Vcc-0.2V See Data Retention tCDR Waveforms (below) tR MIN. 1.5 TYP. - MAX. 3.6 UNIT V - 4 40 mA 0 - - ns tRC* - - ns DATA RETENTION WAVEFORM VDR ≧ 1.5V Vcc Vcc(min.) Vcc(min.) tCDR CE# VIH tR CE# ≧ Vcc-0.2V VIH Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan TEL: 886-3-6668838 FAX: 886-3-6668836 8 ® LY61L102416A Rev. 1.4 1024K X 16 BIT HIGH SPEED CMOS SRAM PACKAGE OUTLINE DIMENSION 48-pin 12mm x 20mm TSOP-I Package Outline Dimension Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan TEL: 886-3-6668838 FAX: 886-3-6668836 9 ® LY61L102416A Rev. 1.4 1024K X 16 BIT HIGH SPEED CMOS SRAM 48-ball 6mm × 8mm TFBGA Package Outline Dimension Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan TEL: 886-3-6668838 FAX: 886-3-6668836 10 ® LY61L102416A 1024K X 16 BIT HIGH SPEED CMOS SRAM Rev. 1.4 ORDERING INFORMATION Package Type Access Time (Speed)(ns) 48-pin(12mmx20mm) 10 Temperature Range(℃) 0℃~70℃ TSOP-I -40℃~85℃ 12 0℃~70℃ -40℃~85℃ 48-Ball 6mmx8mm 10 0℃~70℃ TFBGA -40℃~85℃ 12 0℃~70℃ -40℃~85℃ Packing Type Tray LY61L102416ALL-10 Tape Reel LY61L102416ALL-10T Tray LY61L102416ALL-10I Tape Reel LY61L102416ALL-10IT Tray LY61L102416ALL-12 Tape Reel LY61L102416ALL-12T Tray LY61L102416ALL-12I Tape Reel LY61L102416ALL-12IT Tray LY61L102416AGL-10 Tape Reel LY61L102416AGL-10T Tray LY61L102416AGL-10I Tape Reel LY61L102416AGL-10IT Tray LY61L102416AGL-12 Tape Reel LY61L102416AGL-12T Tray LY61L102416AGL-12I Tape Reel LY61L102416AGL-12IT Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan TEL: 886-3-6668838 FAX: 886-3-6668836 11 Lyontek Item No. ® LY61L102416A Rev. 1.4 1024K X 16 BIT HIGH SPEED CMOS SRAM THIS PAGE IS LEFT BLANK INTENTIONALLY. Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan TEL: 886-3-6668838 FAX: 886-3-6668836 12