LINER LTC2909IDDB-2.5 Precision triple/dual input uv, ov and negative voltage monitor Datasheet

LTC2909
Precision Triple/Dual Input
UV, OV and Negative
Voltage Monitor
U
DESCRIPTIO
FEATURES
■
■
■
■
■
■
■
■
■
■
■
■
■
Two Low Voltage Adjustable Inputs (0.5V)
Pin Selectable Input Polarity Allows Negative
and OV Monitoring
Guaranteed Threshold Accuracy: ±1.5%
6.5V Shunt Regulator for High Voltage Operation
Low 50µA Quiescent Current
Buffered 1V Reference for Negative Supply Offset
Input Glitch Rejection
Adjustable Reset Timeout Period
Selectable Internal Timeout Saves Components
Open-Drain ⎯R⎯S⎯T Output
Accurate UVLO for 2.5V, 3.3V, 5V Systems
Ultralow Voltage Reset: VCC = 0.5V Guaranteed
Space Saving 8-Lead TSOT-23 and 3mm × 2mm DFN
Packages
U
APPLICATIO S
■
■
■
■
The two inputs have a nominal 0.5V threshold, featuring
tight 1.5% threshold accuracy over the entire operating
temperature range. Glitch filtering ensures reliable reset
operation without false triggering. A third fixed-threshold
UVLO monitor on the part’s VCC (also 1.5% accuracy) is
available for standard logic supplies.
The common reset output has a timeout that may use
a preset 200ms, be set by an external capacitor or be
disabled. A three-state input pin sets the input polarity
of each adjustable input without requiring any external
components.
The LTC2909 provides a highly versatile, precise, spaceconscious, micropower solution for supply monitoring.
Desktop and Notebook Computers
Handheld Devices
Network Servers
Core, I/O Monitor
Automotive
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
U
■
The LTC®2909 is a dual input monitor intended for a variety
of system monitoring applications. Polarity selection and
a buffered reference output allow the LTC2909 to monitor
positive and negative supplies for undervoltage (UV) and
overvoltage (OV) conditions.
TYPICAL APPLICATIO
3.3V UV/OV (Window) Monitor Application with
200ms Internal Timeout (3.3V Logic Out)
SEL Pin Connection for Input Polarity
Combinations
CBYP
100nF
POLARITY
3.3V
RP6
453k
RPU
10k
ADJ1
ADJ2
SEL PIN
+
+
VCC
SEL
+
–
OPEN
TMR
–
–
GND
VCC
RST
ADJ1
LTC2909-2.5
RP5
10.7k
REF
ADJ2
RP4
76.8k
FAULT
OUTPUT
GND
2909 TA01a
2909fa
1
LTC2909
U
W W
W
ABSOLUTE
AXI U RATI GS
(Notes 1, 2)
Terminal Voltages
VCC (Note 3)............................................. –0.3V to 6V
SEL, ⎯R⎯S⎯T .............................................. –0.3V to 7.5V
ADJ1, ADJ2 .......................................... –0.3V to 7.5V
TMR ..........................................–0.3V to (VCC + 0.3V)
Terminal Currents
IVCC (Note 3) ....................................................±10mA
IREF ....................................................................±1mA
Operating Temperature Range
LTC2909C ................................................ 0°C to 70°C
LTC2909I .............................................– 40°C to 85°C
Storage Temperature Range
DFN....................................................– 65°C to 125°C
TSOT-23.............................................– 65°C to 150°C
Lead Temperature (Soldering, 10 sec)
TSOT-23............................................................ 300°C
U
W
U
PACKAGE/ORDER I FOR ATIO
TOP VIEW
SEL 1
TMR 2
VCC 3
RST 4
9
8
ADJ1
7
ADJ2
6
REF
5
GND
DDB PACKAGE
8-LEAD (3mm ´ 2mm) PLASTIC DFN
TJMAX = 125°C, θJA = 76°C/W
EXPOSED PAD (PIN 9) MAY BE LEFT OPEN OR TIED TO GND
(PCB CONNECTION REQUIRED FOR STATED θJA)
TOP VIEW
ADJ1 1
ADJ2 2
REF 3
GND 4
8 SEL
7 TMR
6 VCC
5 RST
TS8 PACKAGE
8-LEAD PLASTIC TSOT-23
TJMAX = 125°C, θJA = 250°C/W
ORDER PART
NUMBER
DDB PART*
MARKING
LTC2909CDDB-2.5
LTC2909IDDB-2.5
LTC2909CDDB-3.3
LTC2909IDDB-3.3
LTC2909CDDB-5
LTC2909IDDB-5
LBXG
LBXG
LBZS
LBZS
LBZT
LBZT
ORDER PART
NUMBER
TS8 PART*
MARKING
LTC2909CTS8-2.5
LTC2909ITS8-2.5
LTC2909CTS8-3.3
LTC2909ITS8-3.3
LTC2909CTS8-5
LTC2909ITS8-5
LTBXF
LTBXF
LTBZV
LTBZV
LTBZW
LTBZW
Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
*The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for parts specified with wider operating temperature ranges.
2909fa
2
LTC2909
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 2.5V (LTC2909-2.5), VCC = 3.3V (LTC2909-3.3), VCC = 5V
(LTC2909-5), ADJ1 = ADJ2 = 0.55V, SEL = floating, unless otherwise noted. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
VCC(MIN)
Operating Supply Voltage
⎯R⎯S⎯T in Correct State
●
MIN
0.5
VCC(SHUNT)
VCC Shunt Regulation Voltage
IVCC = 1mA, IVREF = 0
●
6.0
ICC
VCC Input Current
2.175 < VCC < 6V
●
VRT
ADJ Input Threshold
●
ΔVRT
ADJ Hysteresis (Note 4)
TMR = VCC
IADJ
ADJ Input Current
VADJ = 0.55V
●
VCC(UVLO)
VCC UVLO Threshold
LTC2909-2.5
LTC2909-3.3
LTC2909-5
●
●
●
ΔVCC(UVLO)
UVLO Hysteresis (Note 4)
TMR = VCC
VREF
Buffered Reference Voltage
VCC > 2.175V, IVREF = ±1mA
ITMR(UP)
TMR Pull-Up Current
ITMR(DOWN)
t⎯R⎯S⎯T(EXT)
TYP
MAX
UNITS
V
6.5
6.9
V
50
150
µA
0.492
0.500
0.508
V
1.5
3.5
10.0
mV
±15
nA
2.175
2.871
4.350
2.213
2.921
4.425
2.250
2.970
4.500
V
V
V
0.3
0.7
2.0
%
●
0.985
1.000
1.015
V
VTMR = 1V
●
–1.5
–2.1
–2.7
µA
TMR Pull-Down Current
VTMR = 1V
●
1.5
2.1
2.7
µA
Reset Timeout Period, External
CTMR = 2.2nF
●
16
20
25
ms
t⎯R⎯S⎯T(INT)
Reset Timeout Period, Internal
VTMR = 0V
●
150
200
260
ms
VTMR(DIS)
Timer Disable Voltage
VTMR Rising
●
VCC
– 0.36
VCC
– 0.25
VCC
– 0.16
ΔVTMR(DIS)
Timer Disable Hysteresis
VTMR Falling
●
60
110
150
mV
VTMR(INT)
Timer Internal Mode Voltage
VTMR Falling
●
0.14
0.21
0.27
V
ΔVTMR(INT)
Timer Internal Mode Hysteresis
VTMR Rising
●
40
70
110
mV
tPROP
ADJx Driven Beyond Reset Threshold
(VRTX) by 5mV
●
50
150
500
µs
tUV
ADJx Comparator Propagation Delay
to ⎯R⎯S⎯T
VCC Undervoltage Detect to ⎯R⎯S⎯T
VCC Less Than UVLO Threshold
(VCC(UVLO)) by 1%
●
50
150
500
µs
VOL(⎯R⎯S⎯T)
⎯R⎯S⎯T Output Voltage Low
VCC = 0.5V, I = 5µA
VCC = 1V, I = 100µA
VCC = 3V, I = 2500µA
●
●
●
0.01
0.01
0.10
0.15
0.15
0.30
V
V
V
IOH(⎯R⎯S⎯T)
⎯R⎯S⎯T Output Voltage High Leakage
⎯R⎯S⎯T = VCC
●
±1
µA
0.4
V
V
Three-State Input SEL
VIL
Low Level Input Voltage
●
VIH
High Level Input Voltage
●
VZ
Pin Voltage when Left in Open State
ISEL(Z)
Allowable Leakage in Open State
ISEL
SEL Input Current
1.4
ISEL = 0µA
0.9
●
SEL = VCC or SEL = GND
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into pins are positive; all voltages are referenced to
GND unless otherwise noted.
Note 3: VCC maximum pin voltage is limited by input current. Since the
VCC pin has an internal 6.5V shunt regulator, a low impedance supply
V
●
V
±5
±10
µA
µA
±25
µA
which exceeds 6V may exceed the rated terminal current. Operation
from higher voltage supplies requires a series dropping resistor. See
Applications Information.
Note 4: Threshold voltages have no hysteresis unless the part is in
comparator mode. Hysteresis is one-sided, affecting only invalid-to-valid
transitions. See Applications Information.
2909fa
3
LTC2909
U W
506
504
502
500
498
496
494
492
–50
–25
0
50
75
25
TEMPERATURE (°C)
100
125
1.5
0.015
1.0
1.010
0.5
0
–0.5
–1.5
–50
–25
50
25
75
0
TEMPERATURE (°C)
1.015
TA = 125°C
TA = –40°C
TA = 25°C
TA = –40°C
0.995
0.995
0.990
0.990
0.985
0.985
2
1
2.5
4.5 5
3 3.5 4
SUPPLY VOLTAGE, VCC (V)
5.5
Allowable Glitch Duration
vs Magnitude
RESET OCCURS
ABOVE CURVE
200
100
0
0.1
1
10
100
GLITCH PERCENTAGE PAST THRESHOLD (%)
2909 G07
100
VCC = 5V
VCC = 3.3V
45
40
VCC = 2.5V
35
30
25
–25
0
50
75
25
TEMPERATURE (°C)
100
125
Reset Timeout Period
vs Temperature
260
1000
100
10
1
0.1
125
2909 G06
RESET TIMEOUT PERIOD, tRST (ms)
RESET TIMEOUT PERIOD, tRST (ms)
500
300
ADJ1 = 0.55V
55 ADJ2 = 0.45V
SEL = OPEN
50
20
–50
6
10000
600
50
25
75
0
TEMPERATURE (°C)
2909 G03
External Timeout Period
vs Capacitance
700
–25
2909 G05
2909 G04
400
0.985
–50
60
1.000
1.000
–0.5
0
0.5
LOAD CURRENT, IREF (mA)
0.995
Quiescent Supply Current
vs Temperature
TA = 125°C
1.005
TA = 25°C
MAXIMUM ALLOWABLE
GLITCH DURATION (µs)
125
IREF = 0A
REF VOLTAGE, VREF (V)
REF VOLTAGE, VREF (V)
100
1.010
–1
1.000
REF Output Line Regulation
1.010
1.005
1.005
2909 G02
REF Output Load Regulation
VCC = 2.5V
IREF = 0A
0.990
–1.0
2909 G01
1.015
REF Output Voltage
vs Temperature
QUIESCENT SUPPLY CURRENT, ICC (µA)
THRESHOLD VOLTAGE, VRT (mV)
508
VCC UVLO Threshold Variation
vs Temperature
REF VOLTAGE, VREF (V)
ADJ Threshold Voltage
vs Temperature
THRESHOLD VOLTAGE VARIATION (% OF 25°C VALUE)
TYPICAL PERFOR A CE CHARACTERISTICS TA = 25°C unless otherwise noted
1
10
100
TMR PIN CAPACITANCE, CTMR (nF)
1000
2909 G08
240
EXTERNAL WITH
22nF CAPACITOR
220
INTERNAL
200
180
160
140
–50
–25
50
25
75
0
TEMPERATURE (°C)
100
125
2909 G09
2909fa
4
LTC2909
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Shunt Regulation Voltage
vs Supply Current
6.8
ICC = 10mA
6.6
ICC = 1mA
ICC = 100µA
6.4
6.2
6.0
–50 –25
50
25
0
75
TEMPERATURE (°C)
100
125
7.0
⎯R⎯S⎯T Output Voltage vs VCC
5
TA = 25°C
ADJ1 = 0.55
ADJ2 = 0.45
4 SEL = OPEN
10k PULL-UP R TO VCC
6.8
RST VOLTAGE (V)
7.0
SHUNT REGULATION VOLTAGE, VCC(SHUNT) (V)
6.6
6.4
2
LTC2909-2.5
LTC2909-3.3
0
6.0
0.01
0.1
1
10
SUPPLY CURRENT, ICC (mA)
100
PULL-DOWN CURRENT, IRST (mA)
RST WITH 10k PULL-UP
0.1
RST WITH 100k PULL-UP
1
ADJ1 = 0.55
ADJ2 = 0.55
5 SEL = OPEN
4
RST AT 150mV
3
2
0.1
0.2 0.3 0.4 0.5 0.6 0.7
SUPPLY VOLTAGE, VCC (V)
0
0.8
1
5
2
3
4
SUPPLY VOLTAGE, VCC (V)
RST AT 50mV
0.01
0.0001
0.2
0.4
0.6
0.8
SUPPLY VOLTAGE, VCC (V)
0
⎯R⎯S⎯T VOL vs I⎯R⎯S⎯T
ISEL vs Temperature
–20
VCC = 3V
NO PULL-UP R
0.8
1
2909 G15
2909 G14
2909 G13
1.0
RST AT 150mV
0.1
0.001
RST AT 50mV
1
0
0
0
5
⎯R⎯S⎯T Pull-Down Current vs VCC
6
0.4
0.2
3
4
2
SUPPLY VOLTAGE, VCC (V)
2909 G12
⎯R⎯S⎯T Pull-Down Current vs VCC
VCC
1
0
2909 G11
⎯R⎯S⎯T Output Voltage vs VCC
0.3
LTC2909-5
1
2909 G10
RST VOLTAGE (V)
3
6.2
PULL-DOWN CURRENT, IRST (mA)
SHUNT REGULATION VOLTAGE, VCC(SHUNT) (V)
Shunt Regulation Voltage
vs Temperature
TA = 25°C unless otherwise noted
ISEL vs Temperature
20
SEL = GND
–18
18
–16
16
SEL = VCC
TA = –40°C
0.4
–14
–12
0.2
0
ISEL (µA)
TA = 25°C
0.6
ISEL (µA)
RST VOL (V)
TA = 125°C
0
5
10
15
20
IRST (mA)
25
30
1635 G07
–10
–50
14
12
–25
50
25
0
75
TEMPERATURE (°C)
100
125
2909 G17
10
–50
–25
50
25
0
75
TEMPERATURE (°C)
100
125
2909 G18
2909fa
5
LTC2909
U
U
U
PI FU CTIO S (TSOT-23/DFN Package)
ADJ1 (Pin 1/Pin 8): Adjustable Voltage Input 1. Input to
voltage monitor comparator 1 (0.5V nominal threshold).
The polarity of the input is selected by the state of the
SEL pin (refer to Table 1). Tie to REF if unused (with SEL
= VCC or Open).
ADJ2 (Pin 2/Pin 7): Adjustable Voltage Input 2. Input to
voltage monitor comparator 2 (0.5V nominal threshold).
The polarity of the input is selected by the state of the
SEL pin (refer to Table 1). Tie to GND if unused (with SEL
= GND or Open).
REF (Pin 3/Pin 6): Buffered Reference Output. 1V nominal
reference used for the offset of negative-monitoring applications. The buffered reference can source and sink 1mA.
The reference can drive a capacitive load of up to 1000pF.
Larger capacitance may degrade transient performance.
This pin does not require a bypass capacitor, nor is one
recommended. Leave open if unused.
GND (Pin 4/Pin 5): Device Ground.
⎯ S
⎯ T⎯ (Pin 5/Pin 4): Open-Drain Inverted Reset Logic Output.
R
Asserts low when any positive polarity input voltage is
below threshold or any negative polarity input voltage is
above threshold or VCC is below UVLO threshold. Held low
for a timeout after all voltage inputs are valid. Requires an
external pull-up resistor and may be pulled above VCC.
VCC (Pin 6/Pin 3): Power Supply. Bypass this pin to
ground with a 0.1μF (or greater) capacitor. Operates as
a direct supply input for voltages up to 6V. Operates as a
shunt regulator for supply voltages greater than 6V and
should have a resistor between this pin and the supply
to limit VCC input current to no greater than 10mA. When
used without a current-limiting resistor, pin voltage must
not exceed 6V. UVLO options allow VCC to be used as an
accurate third fixed 10% UV supply monitor.
TMR (Pin 7/Pin 2): Reset Timeout Control. Attach an
external capacitor (CTMR) to GND to set a reset timeout
of 9ms/nF. A low leakage ceramic capacitor is recommended for timer accuracy. Capacitors larger than 1μF
(9 second timeout) are not recommended. See Applications Information for further details. Leaving this pin open
generates a minimum timeout of approximately 400μs. A
2.2nF capacitor will generate a 20ms timeout. Tying this
pin to ground will enable the internal 200ms timeout. Tying this pin to VCC will disable the reset timer and put the
part in comparator mode. Signals from the comparator
outputs will then go directly to ⎯R⎯S⎯T.
SEL (Pin 8/Pin 1): Input Polarity Select Three-State Input.
Connect to VCC, GND or leave unconnected in open state
to select one of three possible input polarity combinations
(refer to Table 1).
Exposed Pad (Pin 9, DFN Only): The Exposed Pad may be
left unconnected. For better thermal contact, tie to a PCB
trace. This trace must be grounded or unconnected.
2909fa
6
LTC2909
W
BLOCK DIAGRA
SEL
VCC
VCC
THREE-STATE
DECODE
CONTROL 2
ADJ1
6.5V
CONTROL 1
+
TMR
–
ADJ2
ADJUSTABLE
PULSE
GENERATOR
+
THREE-STATE
DECODE
RST
GND
200ms
PULSE
GENERATOR
–
VCC
+
–
+
–
SEL
GND
OPEN
VCC
500mV
+
REF
+
–
1.000V
CONTROL 1
H
L
L
CONTROL 2
H
H
L
–
2909 BD
WU
W
TI I G DIAGRA S
Normal Positive Polarity Input Timing
VADJ
VRT
VADJ
tPROP
RST
Comparator Mode Positive Polarity Input Timing
tRST
1V
tPROP
VRT
RST
tRST
1V
tPROP
Comparator Mode Negative Polarity Input Timing
VADJ
tPROP
VRT
tPROP
tPROP
Normal UVLO Timing
RST
1V
Comparator Mode UVLO Timing
VCC VCC(UVLO)
tUV
,VRT
1V
RST
VCC VCC(UVLO)
,VRT
1V
RST
Normal Negative Polarity Input Timing
VADJ
VRT
tRST
tUV
RST
,VCC(UVLO)
tUV
1V
2909 TD
2909fa
7
LTC2909
U
W
U
U
APPLICATIO S I FOR ATIO
The LTC2909 is a low power, high accuracy dual/triple
supply monitor with two adjustable inputs and an accurate UVLO. Reset timeout may be selected with an
external capacitor, set to an internally generated 200ms,
or disabled entirely.
The three-state polarity select pin (SEL) chooses one of
three possible polarity combinations for the adjustable input
thresholds, as described in Table 1. Both input voltages
(VADJ1 and VADJ2) must be valid (above threshold if configured for positive polarity, below threshold if configured
for negative polarity), and VCC above the UVLO threshold
for the reset timeout before ⎯R⎯S⎯T is released. The LTC2909
asserts the reset output during power-up, power-down and
brownout conditions on any of the voltage inputs.
Power-Up
The LTC2909 uses proprietary low voltage drive circuitry
for the ⎯R⎯S⎯T pin which holds ⎯R⎯S⎯T low with as little as
200mV of VCC. This helps prevent an unknown voltage
on the ⎯R⎯S⎯T line during power-up.
In applications where the low voltage pull-down capability is important, the supply to which the external pull-up
resistor connects should be the same supply which powers
the part. Using the same supply for both ensures that ⎯R⎯S⎯T
never floats above 200mV during power-up, as the pulldown ability of the pin will then increase as the required
pull-down current to maintain a logic low increases.
Once VCC passes the UVLO threshold, polarity selection
and timer initialization will occur. If the monitored supplies
(ADJ1 and ADJ2) are valid, the appropriate timeout delay
will begin, after which ⎯R⎯S⎯T will be released. Otherwise, the
part will wait until all supplies are valid (including VCC above
the UVLO threshold) before beginning the timeout.
Power-Down
On power-down, once VCC drops below the UVLO threshold
or either VADJ becomes invalid, ⎯R⎯S⎯T asserts logic low. VCC
of at least 0.5V guarantees a logic low of 0.15V at ⎯R⎯S⎯T.
Shunt Regulator
The LTC2909 contains an internal 6.5V shunt regulator on
the VCC pin to allow operation from a high voltage supply. To
operate the part from a supply higher than 6V, the VCC pin
must have a series resistor, RCC, to the supply. This resistor
should be sized according to the following equation:
VS(MAX ) – 6.2V
10mA
≤ RCC ≤
VS(MIN) – 6.8V
200µA + IVREF
where VS(MIN) and VS(MAX) are the operating minimum and
maximum of the supply, and IVREF is the maximum current
the user expects to draw from the reference output.
As an example, consider operation from an automobile battery which might dip as low as 10V or spike to 60V. Assume
that the user will be drawing 100μA from the reference. We
must then pick a resistance between 5.4k and 10.7k.
When the VCC pin is connected to a low impedance supply,
it is important that the supply voltage never exceed 6V,
or the shunt regulator may begin to draw large currents.
Some supplies may have nominal value sufficiently close
to the shunt regulation voltage to prevent sizing of the
resistor according to the above equation. For such supplies, a 470Ω series resistor may be used.
Polarity Selection
The external connection of the SEL pin selects the polarities
of the LTC2909 adjustable inputs. SEL may be connected to
GND, connected to VCC or left unconnected during normal
operation. When left unconnected, the maximum leakage
allowable from the pin to either GND or VCC is 10μA. Table 1
shows the three possible selections of polarity based on
SEL connection.
Table 1. Voltage Threshold Selection
ADJ1 INPUT
ADJ2 INPUT
SEL
Positive Polarity
(+) UV or (–) OV
Positive Polarity
(+) UV or (–) OV
VCC
Positive Polarity
(+) UV or (–) OV
Negative Polarity
(–) UV or (+) OV
Open
Negative Polarity
(–) UV or (+) OV
Negative Polarity
(–) UV or (+) OV
Ground
Note: Open = open circuit or driven by a three-state buffer in high impedance
state with leakage current less than 10μA.
If the user’s application requires, the SEL pin may be driven
using a three-state buffer which satisfies the VIL, VIH and
leakage of the three-state pin.
2909fa
8
LTC2909
U
U
W
U
APPLICATIO S I FOR ATIO
If the state of the SEL pin configures a given input as
“negative polarity,” the voltage at the ADJx pin must be
below the trip point (0.5V nominal), or the ⎯R⎯S⎯T output will
be pulled low. Conversely, if a given input is configured
as “positive polarity,” the pin voltage must be above the
trip point or ⎯R⎯S⎯T will assert low.
Thus, a “negative polarity” input may be used to determine
whether a monitored negative voltage is smaller in absolute
value than it should be (–UV), or a monitored positive
voltage is larger than it should be (+OV). The opposite is
true for a “positive polarity” input (–OV or +UV). These
usages are also shown in Table 1. For purposes of this
data sheet, a negative voltage is considered “undervoltage”
if it is closer to ground than it should be (e.g., –4.3V for
a –5V supply).
Proper configuration of the SEL pin and setting of the
trip-points via external resistors allows for any two fault
conditions to be detected. For example, the LTC2909 may
monitor two supplies (positive, negative or one of each)
for UV or for OV (or one UV and one OV). It may also
monitor a single supply (positive or negative) for both UV
and OV. Tables 2a and 2b show example configurations
for monitoring possible combinations of fault condition
and supply polarity.
Table 2a. Possible Combinations of Supply Monitoring. For Example Purposes, All Supplies are Monitored at 5% Tolerance and
Connections are Shown Only for ADJ1, ADJ2, REF, SEL
SEL = GND
SEL = VCC
15V (UV) 5V (UV)
RP2A
3.09M
–15V (UV) –5V (UV)
RP2B
1.15M
RN2A
3.09M
RN2B
1.37M
ADJ1
ADJ2
RP1A
115k
ADJ1
SEL
ADJ2
RN1A
107k
RP1B
137k
REF
REF
2 Positive UV
2 Negative UV
–15V (OV) –5V (OV)
RN2A
10.2M
15V (OV) 5V (OV)
RN2B
1.37M
RP2A
6.19M
RP2B
1.33M
ADJ1
ADJ2
RN1A
309k
ADJ1
SEL
RN1B
118k
ADJ2
RP1A
200k
REF
2 Negative OV
2 Positive OV
15V (UV) –15V (OV)
15V (OV) –15V (UV)
RN2
10.2M
RP2
6.19M
RN2
3.09M
ADJ1
ADJ2
RP1
115k
SEL
RP1B
137k
REF
RP2
3.09M
SEL
RN1B
133k
ADJ1
SEL
RN1
309k
ADJ2
RP1
200k
REF
1 Positive UV, 1 Negative OV
SEL
RN1
107k
REF
1 Positive OV, 1 Negative UV
2909fa
9
LTC2909
U
U
W
U
APPLICATIO S I FOR ATIO
Table 2b. Possible Combinations of Supply Monitoring. For Example Purposes, All Supplies are Monitored at 5% Tolerance and
Connections are Shown Only for ADJ1, ADJ2, REF, SEL
SEL OPEN
15V (UV/OV)
–15V (UV/OV)
RP6
2.37M
RN6
10.2M
ADJ1
RP5
10.7k
ADJ2
ADJ1
RN5
40.2k
SEL
ADJ2
REF
REF
1 Negative UV and OV
1 Positive UV and OV
–15V (OV) 15V (OV)
15V (UV) –15V (UV)
RP2
3.09M
RN2
3.09M
RN2
10.2M
RP2
6.19M
ADJ1
ADJ1
ADJ2
RP1
115k
ADJ2
SEL
RN1
309k
RN1
107k
REF
1 Positive UV, 1 Negative UV
15V (UV) 5V (OV)
1 Negative OV, 1 Positive OV
–15V (OV) –5V (UV)
RP2B
1.33M
RN2A
10.2M
RN2B
1.37M
ADJ1
ADJ2
RP1A
115k
SEL
RP1
200k
REF
RP2A
3.09M
SEL
RN4
309k
RP4
76.8k
ADJ1
SEL
RP1B
137k
REF
1 Positive UV, 1 Positive OV
Adjust Input Trip Point
The trip threshold for the supplies monitored by the adjustable inputs is set with an external resistor divider, allowing
the user complete control over the trip point. Selection of
this trip voltage is crucial to the reliability of the system.
Any power supply has some tolerance band within which
it is expected to operate (e.g., 5V ±10%). It is generally
undesirable that a supervisor issue a reset when the power
supply is inside this tolerance band. Such a “nuisance”
reset reduces reliability by preventing the system from
functioning under normal conditions.
To prevent nuisance resets, the supervisor threshold must
be guaranteed to lie outside the power supply tolerance
ADJ2
RN1A
309k
SEL
RN1B
133k
REF
1 Negative UV, 1 Negative OV
band. To ensure that the threshold lies outside the power
supply tolerance range, the nominal threshold must lie outside that range by the monitor’s accuracy specification.
All three of the LTC2909 inputs (ADJ1, ADJ2, VCC UVLO)
have the same relative threshold accuracy of ±1.5% of the
programmed nominal input voltage (over the full operating
temperature range). Therefore, using the LTC2909, the
typical 10% UV threshold is at 11.5% below the nominal
input voltage level. For a 5V input, the threshold is nominally
4.425V. With ±1.5% accuracy, the trip threshold range is
4.425V ±75mV over temperature (i.e., 10% to 13% below
5V). The monitored system must thus operate reliably
down to 4.35V or 13% below 5V over temperature.
2909fa
10
LTC2909
U
W
U
U
APPLICATIO S I FOR ATIO
The above discussion is concerned only with the DC
value of the monitored supply. Real supplies also have
relatively high frequency variation from sources such as
load transients, noise and pickup. These variations should
not be considered by the monitor in determining whether
a supply voltage is valid or not. The variations may cause
spurious outputs at ⎯R⎯S⎯T, particularly if the supply voltage
is near its trip threshold.
A common solution to the problem of spurious reset is
to introduce hysteresis around the nominal threshold.
However, this hysteresis degrades the effective accuracy
of the monitor and increases the range over which the
system must operate. The LTC2909 therefore does not
have hysteresis, except in comparator mode (see Setting
the Reset Timeout). If hysteresis is desired in other modes,
it may be added externally. See Typical Applications for
an example.
lowpass filter with the resistor divider will further reject
high frequency components of the supply, at the cost of
slowing the monitor’s response to fault conditions.
Selecting External Resistors
In a typical positive supply monitoring application, the
ADJx pin connects to a tap point on an external resistive
divider between a positive voltage being monitored and
ground, as shown in Figure 1.
When monitoring a negative supply, the ADJx pin connects
to a tap point on a resistive divider between the negative
voltage being monitored and the buffered reference (REF),
as shown in Figure 2.
VMON
RP2
The LTC2909 uses two techniques to combat spurious
reset without sacrificing threshold accuracy. First, the
timeout period helps prevent high frequency variation
whose frequency is above 1/ tRST from appearing at the
⎯R⎯S⎯T output.
The combination of the reset timeout and comparator
filtering prevents spurious changes in the output state
without sacrificing threshold accuracy. If further supply
glitch immunity is needed, the user may place an external
capacitor from the ADJ input to ground. The resultant RC
+
RP1
–
0.5V
+
–
2909 F01
When either ADJ1 or ADJ2 becomes invalid, the ⎯R⎯S⎯T pin
asserts low. When the supply recovers past the threshold,
the reset timer starts (assuming it is not disabled) and ⎯R⎯S⎯T
does not go high until it finishes. If the supply becomes
invalid any time during the timeout period, the timer resets
and starts fresh when the supply next becomes valid.
While the reset timeout is useful at preventing toggling of
the reset output in most cases, it is not effective at preventing nuisance resets due to short glitches (from load
transients or other effects) on a valid supply. To reduce
sensitivity to these short glitches, the comparator outputs
go through a lowpass filter before triggering the output
logic. Any transient at the input of a comparator needs to
be of sufficient magnitude and duration to pass the filter
before it can change the monitor state.
ADJx
Figure 1. Setting Positive Supply Trip Point
REF
RN1
ADJx
+
RN2
–
VMON
0.5V
+
–
2909 F02
Figure 2. Setting Negative Supply Trip Point
Normally the user will select a desired trip voltage based
on their supply and acceptable tolerances, and a value of
RN1 or RP1 based on current draw. Current used by the
resistor divider will be approximately:
I=
0.5V
R X1
Recommended range is 1k to 1M.
2909fa
11
LTC2909
U
U
W
U
APPLICATIO S I FOR ATIO
For a positive-monitoring application, RP2 is then chosen
by:
REF
ADJ1
RP2 = RP1(2VTRIP – 1)
For a negative-monitoring application:
RN4
RN2 = RN1(1 – 2VTRIP)
RN5
Note that the value VTRIP should be negative for a negative application.
The LTC2909 can also be used to monitor a single supply
for both UV and OV. This may be accomplished with three
resistors, instead of the four required for two independent
supplies. Configurations are shown in Figures 3 and 4.
RP4 or RN4 may be chosen as is RP1 above.
For a given RP4, monitoring a positive supply:
RP5 = RP 4
VOV – VUV
VUV
RP6 = RP 4 ( 2VUV – 1)
VOV
VUV
VUV – VOV
1 – VUV
RN6 = RN4 (1 – 2VUV )
1 – VOV
1 – VUV
For example, consider monitoring a –5V supply at ±10%. For
this supply application: VOV = –5.575V and VUV = –4.425V.
ADJ1
+
VMON
RP6
RP5
+
RN6
–
VMON
0.5V
+
–
2909 F04
Figure 4. Setting UV and OV Trip Point for a Negative Supply
Suppose we wish to consume about 5μA in the divider, so
RN4 = 100k. We then find RN5 = 21.0k, RN6 = 1.18M (nearest
1% standard values have been chosen). Suggested values
of resistors for 5% monitoring are shown in Table 3.
The LTC2909 contains an accurate third 10% undervoltage
monitor on the VCC pin. This monitor is fixed at a nominal
11.5% below the VCC specified in the part number. The
standard part (LTC2909-2.5) is configured to monitor a
2.5V supply (UVLO threshold of 2.213V), but versions
to monitor 3.3V and 5.0V (UVLO of 2.921V and 4.425V,
respectively) are available.
For applications that do not need VCC monitoring, the
2.5V version should be used, and the UVLO will simply
guarantee that the VCC is above the minimum required for
proper threshold and timer accuracy before the timeout
begins.
The reset timeout of the LTC2909 may be configured
in one of three ways: internal 200ms, programmed by
external capacitor and no timeout (comparator mode).
The mode of the timer is determined by the connection
of the TMR pin.
+
RP4
–
0.5V
ADJ2
Setting the Reset Timeout
–
ADJ2
–
VCC Monitoring/UVLO
For monitoring a negative supply with a given RN4:
RN5 = RN4
+
+
–
2909 F03
Figure 3. Setting UV and OV Trip Point for a Positive Supply
In externally-controlled mode, the TMR pin is connected
by a capacitor to ground. The value of that capacitor allows
for selection of a timeout ranging from about 400μs to 10
seconds. See the following section for details.
2909fa
12
LTC2909
U
W
U
U
APPLICATIO S I FOR ATIO
Table 3. Suggested Resistor Values for 5% Monitoring
5% UV
NOMINAL
RX1
VOLTAGE
24
232k
15
115k
12
49.9k
9
115k
5
137k
3.3
221k
2.5
115k
1.8
63.4k
1.5
59.0k
1.2
127k
1
200k
–5
133k
–9
97.6k
–12
107k
–15
107k
Trip points are nominal voltage ±6.5%.
5% OV
RX2
RX1
RX2
RX4
5% UV and OV
RX5
10.2M
3.09M
1.07M
1.82M
1.15M
1.15M
422k
150k
107k
158k
174k
1.37M
1.74M
2.49M
3.09M
102k
200k
102k
78.7k
137k
340k
51.1k
115k
137k
102k
100k
118k
115k
40.2k
309k
5.11M
6.19M
2.49M
1.43M
1.33M
2.05M
221k
324k
301k
158k
113k
1.37M
2.32M
1.07M
10.2M
82.5k
76.8k
76.8k
162k
76.8k
76.8k
137k
82.5k
76.8k
187k
107k
174k
182k
40.2k
309k
11.5k
10.7k
10.7k
22.6k
10.7k
10.7k
19.1k
11.5k
10.7k
26.1k
15.0k
20.0k
22.6k
5.11k
40.2k
RX6
4.12M
2.37M
1.87M
2.94M
732k
453k
576k
221k
158k
267k
105k
2.00M
3.65M
1.07M
10.2M
If the user wishes to avoid having an external capacitor,
the TMR pin should be tied to ground, switching the part
to an internal 200ms timer.
the threshold is 500mV when the input is below 500mV,
and switches to 496.5mV when the input goes above
500mV.
If the user requires a shorter timeout than 400μs, or
wishes to perform application-specific processing of the
reset output, the part may be put in comparator mode by
tying the TMR pin to VCC. In comparator mode, the timer
is bypassed and comparator outputs go straight to the
reset output.
The comparator mode feature should be enabled by directly
shorting the TMR pin to the VCC pin. Connecting the pin to
any other voltage may have unpredictable results.
The current required to hold TMR at ground or VCC is
about 2μA. To force the pin from the floating state to
ground or VCC may require as much as 100μA during the
transition.
When the part is in comparator mode, one of the two
means of preventing false reset has been removed, so
a small amount of one-sided hysteresis is added to the
inputs to prevent oscillation as the monitored voltage
passes through the threshold. This hysteresis is such
that the valid-to-invalid transition threshold is unchanged,
but the invalid-to-valid threshold is moved by about
0.7%. Thus, when the ADJ input polarity is positive,
the threshold voltage is 500mV nominal when the input is above 500mV. As soon as the input drops below
500mV, the threshold moves up to 503.5mV nominal.
Conversely, when configured as a negative-polarity input,
Selecting the Reset Timing Capacitor
Connecting a capacitor, CTMR, between the TMR pin and
ground sets the reset timeout, tRST. The following formula
approximates the value of capacitor needed for a particular
timeout:
CTMR = t⎯R⎯S⎯T • 110 [pF/ms]
Leaving the TMR pin open with no external capacitor
generates a reset timeout of approximately 400μs.
Maximum length of the reset timeout is limited by the
ability of the part to charge a large capacitor on start-up.
Initially, with a large (discharged) capacitor on the TMR
pin, the part will assume it is in internal timer mode (since
the pin voltage will be at ground). If the 2μA flowing out of
the TMR pin does not charge the capacitor to the groundsense threshold within the first 200ms after supplies
become good, the internal timer cycle will complete and
⎯R⎯S⎯T will go high too soon.
2909fa
13
LTC2909
U
U
W
U
APPLICATIO S I FOR ATIO
This imposes a practical limit of 1μF (9 second timeout) if
the length of timeout during power-up needs to be longer
than 200ms. If the power-up timeout is not important,
larger capacitors may be used, subject to the limitation
that the capacitor leakage current must not exceed 500nA,
or the function of the timer will be impaired.
pulled above VCC, providing the voltage limits of the pin
are observed.
⎯R⎯S⎯T Output Characteristics
The open-drain nature of the ⎯R⎯S⎯T pin allows for wired-OR
connection of several LTC2909s to monitor more than two
supplies (see Typical Applications). Other logic with opendrain outputs may also connect to the ⎯R⎯S⎯T line, allowing
other logic-determined conditions to issue a reset.
The DC characteristics of the ⎯R⎯S⎯T pull-down strength
are shown in the Typical Performance Characteristics
section. ⎯R⎯S⎯T is an open-drain pin and thus requires an
external pull-up resistor to the logic supply. ⎯R⎯S⎯T may be
As noted in the discussion of power up and power down,
the circuits that drive ⎯R⎯S⎯T are powered by VCC. During a
fault condition, VCC of at least 0.5V guarantees a VOL of
0.15V at ⎯R⎯S⎯T .
U
TYPICAL APPLICATIO S
Six Supply Undervoltage Monitor with 2.5V Reset Output and 20ms Timeout
15V
5V
–5V
–15V
3.3V
2.5V
SYSTEM
CBYP1
100nF
RN2A
1.37M
VCC
ADJ1
RN2B
3.09M
CBYP2
100nF
RPU
10k
RN1A
133k
RP2A
1.15M
VCC
RST
RST
LTC2909-2.5
ADJ1
RP1A
137k
LTC2909-3.3
REF
SEL
SEL
REF
ADJ2
TMR
TMR
ADJ2
RN1B
107k
RP2B
3.09M
RP1B
115k
CTMR1 CTMR2
2.2nF
2.2nF
GND
2909 TA02
GND
48V Telecom UV/OV Monitor with Hysteresis
VIN
36V TO 72V
RP2A
1.43M
RCC
27k
0.25W
RP2B
1.91M
RP2A2
169k
10k*
LTC2909-2.5
RP1B
13.7k
MANUAL
RESET
PUSHBUTTON
SEL
ADJ2
RP1A
18.7k
RP1B2
681k
REF
M1
RN2
2.49M
GND
RP2
1.07M
RN1
107k
–12V
*OPTIONAL FOR ESD
RPU
10k
VCC
RST
ADJ1
RP1
49.9k
TMR
2909 TA03
M1, M2: FDG6301N OR SIMILAR
1.8V
RST
ADJ1
VUV(RISING): 43.3V
VUV(FALLING): 38.7V
12V
RPU
10k
VCC
CBYP
100nF
RCC
10k
5V
M2
VOV(RISING): 71.6V
VOV(FALLING): 70.2V
±12V UV Monitor Powered from
12V, 20ms Timeout (1.8V Logic Out)
SYSTEM
CBYP
100nF
FAULT
OUTPUT
LTC2909-2.5
SEL
REF
ADJ2
TMR
CTMR
2.2nF
GND
2909 TA01b
IF LOADING OF RST WILL EXCEED 1nF,
A 1nF BYPASS CAPACITOR ON M1’s
DRAIN IS RECOMMENDED
2909fa
14
LTC2909
U
PACKAGE DESCRIPTIO
DDB Package
8-Lead Plastic DFN (3mm × 2mm)
(Reference LTC DWG # 05-08-1702)
0.61 ±0.05
(2 SIDES)
R = 0.115
TYP
5
0.56 ± 0.05
(2 SIDES)
3.00 ±0.10
(2 SIDES)
0.675 ±0.05
2.50 ±0.05
1.15 ±0.05
PACKAGE
OUTLINE
2.00 ±0.10
(2 SIDES)
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
0.25 ± 0.05
4
0.25 ± 0.05
0.75 ±0.05
0.200 REF
0.50 BSC
2.20 ±0.05
(2 SIDES)
0.38 ± 0.10
8
(DDB8) DFN 1103
0.50 BSC
2.15 ±0.05
(2 SIDES)
0 – 0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
1
PIN 1
CHAMFER OF
EXPOSED PAD
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
TS8 Package
8-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1637)
0.52
MAX
2.90 BSC
(NOTE 4)
0.65
REF
1.22 REF
1.4 MIN
3.85 MAX 2.62 REF
2.80 BSC
1.50 – 1.75
(NOTE 4)
PIN ONE ID
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.22 – 0.36
8 PLCS (NOTE 3)
0.65 BSC
0.80 – 0.90
0.20 BSC
0.01 – 0.10
1.00 MAX
DATUM ‘A’
0.30 – 0.50 REF
0.09 – 0.20
(NOTE 3)
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
1.95 BSC
TS8 TSOT-23 0802
2909fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LTC2909
U
TYPICAL APPLICATIO
Automotive Supply System with Overvoltage, Overcurrent and Overtemperature Protection and Undervoltage Reset
DC/DC
D1: 1N5238B OR SIMILAR
Q1, Q2: FFB2227 OR SIMILAR
VIN
12V
DC/DC
M1
IRLZ34
RS
0.01Ω
RG2
10Ω
2N6507
3.3V
SYSTEM
CBYP3
100nF
RL1 4.7k
RCC
4.7k
Q1
RP2A
2.49M
RP2B
2.05M
RP2C
221k
RL2
100k
RG1
1k
RPU1
4.7k
CBYP2
100nF
VCC
ADJ1
RST
CG
10nF
PWRGD LT1641-2
GND
TIMER
RP2E
1.15M
LTC2909-2.5
RFB2
100k
VCC
ADJ1
LTC2909-2.5
REF
SEL
VCC
RST
ADJ1
RREF
10.7k
ON
FB
TMR
CT
680nF
CIRCUIT BREAKER AND CROWBAR
TMR
ADJ2
GND
RFB1
10k
RP1A
102k
RP1B
340k
RP1D
49.9k
REF
SEL
SENSE GATE
VCC
RP2D
1.07M
Q2
D1
CBYP1
100nF
2.5V
ADJ2
GND
RP1C
51.1k
NTC THERMISTOR
NTHS-1206N01
R25 = 100k
R = 10.7k AT 85°C
SEL
RPU2
10k
LTC2909-2.5
RST
REF
TMR
ADJ2
RP1E
221k
GND
2909 TA05
12V OV AND 3.3V OV DETECT
2.5V OV AND T > 85°C DETECT
12V, 3.3V and 2.5V UV DETECT
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1326/LTC1326-2.5
Micropower Precision Triple Supply Monitor for
5V/2.5V, 3.3V and ADJ
4.725V, 3.118V, 1V Threshold (±0.75%)
LTC1536
Precision Triple Supply Monitor for PCI Applications
Meets PCI tFAIL Timing Specifications
LTC1540
Nanopower Comparator with Reference
Adjustable Hysteresis
LTC1726-2.5/LTC1726-5 Micropower Triple Supply Monitor for 2.5V/5V, 3.3V
and ADJ
Adjustable Reset and Watchdog Time-Outs
LTC1727/LTC1728
Micropower Triple Supply Monitor with Open-Drain
Reset
Individual Monitor Outputs in MSOP/5-Lead SOT-23
LTC1985-1.8
Micropower Triple Supply Monitor with Push-Pull
Reset Output
5-Lead SOT-23 Package
LTC2900
Programmable Quad Supply Monitor
Adjustable Reset, 10-Lead MSOP and 3mm × 3mm 10-Lead DFN
Package
LTC2901
Programmable Quad Supply Monitor
Adjustable Reset and Watchdog Timer, 16-Lead SSOP Package
LTC2902
Programmable Quad Supply Monitor
Adjustable Reset and Tolerance, 16-Lead SSOP Package, Margining
Functions
LTC2903
Precision Quad Supply Monitor
6-Lead SOT-23 Package, Ultralow Voltage Reset
LTC2904/LTC2905
3-State Programmable Precision Dual Supply Monitor
LTC2906/LTC2907
Precision Dual Supply Monitor 1-Selectable and
1 Adjustable
Adjustable Tolerance and Reset Timer, 8-Lead SOT-23 Package
⎯ S
⎯ T⎯ Outputs/Adjustable Reset Timer
Separate VCC Pin, RST/R
LTC2908
Precision Six Supply Monitor (Four Fixed and
2 Adjustable)
8-Lead SOT-23 and DDB Packages
LT6700
Micropower, Low Voltage, Dual Comparator with
400mV Reference
6-Lead SOT-23 Package
2909fa
16 Linear Technology Corporation
LT 0606 REV A • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2005
Similar pages