SEMICONDUCTOR TECHNICAL DATA $! "! ! " !! # ! LVQ The MC74LVQ240 is a high performance, inverting octal buffer operating from a 2.7 to 3.6V supply. The MC74LVQ240 is suitable for memory address driving and all TTL level bus oriented transceiver applications. Current drive capability is 12mA at the outputs. The Output Enable (OE) input, when HIGH, disables the output by placing them in a HIGH Z condition. LOW–VOLTAGE CMOS OCTAL BUFFER • Designed for 2.7 to 3.6V VCC Operation – Ideal for Low Power/Low Noise Applications • Guaranteed Simultaneous Switching Noise Level and Dynamic Threshold Performance • Guaranteed Skew Specifications • Guaranteed Incident Wave Switching into 75Ω • Low Static Supply Current (10µA) Substantially Reduces System Power DW SUFFIX PLASTIC SOIC CASE 751D–04 20 1 Requirements • Latchup Performance Exceeds 500mA • ESD Performance: Human Body Model >2000V M SUFFIX PLASTIC SOIC EIAJ CASE 967–01 20 1 Pinout: 20–Lead (Top View) VCC 2OE 1O0 2D0 1O1 2D1 1O2 2D2 1O3 2D3 20 19 18 17 16 15 14 13 12 11 SD SUFFIX PLASTIC SSOP CASE 940C–03 20 1 DT SUFFIX PLASTIC TSSOP CASE 948E–02 20 1 1 2 3 4 5 6 7 8 9 10 1OE 1D0 2O0 1D1 2O1 1D2 2O2 1D3 2O3 GND PIN NAMES Pins Function nOE 1Dn, 2Dn 1On, 2On Output Enable Inputs Data Inputs 3–State Outputs 12/95 Motorola, Inc. 1995 1 REV 2 MC74LVQ240 LOGIC DIAGRAM 1OE 1D0 1D1 1D2 1D3 2OE 2D0 2D1 2D2 2D3 1 2 18 4 16 6 14 8 12 1O0 1O1 1O2 1O3 19 17 3 15 5 13 7 11 9 INPUTS 2O0 2O1 2O2 2O3 OUTPUTS 1OE 2OE 1Dn 2Dn 1On, 2On L L L L H H H X Z H = High Voltage Level; L = Low Voltage Level; Z = High Impedance State; X = High or Low Voltage Level and Transitions Are Acceptable, for ICC reasons, DO NOT FLOAT Inputs MOTOROLA 2 ECLinPS and ECLinPS Lite DL140 — Rev 3 MC74LVQ240 ABSOLUTE MAXIMUM RATINGS* Symbol Parameter VCC DC Supply Voltage VI Value Condition Unit –0.5 to +7.0 V DC Input Voltage –0.5 ≤ VI ≤ VCC + 0.5V V VO DC Output Voltage –0.5 ≤ VO ≤ VCC + 0.5 Output in HIGH or LOW State V IIK DC Input Diode Current –20 VI = –0.5V mA +20 VI = VCC + 0.5V mA –20 VO = –0.5V mA +20 VI = VCC + 0.5V mA IOK DC Output Diode Current IO DC Output Source/Sink Current ±50 mA ICC DC Supply Current ±400 mA IGND DC Ground Current ±400 mA TSTG Storage Temperature Range –65 to +150 °C * Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is not implied. RECOMMENDED OPERATING CONDITIONS Symbol Parameter VCC Supply Voltage VI Input Voltage VO Output Voltage TA Operating Free–Air Temperature ∆V/∆t Input Transition Rise or Fall Rate, VIN from 0.8V to 2.0V, VCC = 3.0V Min Typ Max Unit 2.0 3.3 3.6 V 0 VCC V 0 VCC V –40 +85 °C 0 125 mV/ns DC ELECTRICAL CHARACTERISTICS TA = –40°C to +85°C Symbol Characteristic Condition Min 2.0 VIH HIGH Level Input Voltage (Note 1) 2.7V ≤ VCC ≤ 3.6V, VO = 0.1V or VCC – 0.1V VIL LOW Level Input Voltage (Note 1) 2.7V ≤ VCC ≤ 3.6V, VO = 0.1V or VCC – 0.1V VOH HIGH Level Output Voltage VOL LOW Level Output Voltage II Input Leakage Current IOZ Maximum 3–State Leakage Current IOLD Minimum Dynamic Output Current (Note 2) IOHD ICC Quiescent Supply Current Max V 0.8 2.7V ≤ VCC ≤ 3.6V; IOH = –50µA VCC – 0.1 VCC = 2.7V; IOH = –12mA 2.2 VCC = 3.0V; IOH = –12mA 2.48 Unit V V 2.7V ≤ VCC ≤ 3.6V; IOL = 50µA 0.1 2.7V ≤ VCC ≤ 3.6V; IOL= 12mA 0.4 2.7V ≤ VCC ≤3.6V; VI= VCC, GND ±1.0 µA VI(OE) = VIL, VIH; VI, VO= VCC, GND ±2.5 µA VCC = 3.6V; VOLD = 0.8V Max 36 mA VCC = 3.6V; VOHD = 2.0V Min –25 mA 2.7V ≤ VCC ≤3.6V; VI = VCC, GND 10 µA V 1. These values of VI are used to test DC electrical characteristics only. Functional test should use VIH ≥ 2.4V, VIL ≤ 0.5V. 2. Incident wave switching on transmission lines with impedances as low as 75Ω for commercial temperature range is guaranteed. Maximum test duration is 2ms, one output loaded at a time. ECLinPS and ECLinPS Lite DL140 — Rev 3 3 MOTOROLA MC74LVQ240 DYNAMIC SWITCHING CHARACTERISTICS (VCC = 3.3V) TA = +25°C Symbol Characteristic Condition VOLP Dynamic LOW Peak Voltage (Note 1) VOLV Dynamic LOW Valley Voltage (Note 1) VIHD VILD Min Typ Max Unit CL = 50pF, VIH = 3.3V, VIL = 0V 0.6 1.0 V CL = 50pF, VIH = 3.3V, VIL = 0V –0.5 –1.0 V High Level Dynamic Input Voltage (Note 2) Input–Under–Test Switching 0V to Threshold, f=1MHz 1.5 2.0 V Low Level Dynamic Input Voltage (Note 2) Input–Under–Test Switching 3.3V to Threshold, f=1MHz 1.5 0.8 V 1. Number of outputs defined as “n”. Measured with “n–1” outputs switching from HIGH–to–LOW. The remaining output is measured in the LOW state. 2. Number of data inputs is defined as “n” switching, “n–1” inputs switching 0V to 3.3V. AC CHARACTERISTICS (tR = tF = 2.5ns; CL = 50pF; RL = 500Ω) Limits TA = +25°C VCC = 3.0V to 3.6V Symbol Parameter TA = –40°C to +85°C VCC = 2.7V VCC = 3.0V to 3.6V VCC = 2.7V Min Typ Max Min Typ Max Min Max Max Unit tPLH tPHL Propagation Delay Input to Output 2.0 2.0 6.0 6.0 9.5 9.5 2.0 2.0 7.0 7.0 11.0 11.0 2.0 2.0 10.5 10.5 12.0 12.0 ns tPZH tPZL Output Enable Time to High and Low Level 2.5 2.5 7.5 7.5 11.0 11.0 2.5 2.5 9.0 9.0 13.0 13.0 2.5 2.5 12.0 12.0 14.0 14.0 ns tPHZ tPLZ Output Disable Time From High and Low Level 1.0 1.0 7.0 7.0 10.5 10.5 1.0 1.0 9.0 9.0 13.0 13.0 1.0 1.0 11.5 11.5 14.0 14.0 ns tOSHL Output–to–Output Skew 1.0 1.5 1.0 1.5 1.5 ns tOSLH (Note 1) 1.0 1.5 1.0 1.5 1.5 1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH–to–LOW (tOSHL) or LOW–to–HIGH (tOSLH); parameter guaranteed by design. CAPACITIVE CHARACTERISTICS Symbol Parameter CPD Power Dissipation Capacitance CIN Input Capacitance MOTOROLA Condition Typical Unit 10MHz, VCC = 3.3V, VI = 0V or VCC 22 pF VCC = Open, VI = 0V or VCC 4.5 pF 4 ECLinPS and ECLinPS Lite DL140 — Rev 3 MC74LVQ240 VCC 1Dn, 2Dn 50% VCC 50% VCC 0V tPLH tPHL VOH 50% VCC 1On, 2On 50% VCC VOL WAVEFORM 1 – PROPAGATION DELAYS tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns VCC 50% VCC 1OE, 2OE 50% VCC 0V tPZH tPHZ VCC VOH – 0.3V 50% VCC 1On, 2On tPZL tPLZ 50% VCC 1On, 2On VOL + 0.3V GND WAVEFORM 2 – OUTPUT ENABLE AND DISABLE TIMES tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns Figure 1. AC Waveforms VCC 2 • VCC PULSE GENERATOR R1 DUT CL RT TEST OPEN RL SWITCH tPLH, tPHL Open tPZL, tPLZ 2 • VCC Open Collector/Drain tPLH and tPHL 2 • VCC tPZH, tPHZ Open CL = 50pF or equivalent (Includes jig and probe capacitance) RL = R1 = 500Ω or equivalent RT = ZOUT of pulse generator (typically 50Ω) Figure 2. Test Circuit ECLinPS and ECLinPS Lite DL140 — Rev 3 5 MOTOROLA MC74LVQ240 OUTLINE DIMENSIONS DW SUFFIX PLASTIC SOIC PACKAGE CASE 751D–04 ISSUE E –A – 20 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.150 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION. 11 1 –B – P 10 PL A B 0.010 (0.25) B M M 10 D 20 PL J 0.010 (0.25) M T S S DIM A B C D F G J K M P R F R X 45° C –T G 18 PL M SEATING – PLANE K MILLIMETERS MIN MAX 12.65 12.95 7.40 7.60 2.35 2.65 0.35 0.49 0.50 0.90 1.27 BSC 0.25 0.32 0.10 0.25 0° 7° 10.05 10.55 0.25 0.75 INCHES MIN MAX 0.499 0.510 0.292 0.299 0.093 0.104 0.014 0.019 0.020 0.035 0.050 BSC 0.010 0.012 0.004 0.009 0° 7° 0.395 0.415 0.010 0.029 M SUFFIX PLASTIC SOIC EIAJ PACKAGE CASE 967–01 ISSUE O 20 NOTES: 1 DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION: MILLIMETER. 3 DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4 TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5 THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). LE 11 Q1 E HE M_ L 10 1 DETAIL P Z D e VIEW P A c A1 b 0.13 (0.005) MOTOROLA M 0.10 (0.004) 6 DIM A A1 b c D E e HE L LE M Q1 Z MILLIMETERS MIN MAX --2.05 0.05 0.20 0.35 0.50 0.18 0.27 12.35 12.80 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 --0.81 INCHES MIN MAX --0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.486 0.504 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 --0.032 ECLinPS and ECLinPS Lite DL140 — Rev 3 MC74LVQ240 OUTLINE DIMENSIONS SD SUFFIX PLASTIC SSOP PACKAGE CASE 940C–03 ISSUE B 20X K REF 0.12 (0.005) T U M V S S NOTES: 13 DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 14 CONTROLLING DIMENSION: MILLIMETER. 15 DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 16 DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 17 DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION/INTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF K DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR INTRUSION SHALL NOT REDUCE DIMENSION K BY MORE THAN 0.07 (0.002) AT LEAST MATERIAL CONDITION. 18 TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 19 DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE –W–. 0.25 (0.010) N 20 L/2 11 M N B L ÉÉÉ ÇÇÇ ÇÇÇ ÉÉÉ ÇÇÇ ÉÉÉ ÇÇÇ ÉÉÉ F PIN 1 IDENT 1 10 DETAIL E K –U– A –V– 0.20 (0.008) M T U J S J1 DIM A B C D F G H J J1 K K1 L M K1 SECTION N–N –T– –W– C 0.076 (0.003) SEATING PLANE D G DETAIL E H 20X 0.15 (0.006) T U K REF M T U S V ÍÍÍÍ ÍÍÍÍ ÍÍÍÍ ÍÍÍÍ ÍÍÍÍ S K K1 2X L/2 20 11 B L J J1 –U– PIN 1 IDENT SECTION N–N 1 10 0.25 (0.010) N 0.15 (0.006) T U S NOTES: 6 DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 7 CONTROLLING DIMENSION: MILLIMETER. 8 DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 9 DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 10 DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 11 TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 12 DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE –W–. M A –V– N F DETAIL E –W– C D G INCHES MIN MAX 0.278 0.288 0.205 0.212 0.068 0.078 0.002 0.008 0.024 0.037 0.026 BSC 0.023 0.030 0.003 0.008 0.003 0.006 0.010 0.015 0.010 0.013 0.301 0.311 0_ 8_ DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948E–02 ISSUE A 0.10 (0.004) S MILLIMETERS MIN MAX 7.07 7.33 5.20 5.38 1.73 1.99 0.05 0.21 0.63 0.95 0.65 BSC 0.59 0.75 0.09 0.20 0.09 0.16 0.25 0.38 0.25 0.33 7.65 7.90 0_ 8_ H DETAIL E 0.100 (0.004) –T– SEATING DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 6.40 6.60 4.30 4.50 1.20 ––– 0.05 0.15 0.50 0.75 0.65 BSC 0.27 0.37 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.252 0.260 0.169 0.177 0.047 ––– 0.002 0.006 0.020 0.030 0.026 BSC 0.011 0.015 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_ PLANE ECLinPS and ECLinPS Lite DL140 — Rev 3 7 MOTOROLA MC74LVQ240 Motorola reserves the right to make changes without further notice to any products herein. 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