HD74LV4066A Quad. Analog Switches / Quad. Multiplexers REJ03D0340–0400Z (Previous ADE-205-285B (Z)) Rev.4.00 Jul. 21, 2004 Description The HD74LV4066A handles both analog and digital signals, and enables signals of either type with amplitudes of up to 5.5 V (peak) to be transmitted in either direction (at VCC = 0 V to 5.5 V). Each switch section has its own enable input control (C). A high-level voltage applied to C turns on the associated switch section. Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems. Features • VCC = 2.0 V to 5.5 V operation • All control inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) • Ordering Information Part Name Package Type Package Code Package Abbreviation Taping Abbreviation (Quantity) HD74LV4066AFPEL HD74LV4066ARPEL HD74LV4066ATELL SOP–14 pin (JEITA) SOP–14 pin (JEDEC) TSSOP–14 pin FP–14DAV FP–14DNV TTP–14DV FP RP T EL (2,000 pcs/reel) EL (2,500 pcs/reel) ELL (2,000 pcs/reel) Note: Please consult the sales office for the above package availability. Function Table Control Switch L H OFF ON Note: H: High level L: Low level Rev.4.00 Jul. 21, 2004 page 1 of 12 HD74LV4066A Pin Arrangement 14 VCC 1A 1 1B 2 13 1C 2B 3 12 4C 2A 4 11 4A 2C 5 10 4B 3C 6 9 3B GND 7 8 3A (Top view) Absolute Maximum Ratings Item Symbol Ratings Unit Supply voltage range Input voltage range*1 Output voltage range*1, 2 Input clamp current Output clamp current Continuous output current VCC VI VO IIK IOK IO ICC or IGND –0.5 to 7.0 –0.5 to 7.0 –0.5 to VCC + 0.5 –20 ±50 ±25 ±50 V V V mA mA mA mA Maximum power dissipation at 3 Ta = 25°C (in still air)* PT mW Storage temperature Tstg 785 500 –65 to 150 Continuous current through VCC or GND Conditions Output: H or L VI < 0 VO < 0 or VO > VCC VO = 0 to VCC SOP TSSOP °C Notes: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. 1. The input and output voltage ratings may be exceeded even if the input and output clamp-current ratings are observed. 2. This value is limited to 5.5 V maximum. 3. The maximum package power dissipation was calculated using a junction temperature of 150°C. Rev.4.00 Jul. 21, 2004 page 2 of 12 HD74LV4066A Recommended Operating Conditions Item Symbol Supply voltage range VCC Input voltage range Output voltage range Input transition rise or fall rate VI VI/O ∆t/∆v Operating free-air temperature Ta Min 1 2.0* 0 0 0 0 0 –40 Max Unit 5.5 5.5 VCC 200 100 20 85 V V V ns/V Conditions VCC = 2.3 to 2.7 V VCC = 3.0 to 3.6 V VCC = 4.5 to 5.5 V °C Notes: Unused or floating control inputs must be held high or low. 1. With the supply voltage at or around 2 V, the analog switch on-state resistance loses linearity significantly. It is recommended that only digital signals be transmitted at these low supply voltages. Logic Diagram A C Rev.4.00 Jul. 21, 2004 page 3 of 12 B HD74LV4066A DC Electrical Characteristics Ta = 25°C Ta = –40 to 85°C Item Symbol VCC (V) Min Typ Max Min Max Unit Test Conditions Input voltage VIH 2.0 2.3 to 2.7 3.0 to 3.6 4.5 to 5.5 2.0 2.3 to 2.7 3.0 to 3.6 4.5 to 5.5 2.3 3.0 4.5 2.3 3.0 4.5 2.3 — — — — — — — — — — — — — — — — — — — — — — — 60 50 40 250 100 50 20 — — — — — — — — 180 150 75 500 180 100 30 1.5 VCC × 0.7 VCC × 0.7 VCC × 0.7 — — — — — — — — — — — — — — — 0.5 VCC × 0.3 VCC × 0.3 VCC × 0.3 225 190 100 600 225 125 40 V Control input only Ω VIN = VCC or GND VC = VIH IT = 1 mA Ω VIN = VCC to GND VC = VIH IT = 1 mA Ω 3.0 4.5 Is (OFF) 5.5 — — — 10 7 — 20 15 ±0.1 — — — 30 20 ±1.0 VIN = VCC to GND VC = VIH IT = 1 mA µA On-state switch leakage current Is (ON) 5.5 — — ±0.1 — ±1.0 µA Input current Quiescent supply current IIN ICC 0 to 5.5 5.5 — — — — ±0.1 — — — ±1.0 20 µA µA VIN = VCC, VOUT = GND or VIN = GND, VO = VCC, VC = VIL VIN = VCC or GND VC = VIH VIN = 5.5 V or GND VIN = VCC or GND VIL On-state switch resistance RON Peak on resistance RON (P) Difference of on-state resistance between switches ∆RON Off-state switch leakage current Note: For conditions shown as Min or Max, use the appropriate values under recommended operating conditions. Rev.4.00 Jul. 21, 2004 page 4 of 12 HD74LV4066A Switching Characteristics VCC = 2.5 ± 0.2 V Ta = 25°C Ta = –40 to 85°C Item Symbol Min Typ Max Min Max Unit Test Conditions Propagation delay time tPLH tPHL 16.0 18.0 20.0 32.0 23.0 32.0 RL = 1 kΩ tHZ tLZ — — — — — — ns Disable time 10.0 12.0 15.0 25.0 15.0 25.0 CL = 15 pF CL = 50 pF tZH tZL 2.0 5.0 6.0 8.0 7.0 11.0 ns Enable time — — — — — — ns RL = 1 kΩ CL = 15 pF FROM (Input) TO (Output) A or B B or A C A or B C A or B CL = 50 pF CL = 15 pF CL = 50 pF VCC = 3.3 ± 0.3 V Ta = 25°C Ta = –40 to 85°C Item Symbol Min Typ Max Min Max Unit Test Conditions Propagation delay time tPLH tPHL 10.0 12.0 15.0 22.0 15.0 22.0 RL = 1 kΩ tHZ tLZ — — — — — — ns Disable time 6.0 9.0 11.0 18.0 11.0 18.0 CL = 15 pF CL = 50 pF tZH tZL 1.5 4.0 4.0 6.0 5.0 8.0 ns Enable time — — — — — — ns RL = 1 kΩ CL = 15 pF FROM (Input) TO (Output) A or B B or A C A or B C A or B CL = 50 pF CL = 15 pF CL = 50 pF VCC = 5.0 ± 0.5 V Ta = 25°C Ta = –40 to 85°C Item Symbol Min Typ Max Min Max Unit Test Conditions Propagation delay time tPLH tPHL 4.0 6.0 7.0 12.0 7.0 12.0 — — — — — — 7.0 8.0 10.0 16.0 10.0 16.0 CL = 15 pF CL = 50 pF tZH tZL 1.0 3.0 3.0 5.0 4.0 6.0 ns Enable time — — — — — — ns RL = 1 kΩ Disable time tHZ tLZ Rev.4.00 Jul. 21, 2004 page 5 of 12 CL = 15 pF FROM (Input) TO (Output) A or B B or A C A or B C A or B CL = 50 pF ns RL = 1 kΩ CL = 15 pF CL = 50 pF HD74LV4066A Switching Characteristics (Cont.) Item Symbol Ta = 25°C VCC (V) Min Typ Max Unit Control input capacitance Switch terminal capacitance CIC — — 3.5 — pF CI/O — — 6.0 — pF Feedthrough capacitance CT — — 0.5 — pF Power dissipation capacitance CPD — — 4.0 — pF Frequency response (Switch ON) 2.3 3.0 4.5 — — — 30.0 35.0 50.0 — — — MHz Crosstalk (Between any switches) 2.3 3.0 4.5 — — — –45.0 — –45.0 — –45.0 — dB Crosstalk (Control input to signal output) 2.3 3.0 4.5 — — — 15.0 20.0 50.0 — — — mV Feedthrough attenuation (Switch OFF) 2.3 3.0 4.5 — — — –40.0 — –40.0 — –40.0 — dB Sine-wave distortion 2.3 3.0 4.5 — — — 0.1 0.1 0.1 % Rev.4.00 Jul. 21, 2004 page 6 of 12 — — — Test Conditions CL = 50 pF, RL = 600 Ω Adjust fin voltage to obtain 0 dBm at output when fin is 1 MHz (sine wave). Increase fin frequency until the dB-meter reads –3dBm. 20 log (VO/VI) = –3 dBm CL = 50 pF, RL = 600 Ω Adjust fin voltage to obtain 0 dBm at input when fin is 1 MHz (sine wave). CL = 50 pF, RL = 600 Ω Adjust RL value to obtain 0 A at IIN/OUT when fin is 1 MHz (square wave). CL = 50 pF, RL = 600 Ω Adjust fin voltage to obtain 0 dBm at input when fin is 1 MHz (sine wave). CL = 50 pF, RL = 10 kΩ fIN = 1 kHz (sine wave) VI = 2 VP-P, VCC = 2.3 V VI = 2.5 VP-P, VCC = 3.0 V VI = 4 VP-P, VCC = 4.5 V FROM TO (Input) (Output) A or B B or A A or B B or A C A or B A or B B or A A or B B or A HD74LV4066A Test Circuits RON: On-state switch resistance VCC VC = VIH VCC VIN = VCC or GND VOUT (ON) GND R ON = VIN −VOUT 10 1.0 mA V −3 (Ω) VIN −VOUT Is (OFF): Off-state switch leakage current, Is (ON): On-state switch leakage current VCC VC = VIL VCC A A (OFF) GND B CONDITION 1: VA = 0, VB = VCC CONDITION 2: VA = VCC , V B = 0 VCC VC = VIH VCC A Rev.4.00 Jul. 21, 2004 page 7 of 12 A (ON) GND B Open VA = VCC or GND HD74LV4066A t PLH, t PHL : Propagation delay time (from switch input to switch output) VCC VC = VIH VCC A B (ON) GND RL = 50 Ω CL = 15 or 50 pF Switching time VCC RL = 50 Ω VC S1 RL = VOUT 1 k Ω VCC VIN S2 CL = 15 or 50 pF GND TEST S1 S2 tLZ /t ZL GND VCC tHZ /t ZH VCC GND VCC VC VCC VC 50% VCC 0V t ZL 50% VCC 0V t ZH ≈VCC VOUT VOH VOUT 50% VCC 50% VCC ≈0 V VOL VCC VC VCC VC 50% VCC 0V t LZ Rev.4.00 Jul. 21, 2004 page 8 of 12 VOL +0.3 V VOUT VOL 0V t HZ ≈VCC VOUT 50% VCC VOH −0.3 V VOH ≈0 V HD74LV4066A Frequency response (Switch ON) VCC f in = sine wave VC = VIH f in 0.1 µF VIN RL = 50 Ω VCC (ON) GND VOUT RL = 600 Ω CL = 50 pF VCC /2 Crosstalk (Between any switches) VCC VC = VIH f in 0.1 µF RL = 600 Ω VIN RL = 50 ½ VCC (ON) GND VOUT1 RL = 600 Ω CL = 50 pF VCC /2 VCC VC = VIL VCC RL = 600 Ω VCC /2 Rev.4.00 Jul. 21, 2004 page 9 of 12 (OFF) GND VOUT2 RL = 600 Ω VCC /2 CL = 50 pF HD74LV4066A Crosstalk (Control input to signal output) VCC RL = 50 Ω VC VCC VOUT RL = 600 Ω GND VCC /2 RL = 600 Ω CL = 50 pF VCC /2 Feedthrough attenuation (Switch OFF) VCC VC = VIL 0.1 µF f in VIN RL = 50 Ω RL = 600 Ω VCC (OFF) GND VCC /2 VOUT RL = 600 Ω CL = 50 pF VCC /2 Sine-wave distortion VCC VC = VIH f in 10 µF VIN VCC (ON) GND VOUT RL = 10 k Ω VCC /2 Rev.4.00 Jul. 21, 2004 page 10 of 12 CL = 50 pF HD74LV4066A Package Dimensions As of January, 2003 Unit: mm 10.06 10.5 Max 8 5.5 14 1 1.42 Max *0.20 ± 0.05 2.20 Max 7 *0.40 ± 0.06 1.15 0˚ – 8˚ 0.10 ± 0.10 1.27 0.20 7.80 +– 0.30 0.70 ± 0.20 0.15 0.12 M Package Code JEDEC JEITA Mass (reference value) *Ni/Pd/Au plating FP-14DAV — Conforms 0.23 g As of January, 2003 Unit: mm 8.65 9.05 Max 8 1 7 *0.20 ± 0.05 0.635 Max 1.75 Max 3.95 14 + 0.10 6.10 – 0.30 1.08 + 0.67 0.14 – 0.04 *0.40 ± 0.06 + 0.11 0˚ – 8˚ 1.27 0.60 – 0.20 0.15 0.25 M *Ni/Pd/Au plating Rev.4.00 Jul. 21, 2004 page 11 of 12 Package Code JEDEC JEITA Mass (reference value) FP-14DNV Conforms Conforms 0.13 g HD74LV4066A As of January, 2003 Unit: mm 4.40 5.00 5.30 Max 14 8 1 7 0.65 *0.20 ± 0.05 1.0 0.13 M 6.40 ± 0.20 *Ni/Pd/Au plating Rev.4.00 Jul. 21, 2004 page 12 of 12 0.07 +0.03 –0.04 0.10 *0.15 ± 0.05 1.10 Max 0.83 Max 0˚ – 8˚ 0.50 ± 0.10 Package Code JEDEC JEITA Mass (reference value) TTP-14DV — — 0.05 g Sales Strategic Planning Div. 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