PD-95905
SMPS MOSFET
IRFBA22N50APbF
HEXFET® Power MOSFET
Applications
l Switch Mode Power Supply ( SMPS )
l Uninterruptible Power Supply
l High Speed Power Switching
l Lead-Free
VDSS
RDS(on) max
ID
0.23Ω
24A
500V
Benefits
l
l
l
l
Low Gate Charge Qg results in Simple
Drive Requirement
Improved Gate, Avalanche and Dynamic
dv/dt Ruggedness
Fully Characterized Capacitance and
Avalanche Voltage and Current
Effective Coss Specified (See AN1001)
Super-220
(TO-273AA)
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Recommended clip force
Max.
24
15
96
340
2.7
± 30
3.4
-55 to + 150
Units
A
W
W/°C
V
V/ns
°C
300 (1.6mm from case )
20
N
Applicable Off Line SMPS Topologies:
l
l
Full Bridge Converters
Power Factor Correction Boost
Notes
through
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are on page 8
1
09/15/04
IRFBA22N50APbF
Static @ TJ = 25°C (unless otherwise specified)
V(BR)DSS
RDS(on)
VGS(th)
Parameter
Drain-to-Source Breakdown Voltage
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min.
500
–––
2.0
–––
–––
–––
–––
Typ.
–––
–––
–––
–––
–––
–––
–––
Max. Units
Conditions
–––
V
VGS = 0V, I D = 250µA
0.23
Ω
VGS = 10V, ID = 13.8A
4.0
V
VDS = VGS, ID = 250µA
25
VDS = 500V, VGS = 0V
µA
250
VDS = 400V, VGS = 0V, TJ = 125°C
100
VGS = 30V
nA
-100
VGS = -30V
Dynamic @ TJ = 25°C (unless otherwise specified)
gfs
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
Min.
12
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
–––
–––
–––
20
66
46
44
3400
500
17
4900
130
150
Max. Units
Conditions
–––
S
VDS = 50V, ID = 13.8A
115
ID = 23A
30
nC
VDS = 400V
50
VGS = 10V, See Fig. 6 and 13
–––
VDD = 250V
–––
ID = 23A
ns
–––
RG = 4.3Ω
–––
RD = 10.6Ω,See Fig. 10
–––
VGS = 0V
–––
VDS = 25V
–––
pF
ƒ = 1.0MHz, See Fig. 5
–––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 400V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 0V to 400V
Avalanche Characteristics
Parameter
EAS
IAR
EAR
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Typ.
Max.
Units
–––
–––
–––
1200
24
34
mJ
A
mJ
Typ.
Max.
Units
–––
0.50
–––
0.37
–––
58
°C/W
Thermal Resistance
Parameter
RθJC
RθCS
RθJA
Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Diode Characteristics
IS
ISM
VSD
trr
Qrr
ton
2
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
23
––– –––
showing the
A
G
integral reverse
––– –––
92
S
p-n junction diode.
––– ––– 1.5
V
TJ = 25°C, IS = 23A, VGS = 0V
––– 500 750
ns
TJ = 25°C, IF = 23A
––– 6.4
9.6
µC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRFBA22N50APbF
100
100
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
10
1
4.5V
20µs PULSE WIDTH
TJ = 25 °C
0.1
0.1
1
10
10
4.5V
100
RDS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
3.0
TJ = 150 ° C
10
TJ = 25 ° C
V DS = 50V
20µs PULSE WIDTH
7.0
8.0
9.0
10.0
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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10
100
Fig 2. Typical Output Characteristics
100
6.0
1
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
5.0
20µs PULSE WIDTH
TJ = 150 °C
1
0.1
VDS , Drain-to-Source Voltage (V)
1
4.0
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
ID = 23A
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20
VGS = 10V
0
20
40
60
80 100 120 140 160
TJ , Junction Temperature ( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRFBA22N50APbF
7000
VGS , Gate-to-Source Voltage (V)
6000
C, Capacitance (pF)
20
V GS = 0V,
f = 1MHz
Ciss = Cgs + Cgd , Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
5000
4000
Ciss
3000
Coss
2000
1000
Crss
0
10
100
12
8
4
0
1000
FOR TEST CIRCUIT
SEE FIGURE 13
0
20
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
60
80
100
120
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
1000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
I D , Drain Current (A)
ISD , Reverse Drain Current (A)
40
QG , Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)
TJ = 150 ° C
100
10
TJ = 25 ° C
1
0.4
V GS = 0 V
0.6
0.8
1.0
1.2
1.4
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
VDS = 400V
VDS = 250V
VDS = 100V
16
A
1
ID = 23A
10us
100us
10
1ms
1
1.6
TC = 25 ° C
TJ = 150 ° C
Single Pulse
10
10ms
100
1000
10000
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRFBA22N50APbF
25
RD
V DS
VGS
ID , Drain Current (A)
20
D.U.T.
RG
+
-VDD
10V
15
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
10
Fig 10a. Switching Time Test Circuit
VDS
5
90%
0
25
50
75
100
125
150
TC , Case Temperature ( °C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
1
D = 0.50
0.1
0.01
0.20
0.10
0.05
0.02
0.01
PDM
SINGLE PULSE
(THERMAL RESPONSE)
t1
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.001
0.00001
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFBA22N50APbF
D.U.T
RG
+
V
- DD
IAS
20V
0.01Ω
tp
ID
10.7A
15A
BOTTOM 24A
TOP
2000
DRIVER
L
VDS
EAS , Single Pulse Avalanche Energy (mJ)
2500
15V
1500
A
1000
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
500
0
25
50
75
100
125
150
Starting TJ , Junction Temperature ( °C)
I AS
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
QG
10 V
640
QGD
VG
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
12V
.2µF
.3µF
D.U.T.
V DSav , Avalanche Voltage (V)
QGS
630
620
610
600
+
V
- DS
590
VGS
4
8
12
16
20
24
I av , Avalanche Current (A)
3mA
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
6
A
0
Fig 12d. Typical Drain-to-Source Voltage
Vs. Avalanche Current
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IRFBA22N50APbF
Peak Diode Recovery dv/dt Test Circuit
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
D.U.T
+
-
-
+
RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Driver Gate Drive
P.W.
Period
D=
+
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® Power MOSFET
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7
IRFBA22N50APbF
Super-220 ( TO-273AA ) Package Outline
11.00 [.433]
10.00 [.394]
A
5.00 [.196]
4.00 [.158]
9.00 [.
8.00 [.
B
0.25 [
1.50 [.059]
0.50 [.020]
4
15.00 [.590]
14.00 [.552]
1
2
3
4.00 [.157]
3.50 [.138]
14.50 [.570]
13.00 [.512]
3X
2.55 [.100]
13.50 [.
12.50 [.
4X
1.30 [.051]
0.90 [.036]
0.25 [.010]
2X
B A
1.00 [.039]
0.70 [.028]
3.00 [.118]
2.50 [.099]
MOSFET
IGBT
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Starting TJ = 25°C, L = 3.4mH
RG = 25Ω, IAS = 24A. (See Figure 12)
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
ISD ≤ 23A, di/dt ≤ 123A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 150°C
8
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IRFBA22N50APbF
Super-220 (TO-273AA) Part Marking Information
EXAMPLE: THIS IS AN IRFBA22N50A WITH
ASSEMBLY LOT CODE 1789
ASSEMBLED ON WW 19, 1997
IN THE ASSEMBLY LINE "C"
PART NUMBER
INTERNATIONAL RECTIFIER
LOGO
IRFBA22N50A
719C
17
89
ASSEMBLY LOT CODE
Note: "P" in assembly line position
indicates "Lead-Free"
DATE CODE
YEAR 7 = 1997
WEEK 19
LINE C
TOP
Super-220 not recommended for surface mount application
Data and specifications subject to change without notice.
This product has been designed and qualified for the industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.09/04
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