ON NTLJS3113PT1G Power mosfet Datasheet

NTLJS3113P
Power MOSFET
−20 V, −7.7 A, Single P−Channel, 2x2 mm,
WDFN Package
Features
• Recommended Replacement Device − NTLUS3A40P
• WDFN Package Provides Exposed Drain Pad for Excellent Thermal
•
•
•
•
•
Conduction
2x2 mm Footprint Same as SC−88 Package
Lowest RDS(on) Solution in 2x2 mm Package
1.5 V RDS(on) Rating for Operation at Low Voltage Logic Level Gate
Drive
Low Profile (< 0.8 mm) for Easy Fit in Thin Environments
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
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V(BR)DSS
ID MAX (Note 1)
RDS(on) MAX
40 mW @ −4.5 V
50 mW @ −2.5 V
−20 V
−7.7 A
75 mW @ −1.8 V
200 mW @ −1.5 V
S
G
Applications
• DC−DC Converters (Buck and Boost Circuits)
• Optimized for Battery and Load Management Applications in
Portable Equipment such as, Cell Phones, PDA’s, Media Players, etc.
D
P−CHANNEL MOSFET
• High Side Load Switch
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain
Current (Note 1)
Power Dissipation
(Note 1)
Steady
State
TA = 25°C
t≤5s
TA = 25°C
Steady
State
Symbol
Value
Unit
VDSS
−20
V
VGS
±8.0
V
ID
−5.8
A
TA = 85°C
Power Dissipation
(Note 2)
Pulsed Drain Current
PIN CONNECTIONS
3.3
ID
TA = 85°C
TA = 25°C
A
−3.5
−2.5
PD
0.7
W
IDM
−23
A
TJ, TSTG
−55 to
150
°C
Source Current (Body Diode) (Note 2)
IS
−2.8
A
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
TL
260
°C
tp = 10 ms
Operating Junction and Storage Temperature
May, 2016 − Rev. 6
D
1
D
2
G
3
D
S
6
D
5
D
4
S
(Top View)
ORDERING INFORMATION
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq
[2 oz] including traces).
2. Surface Mounted on FR4 Board using the minimum recommended pad size,
(30 mm2, 2 oz Cu).
© Semiconductor Components Industries, LLC, 2016
6
5
4
J8 = Specific Device Code
M = Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
W
1.9
1
2 J8MG
G
3
Pin 1
TA = 25°C
TA = 25°C
Steady
State
WDFN6
CASE 506AP
−7.7
PD
MARKING
DIAGRAM
D
−4.4
t≤5s
Continuous Drain
Current (Note 2)
S
1
Device
Package
Shipping†
NTLJS3113PT1G
WDFN6
(Pb−Free)
3000/Tape & Reel
NTLJS3113PTAG
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Publication Order Number:
NTLJS3113P/D
NTLJS3113P
THERMAL RESISTANCE RATINGS
Symbol
Max
Junction−to−Ambient – Steady State (Note 3)
Parameter
RqJA
65
Junction−to−Ambient – t ≤ 5 s (Note 3)
RqJA
38
Junction−to−Ambient – Steady State Min Pad (Note 4)
RqJA
180
Unit
°C/W
3. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces).
4. Surface Mounted on FR4 Board using the minimum recommended pad size (30 mm2, 2 oz Cu).
MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
Test Conditions
Min
−20
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = −250 mA
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/TJ
ID = −250 mA, Ref to 25°C
Zero Gate Voltage Drain Current
IDSS
Gate−to−Source Leakage Current
VDS = −16 V, VGS = 0 V
V
−10.1
mV/°C
TJ = 25°C
−1.0
TJ = 85°C
−10
IGSS
VDS = 0 V, VGS = ±8.0 V
Gate Threshold Voltage
VGS(TH)
VGS = VDS, ID = −250 mA
Negative Gate Threshold
Temperature Coefficient
VGS(TH)/TJ
±1.0
mA
mA
ON CHARACTERISTICS (Note 5)
Drain−to−Source On−Resistance
RDS(on)
Forward Transconductance
gFS
−0.45
−0.67
−1.0
2.68
V
mV/°C
VGS = −4.5, ID = −3.0 A
32
40
VGS = −2.5, ID = −3.0 A
44
50
VGS = −1.8, ID = −2.0 A
67
75
VGS = −1.5, ID = −1.8 A
90
200
VDS = −16 V, ID = −3.0 A
5.9
S
1329
pF
mW
CHARGES, CAPACITANCES AND GATE RESISTANCE
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
VGS = 0 V, f = 1.0 MHz,
VDS = −16 V
213
120
Total Gate Charge
QG(TOT)
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
2.9
RG
14.4
W
td(ON)
6.9
ns
Gate Resistance
13
VGS = −4.5 V, VDS = −16 V,
ID = −3.0 A
15.7
nC
1.5
2.2
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
tr
td(OFF)
VGS = −4.5 V, VDD = −10 V,
ID = −3.0 A, RG = 3.0 W
tf
17.5
60
56.5
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Recovery Voltage
Reverse Recovery Time
VSD
TJ = 25°C
−0.78
TJ = 125°C
−0.67
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Time
VGS = 0 V, IS = −1.0 A
70.8
VGS = 0 V, dISD/dt = 100 A/ms,
IS = −1.0 A
QRR
14.3
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2
V
106
ns
56.4
44
5. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
−1.2
nC
NTLJS3113P
TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
TJ = 25°C
9
−ID, DRAIN CURRENT (AMPS)
−1.6 V
6
−1.5 V
5
4
−1.4 V
3
−1.3 V
2
−1.2 V
1
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
VGS = −1.7 V to −8 V
−1.1 V
0
1
4
3
2
6
5
VDS ≥ 10 V
8
7
6
5
4
3
TJ = 25°C
2
1
TJ = 125°C
0
0
3
Figure 2. Transfer Characteristics
TJ = 100°C
0.03
TJ = 25°C
TJ = −55°C
0.02
1.0
1.5
2.5
2.0
3.0
0.08
TJ = 25°C
0.07
VGS = −1.8 V
0.06
0.05
VGS = −2.5 V
0.04
0.03
VGS = −4.5 V
0.02
0.01
1
2
−ID, DRAIN CURRENT (AMPS)
100000
−IDSS, LEAKAGE (nA)
1.3
1.1
0.9
0
25
50
75
100
4
6
5
7
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
ID = −6 A
VGS = −4.5 V
−25
3
−ID, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance versus Drain Current
RDS(on), DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
2.5
2
Figure 1. On−Region Characteristics
VGS = −4.5 V
0.7
−50
1.5
1
0.5
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
0.04
1.5
TJ = −55°C
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
−ID, DRAIN CURRENT (AMPS)
7
125
150
VGS = 0 V
10000
TJ = 150°C
1000
TJ = 100°C
100
10
2
4
6
8
10
12
14
16
18
TJ, JUNCTION TEMPERATURE (°C)
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
versus Voltage
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3
20
NTLJS3113P
VDS = VGS = 0 V
C, CAPACITANCE (pF)
2400
TJ = 25°C
Ciss
2000
1600
1200
Crss
800
Coss
400
0
5
VGS
0
VDS
5
10
15
20
QT
4
0
−Is, SOURCE CURRENT (AMPS)
td(off)
tf
100
tr
td(on)
10
10
RG, GATE RESISTANCE (OHMS)
0
4
8
QG, TOTAL GATE CHARGE (nC)
−ID, DRAIN CURRENT (AMPS)
10
VGS = 0 V
2.5
2
1.5
1
TJ = 150°C
0.5
TJ = 25°C
0.2
100 ms
1 ms
10 ms
1
0.01
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.1
0.4
0.6
0.8
1.0
Figure 10. Diode Forward Voltage versus Current
See Note 2, Page 1
SINGLE PULSE
TC = 25°C
0.1
0
−VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
100
12
4
Figure 8. Gate−To−Source and Drain−To−Source
Voltage versus Total Charge
0
0
100
8
QGD
ID = −3.0 A
TJ = 25°C
3
VDD = −15 V
ID = −3.0 A
VGS = −4.5 V
12
VGS
1
1000
t, TIME (ns)
VDS
2 QGS
Figure 7. Capacitance Variation
1
16
3
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
1
20
5
-V DS , DRAIN-TO-SOURCE VOLTAGE (VOLTS)
2800
-V GS, GATE-TO-SOURCE VOLTAGE (VOLTS)
TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
dc
10
1
100
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
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4
NTLJS3113P
EFFECTIVE TRANSIENT THERMAL RESISTANCE
TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
1000
100 D = 0.5
0.2
0.1
10 0.05
P(pk)
0.02
0.01
1
0.1
0.000001
See Note 2 on Page 1
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) − TA = P(pk) RqJA(t)
t1
t2
DUTY CYCLE, D = t1/t2
SINGLE PULSE
0.00001
0.0001
0.001
0.01
0.1
t, TIME (sec)
Figure 12. Thermal Response
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5
1
10
100
1000
NTLJS3113P
PACKAGE DIMENSIONS
WDFN6 2x2
CASE 506AP
ISSUE B
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL AND
IS MEASURED BETWEEN 0.15 AND 0.20mm FROM
TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED PAD AS
WELL AS THE TERMINALS.
5. CENTER TERMINAL LEAD IS OPTIONAL. TERMINAL
LEAD IS CONNECTED TO TERMINAL LEAD # 4.
6. PINS 1, 2, 5 AND 6 ARE TIED TO THE FLAG.
A
B
PIN ONE
REFERENCE
0.10 C
2X
2X
ÍÍÍ
ÍÍÍ
ÍÍÍ
E
DIM
A
A1
A3
b
b1
D
D2
E
E2
e
K
L
L2
J
J1
0.10 C
A3
0.10 C
A
7X
0.08 C
A1
C
D2
6X
L
SOLDERING FOOTPRINT*
SEATING
PLANE
4X
1
2.30
e
L2
3
b1
6X
B
1
b
J
J1
0.60
1.25
NOTE 5
4
6X
0.35
0.43
0.05 C
6
1.10
6X
0.10 C A
E2
K
MILLIMETERS
MIN
MAX
0.70
0.80
0.00
0.05
0.20 REF
0.25
0.35
0.51
0.61
2.00 BSC
1.00
1.20
2.00 BSC
1.10
1.30
0.65 BSC
0.15 REF
0.20
0.30
0.20
0.30
0.27 REF
0.65 REF
0.35
6X
0.10 C A
0.05 C
B
0.34
NOTE 3
BOTTOM VIEW
0.65
PITCH
0.66
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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