AS6C8008A Family Low Power, 1Mx8 SRAM Document Title 1M x 8 bit Super Low Power and Low Voltage Full CMOS Static RAM Revision History Revision No. History 0.0 Date -. Initial Draft Aug. 7 Alliance Memory, Inc., 551 Taylor Way, Suite #1, San Carlos, CA 94070, USA Tel: +1 650 610 6800 Fax: +1 650 620 9211 Page 1 of 13 Remark Preliminary 2013 AS6C8008A Family Low Power, 1Mx8 SRAM FEATURES • • • • • • GENERAL DESCRIPTION The AS6C8008A families are fabricated by Alliance Memory’s advanced full CMOS process technology. The families support industrial temperature range and Chip Scale Package for user flexibility of system design. The families also supports low data retention voltage for battery back- up operation with low data retention current. Process Technology : 0.15 µm Full CMOS Organization : 1M x 8 bit Power Supply Voltage : 2.7V ~ 3.6V Low Data Retention Voltage : 1.5V(Min.) Three state output and TTL Compatible Package Type : 48-FPBGA, 44-TSOP2 PRODUCT FAMILY Power Dissipation Product Operating Vcc PKG Family Temperature Range Speed Standby Operating (ISB1, Typ.) (ICC1.Max.) 2 A1) 4 mA Type Industrial AS6C8008A-45BIN 2.7 ~ 3.6 V 45 ns 48-FPBGA o (-40 ~ 85 C) AS6C8008A-45ZIN 1) 44-TSOP2 Typical values are measured at Vcc=3.3V, TA=25oC and not 100% tested. Alliance Memory, Inc., 551 Taylor Way, Suite #1, San Carlos, CA 94070, USA Tel: +1 650 610 6800 Fax: +1 650 620 9211 Page 2 of 13 AS6C8008A Family Low Power, 1Mx8 SRAM Alliance Memory, Inc., 551 Taylor Way, Suite #1, San Carlos, CA 94070, USA Tel: +1 650 610 6800 Fax: +1 650 620 9211 Page 3 of 13 AS6C8008A Family Low Power, 1Mx8 SRAM PIN CONFIGURATIONS PIN DESCRIPTION Name Function Name Function Chip Select inputs V OE Output Enable input V SS Ground WE Write Enable input NC No Connection CS1, CS2 A0~A19 DQ0~DQ7 CC Power Supply Address inputs Data inputs/outputs Alliance Memory, Inc., 551 Taylor Way, Suite #1, San Carlos, CA 94070, USA Tel: +1 650 610 6800 Fax: +1 650 620 9211 Page 4 of 13 AS6C8008A Family Low Power, 1Mx8 SRAM ABSOLUTE MAXIMUM RATINGS1) Parameter Voltage on Any Pin Relative to Vss Voltage on Vcc supply relative to Vss Power Dissipation Symbol Ratings V -0.2 to 4.0 V CC -0.2 to 4.0 V PD 1.0 W IN, VOUT V Unit °C Operating Temperature TA -40 to 85 1. Stresses greater than those listed under “nav” may cause permanent damage to the device. Functional operation should be restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Alliance Memory, Inc., 551 Taylor Way, Suite #1, San Carlos, CA 94070, USA Tel: +1 650 610 6800 Fax: +1 650 620 9211 Page 5 of 13 AS6C8008A Family Low Power, 1Mx8 SRAM RECOMMENDED DC OPERATING CONDITIONS 1) Parameter Symbol Supply voltage V Ground V Input high voltage V CC SS IH Min Typ Max Unit 2.7 3.3 3.6 V 0 0 0 V 2.2 - VCC + 0.22) V - 0.6 V V 3) IL Input low voltage -0.2 o 1. TA= -40 to 85 C, otherwise specified 2. Overshoot: VCC +2.0 V in case of pulse width < 20ns 3. Undershoot: -2.0 V in case of pulse width < 20ns 4. Overshoot and undershoot are sampled, not 100% tested. CAPACITANCE1) (f =1MHz, TA=25oC) Item Symbol Test Condition Min Max Unit Input capacitance C IN VIN=0V - 8 pF Input/Output capacitance C IO VIO=0V - 10 pF 1. Capacitance is sampled, not100% tested Alliance Memory, Inc., 551 Taylor Way, Suite #1, San Carlos, CA 94070, USA Tel: +1 650 610 6800 Fax: +1 650 620 9211 Page 6 of 13 AS6C8008A Family Low Power, 1Mx8 SRAM DC AND OPERATING CHARACTERISTICS Parameter Symbol LO CS1=VIH or CS2=VIL or OE=VIH or WE=VIL , VIO=VSS to VCC LI I Operating power supply I Min Typ Max Unit V Input leakage current Output leakage current Test Conditions I CC I CC1 =V IN SS to V CC -1 - 1 µA -1 - 1 µA - - 2 mA - - 4 mA 45ns - - 45 55ns - - 35 70ns - - 25 IIO=0mA CS1=VIL, CS2=WE=VIH, VIN=VIH or , VIL Cycle time=1 s, 100% duty, IIO=0mA, CS1<0.2V, CS2>VCC-0.2V, VIN<0.2V or VIN>VCC0.2V Average operating current Cycle time = Min, IIO=0mA, 100% duty, I CC2 mA CS1=VIL, CS2=VIH, VIN=VIL or VIH Output low voltage V OL IOL = 2.1mA - - 0.4 V Output high voltage V OH IOH = -1.0mA 2.4 - - V Standby Current (TTL) I CS1=VIH, CS2=VIL, Other inputs=VIH or VIL >VCC-0.2V, CS2>VCC- (CS CS10.2V 1 controlled) or 0V<CS2<0.2V (CS2 controlled), - - 0.5 mA 1) 15 µA Standby Current (CMOS) I SB LF Other inputs = 0~VCC (Typ. condition : @ 25oC) VCC=3.3V (Max. condition : VCC=3.6V @ 85oC) 1. Typical values are measured at Vcc=3.3V, TA=25oC and not 100% tested. SB1 Alliance Memory, Inc., 551 Taylor Way, Suite #1, San Carlos, CA 94070, USA Tel: +1 650 610 6800 Fax: +1 650 620 9211 Page 7 of 13 - 2 AS6C8008A Family Low Power, 1Mx8 SRAM 45ns Parameter Symbol Max RC 45 - ns AA - 45 ns ,t - 45 ns OE - 30 ns ,t 5 - ns OLZ Read cycle time t Address access time t Chip select to output t CO1 CO2 t Output enable to valid output t LZ1 LZ2 Chip select to low-Z output t Output enable to low-Z output Chip disable to high-Z output t Output disable to high-Z output Output hold from address change 5 - ns t 0 20 ns OHZ 0 20 ns 10 - ns HZ1, HZ2 t Unit Min t OH 45ns Parameter Symbol t Write cycle time Chip select to end of write Min Max WC 45 - ns t 45 - ns AS 0 - ns t CW1, CW2 t Address setup time Unit Address valid to end of write t AW 45 - ns Write pulse width t 45 - ns Write recovery time t WR 0 - ns WHZ 0 20 ns Write to ouput high-Z WP t Data to write time overlap t Data hold from write time t DH 0 - ns End write to output low-Z t OW 5 - ns DW 25 ns Alliance Memory, Inc., 551 Taylor Way, Suite #1, San Carlos, CA 94070, USA Tel: +1 650 610 6800 Fax: +1 650 620 9211 Page 8 of 13 AS6C8008A Family Low Power, 1Mx8 SRAM TIMING DIAGRAMS NOTES (READ CYCLE) 1.tHZ1,2 and tOHZ are defined as the outputs achieve the open circuit conditions and are not referenced to output voltage levels. 2.At any given temperature and voltage condition, tHZ1,2(Max.) is less than tLZ1,2(Min.) both for a given device and from device to device interconnection. Alliance Memory, Inc., 551 Taylor Way, Suite #1, San Carlos, CA 94070, USA Tel: +1 650 610 6800 Fax: +1 650 620 9211 Page 9 of 13 AS6C8008A Family Low Power, 1Mx8 SRAM Alliance Memory, Inc., 551 Taylor Way, Suite #1, San Carlos, CA 94070, USA Tel: +1 650 610 6800 Fax: +1 650 620 9211 Page 10 of 13 AS6C8008A Family Low Power, 1Mx8 SRAM DATA RETENTION CHARACTERISTICS Parameter Symbol VCC for Data Retention V Data Retention Current I Test Condition ISB1 Test Condition DR Min Typ Max Unit 1.5 - 3.6 V - - 4 µA 0 - - (Chip Disabled)1) VCC=1.5V, ISB1 Test Condition DR 1) (Chip Disabled) Chip Deselect to Data Retention Time t SDR See data retention wave form t RDR Operation Recovery Time NOTES 1. See the ISB1 measurement condition of datasheet page 5. Alliance Memory, Inc., 551 Taylor Way, Suite #1, San Carlos, CA 94070, USA Tel: +1 650 610 6800 Fax: +1 650 620 9211 Page 11 of 13 ns t RC - - AS6C8008A Family Low Power, 1Mx8 SRAM PACKAGE DIMENSION 44 - TSOP2 (0.8mm pin pitch) Unit : millimeters / inches Alliance Memory, Inc., 551 Taylor Way, Suite #1, San Carlos, CA 94070, USA Tel: +1 650 610 6800 Fax: +1 650 620 9211 Page 12 of 13 AS6C8008A Family Low Power, 1Mx8 SRAM Alliance Memory, Inc., 551 Taylor Way, Suite #1, San Carlos, CA 94070, USA Tel: +1 650 610 6800 Fax: +1 650 620 9211 Page 13 of 13