ON NCV8612BMNR2G Ultra-low iq automotive system power supply ic power saving triple-output linear regulator Datasheet

NCV8612B
Ultra-Low Iq Automotive
System Power Supply IC
Power Saving Triple-Output
Linear Regulator
The NCV8612B is a multiple output linear regulator IC’s with an
Automatic Switchover (ASO) input voltage selector. The ASO circuit
selects between three different input voltage sources to reduce power
dissipation and to maintain the output voltage level across varying
battery line voltages associated with an automotive environment.
The NCV8612B is specifically designed to address automotive
radio systems and instrument cluster power supply requirements. The
NCV8612B can be used in combination with the 4−Output
Controller/Regulator IC, NCV885x, to form a complete automotive
radio or instrument cluster power solution. The NCV8612B is
intended to supply power to various “always on” loads such as the
CAN transceivers and microcontrollers (core, memory and IO). The
NCV8612B has three output voltages, a reset / delay circuit, and a host
of control features suitable for the automotive radio and instrument
cluster systems.
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MARKING
DIAGRAM
20
NCV8612B
AWLYYWWG
G
1
DFN20
MN SUFFIX
CASE 505AB
A
WL
YY
WW
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Operating Range 7.0 V to 18.0 V (45 V Load Dump Tolerant)
Output Voltage Tolerance, All Rails, $2%
< 50 mA Quiescent Current
Independent Input for LDO3 Linear Regulator
High Voltage Ignition Buffer
Automatic Switchover Input Voltage Selector
Independent Input Voltage Monitor with a High Input Voltage and
Low Input Voltage (Brown−out) Indicators
Thermal Warning Indicator with Thermal Shutdown
Single Reset with Externally Adjustable Delay for the 5 V Rail
Push−Pull Outputs for Logic Level Control Signals
All Ceramic Solution for Reduced Leakage Current at the Output
Enable Input
NCV Prefix for Automotive and Other Applications Requiring Site
and Control Changes
This is a Pb−Free Device
Applications
March, 2010 − Rev. 0
ASO_RAIL
VIN_S3
VIN−B
VOUT3
VIN−H
VOUT2
VIN−A
VOUT1
VBATT_MON
VOUT3FB
HV_DET
RST
BO_DET
DLY
EN
GND
GND
IGNOUT
IGNIN
HOT_FLG
ORDERING INFORMATION
Device
NCV8612BMNR2G
Package
Shipping†
DFN20 2500 / Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
• Automotive Radio
• Instrument Cluster
© Semiconductor Components Industries, LLC, 2010
PIN CONNECTIONS
1
Publication Order Number:
NCV8612B/D
NCV8612B
EN
88
ASO_RAIL
D2
8V
1
1mF
20
V INT
VIN−B
2
VBATT
VBG
D1
VIN_S3
V
OUT3
Adj
19
ILIMIT
Voltage
EN
+
−
V
TH1
1mF
V
VIN−H
V
TH2
V
V
OUT3 FB
V
RFB3
REF
REF
3
18
1000mF
OVS
V
OUT2
3.3V
ILIMIT
+
−
VIN−A
VBATT_MON
5
VIN_MON
OVS
VPP
+
−
6
HV_DET
VRFB2
V REF
Switchover
Control Circuit
4
V
V
TH1
17
ILIMIT
VIN_MON
VPP
7
VPP
RST1
TSD
10
HOT_FLG
V
V REF
−
+
TSD
+
−
RFB1
VRTH
VRFB3
16
11
RST
HV_DET
D3
14
12
IGNOUT
V
OUT3 FB
VPP
15
IGNIN
5V
VPP
Fault Logic
VTH2
BO_DET
OUT1
10kW
9
+ 5V
13
GND
GND
Components
Value
Manufacturer
D1
MBRS2H100T3G
ON Semiconductor
D2
MBR130T1
ON Semiconductor
D3
MMDL914T1
ON Semiconductor
Figure 1. Typical Circuit with the Internal Schematic
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2
DLY
NCV8612B
PIN FUNCTION DESCRIPTIONS
Pin No.
Symbol
1
ASO_RAIL
Description
Output/Input of the automatic switchover (ASO) circuitry. Place a 1 uF ceramic capacitor on
this pin to provide local bypassing to the LDO linear regulator pass devices.
2
VIN−B
Primary power supply input. Connect battery to this pin through a blocking diode.
3
VIN−H
Holdup power supply rail. Connect a storage capacitor to this pin to provide a temporary
backup rail during loss of battery supply. A bleed resistor (typically 1 kW) is needed from VIN−
B to this pin in order to trickle charge this capacitor.
4
VIN−A
Voltage monitor which determines whether the 8 V supply is able to power the outputs. If the
8 V supply is present, the FET’s connected to VIN−B and VIN−H will be turned off, and the 8 V
supply will be providing power to the outputs. If the 8 V supply is not present, the FET’s on
VIN−B and VIN−H will be left on, and the greater of those voltages will be driving the outputs.
5
VBATT_MON
VBATT monitor pin. To operate overvoltage shutdown, HV_DET and BO_DET, connect this pin
to ASO_RAIL or battery. To eliminate overvoltage shutdown, HV_DET and BO_DET, tie this
pin to ground.
6
HV_DET
High−voltage detect output. When VBATT_MON surpasses 19 V, this pin will be driven to
ground. During normal operation, this pin is held at VPP.
7
BO_DET
Brown out indicator output. When VBATT_MON and VIN−A falls below 7.5 V, this pin will be
driven to ground. During normal operation, this pin is held at VPP.
8
EN
Enable pin for the LDO linear regulators. Logic high on this pin will enable the LDO linear regulators. Driving this pin to ground will place the IC in a low power shutdown state.
9
GND
Ground. Reference point for internal signals. Internally connected to pin 13. Ground is not connected to the exposed pad of the DFN20 package.
10
HOT_FLG
11
IGNIN
Ignition buffer input
12
IGOUT
Ignition buffer logic output
13
GND
Ground. Reference point for internal signals. Internally connected to pin 9. Ground is not connected to the exposed pad of the DFN20 package.
14
DLY
Delay pin. Connect a capacitor to this pin to set the delay time.
15
RST
Reset pin. Monitors VOUT1.
16
VOUT3 FB
17
VOUT1
5 V output. Voltage is internally set.
18
VOUT2
3.3 V output. Voltage is internally set.
19
VOUT3
Adjustable voltage output. This voltage is set through an external resistor divider.
20
VIN_S3
Supply rail for the standby linear regulator VOUT3. Tie this pin to ASO_RAIL or a separate
supply rail.
EP
−
Exposed Pad of DFN device. This pad serves as the main path for thermal spreading. The
Exposed Pad is not connected to IC ground.
Thermal warning indicator. This pin provides an early warning signal of an impending thermal
shutdown.
Voltage Adjust Input; use an external voltage divider to set the output voltage
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NCV8612B
MAXIMUM RATINGS (Voltages are with respects to GND unless noted otherwise)
Rating
Symbol
Max
Min
Unit
Maximum DC Voltage
VIN−B, VIN−A, ASO_RAIL,
VBATT_MON, VIN_S3, EN, IGNIN
40
−0.3
V
Peak Transient
VIN−B, VIN−A, ASO_RAIL,
VBATT_MON, VIN_S3, EN, IGNIN
45
−0.3
V
Maximum DC Voltage
VIN−H
24
−0.3
V
Maximum DC Voltage
IGNOUT, VPP, HV_DET, BO_DET,
HOT_FLG, RST, DLY, VOUT1, VOUT2
7
−0.3
V
Maximum DC Voltage
VOUT3
10
−0.3
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
THERMAL INFORMATION
Rating
Symbol
Min
Unit
RqJA
40
°C/W
Operating Junction Temperature Range
TJ
−40 to 150
°C
Maximum Storage Temperature Range
TSTG
−55 to +150
°C
Moisture Sensitivity Level
MSL
1
Thermal Characteristic (Note 1)
1. Values based on measurement of NCV8612B assembled on 2−layer 1−oz Cu thickness PCB with Copper Area of more than 645 mm2 with
several thermal vias for improved thermal performance. Refer to CIRCUIT DESCRIPTION section for safe operating area.
ATTRIBUTES
Rating
Symbol
Min
Unit
ESD Capability, Human Body Model (Note 2)
ESDHB
2
kV
ESD Capability, Machine Model (Note 2)
ESDMM
200
V
ESD Capability, Charged Device Model (Note 2)
ESDCDM
1
kV
IGNIN ESD Capability, Human Body Model (Note 2)
ESDHB_IGNIN
3
kV
IGNIN ESD Capability, Machine Model (Note 2)
ESDMM_IGNIN
200
V
ESD_IGNIN
10
kV
IGNIN ESD Capability (Note 3)
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model (HBM) tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model (MM) tested per AEC−Q100−003 (EIA/JESD22−A115)
ESD Charged Device Model (CDM) tested per EIA/JES D22/C101, Field Induced Charge Model
3. Device tested with external 10 kW series resistance and 1 nF storage capacitor.
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NCV8612B
SUPPLY VOLTAGES AND SYSTEM SPECIFICATION ELECTRICAL CHARACTERISTICS (7 V < ASO_RAIL < 18 V, VIN−H
= VIN−B w ASO_RAIL, VPP = 5 V, VIN_S3 tied to ASO_RAIL, VBATT_MON = 0 V, EN = 5 V, IGNIN = 0 V, ISYS = 3 mA (Note 6))
Minimum/Maximum values are valid for the temperature range −40°C v TJ v 150°C unless noted otherwise. Min/Max values are
guaranteed by test, design or statistical correlation.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
34
50
mA
0.5
mA
SUPPLY RAILS
Quiescent Current (Notes 4 and 6)
Shutdown Current (Note 5)
iq
iSHDN
TJ = 25°C, ISYS = 70 mA, VIN−A =
VIN_S3 = 0 V, VIN−B = 13.2 V
TJ = 25°C, EN = 0 V, VIN−B = 13.2 V
Minimum Operating Voltage
(VIN−H, VIN−B)
4.5
V
THERMAL MONITORING
Thermal Warning (HOT_FLG)
Temperature
TWARN
140
TWARN Hysteresis
10
Thermal Shutdown
160
Thermal Shutdown Hysteresis
10
Delta Junction Temperature
(TSD − TWARN)
10
HOT_FLG Voltage Low
TJ < TWARN, 10 kW Pullup to 5 V
HOT_FLG Voltage High
TJ > TWARN, 10 kW Pulldown to GND
150
170
20
160
°C
20
°C
180
°C
20
°C
30
°C
0.4
V
VOUT1 −
0.5
V
AUTO SWITCHOVER
VIN−A Quiescent Current
24
mA
VIN−A to VIN−B Risetime
TJ = 25°C, CASO_RAIL = 1 mF,
ISYS = 400 mA
200
msec
VIN−B to VIN−A Falltime
TJ = 25 °C, CASO_RAIL = 1 mF,
ISYS = 400 mA
100
msec
VIN−A Operating Threshold
VIN−A Rising
7.2
7.5
7.75
V
VIN−A Operating Hysteresis
VIN−A Falling
100
175
250
mV
Max VIN−B to VASO_RAIL Voltage Drop
ISYS = 400 mA, VIN−B = 7 V
1.5
V
Max VIN−H to VASO_RAIL Voltage Drop
ISYS = 400 mA, VIN−H = 7.5 V
2.0
V
96
%
2.5
%
RESET (RST Pin)
RESET Threshold
% of VOUT1
90
Hysteresis
% of VOUT1
Reset Voltage High
10 kW Pulldown to GND
Reset Voltage Low
10 kW Pullup to 5 V
93
VOUT1 −
0.5
V
0.4
V
7
mA
DELAY (DLY Pin)
2.4
Charge Current
Delay Trip Point Voltage
5
2.0
V
ENABLE (EN pin)
Bias current (Into Pin)
TJ = 25°C, EN = 5 V
Logic High
1.6
5.0
2.0
mA
V
Logic Low
0.8
V
IGNITION BUFFER
Schmitt Trigger Rising Threshold
2.75
3.25
3.75
V
Schmitt Trigger Falling Threshold
0.8
1.0
1.2
V
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NCV8612B
SUPPLY VOLTAGES AND SYSTEM SPECIFICATION ELECTRICAL CHARACTERISTICS (7 V < ASO_RAIL < 18 V, VIN−H
= VIN−B w ASO_RAIL, VPP = 5 V, VIN_S3 tied to ASO_RAIL, VBATT_MON = 0 V, EN = 5 V, IGNIN = 0 V, ISYS = 3 mA (Note 6))
Minimum/Maximum values are valid for the temperature range −40°C v TJ v 150°C unless noted otherwise. Min/Max values are
guaranteed by test, design or statistical correlation.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
0.4
V
0.1
0.5
mA
3
5
mA
0.5
mA
2.5
V
IGNITION BUFFER
IGNOUT Voltage Low
IGNIN = 5 V, 10 kW Pullup to 5 V
IGNOUT Leakage Current
TJ = 25°C, IGNOUT = 5 V
VBATT MONITOR
VBATT_MON Quiescent Current
TJ = 25°C, VBATT_MON = 13.2 V
VBATT_MON Shutdown Current
TJ = 25°C, EN = 0 V,
VBATT_MON = 13.2 V
VBATT_MON Minimum Operating Voltage
Threshold where BO_DET and HV_DET
signals become valid
1.0
VBATT_MON Hysteresis
0.25
HV_DET Voltage High
10 kW Pulldown to GND
VBATT_MON Tied to ASO_RAIL
HV_DET Voltage Low
10 kW Pullup to 5 V
VBATT_MON Tied to ASO_RAIL
HV_DET Threshold
VBATT_MON Rising
18
HV_DET Hysteresis
VBATT_MON Falling
0.2
BO_DET Voltage High
10 kW Pulldown to GND
VBATT_MON Tied to ASO_RAIL
BO_DET Voltage Low
10 kW Pullup to 5 V
VBATT_MON Tied to ASO_RAIL
BO_DET Threshold
VBATT_MON Falling
7
BO_DET Hysteresis
VBATT_MON Rising
0.2
4.
5.
6.
2.0
iq is equal to IVIN−B + IVIN−H − ISYS
ISHDN is equal to IVIN−B + IVIN−H
ISYS is equal to IOUT1 + IOUT2 + IOUT3
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V
VOUT1 −
0.5
V
0.35
0.4
V
20
V
0.5
V
VOUT1 −
0.5
V
0.4
V
7.5
8
V
0.35
0.5
V
NCV8612B
ELECTRICAL CHARACTERISTICS (7 V < ASO_RAIL < 18 V, VIN−H = VIN−B w ASO_RAIL, VPP = 5 V, VIN_S3 tied to ASO_RAIL,
VBATT_MON = 0 V, EN = 5 V, IGNIN = 0 V, ISYS = 3 mA (Note 6)) Min/Max values are valid for the temperature range −40°C vTJ v 150
°C unless noted otherwise. Min/Max values are guaranteed by test, design or statistical correlation.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
4.9
5
5.1
V
500
mV
LOW DROP−OUT LINEAR REGULATOR 1 (LDO1) SPECIFICATION
Output Voltage
Dropout (ASO_RAIL − VOUT1)
IOUT1 = 0 mA to 120 mA,
7 V < ASO_RAIL < 18 V
VDR1
IOUT1 = 120 mA (Note 7)
Load Regulation
IOUT1 = 0 mA to 120 mA, VIN_B = 13.2 V
0
75
mV/mA
Line Regulation
IOUT1 = 1 mA, 7 V < ASO_RAIL < 18 V
0
2
mV/V
Output Current Limit
Output Load Capacitance Range
Output Load Capacitance ESR Range
(Notes 8 and 9)
180
Co
ESRCo
mA
Output Capacitance for Stability
1.0
100
mF
Cap ESR for Stability
0.01
13
W
DVOUT1 (ASO Low to High Transient)
TJ = 25 °C , IOUT1 = 100 mA, ISYS = 400
mA, CASO_RAIL = 1 mF, ESRCo = 0.01 W,
Co = 10 mF, VIN−A falling
70
100
$mV
DVOUT1 (ASO high to Low Transient)
TJ = 25 °C , IOUT1 = 100 mA, ISYS = 400
mA, CASO_RAIL = 1 mF, ESRCo = 0.01 W,
Co = 10 mF, VIN−A rising
70
100
$mV
VIN_B = 13.2 V, 0.5 VPP, 100 Hz
60
Power Supply Ripple Rejection (Note 8)
PSRR
Startup Overshoot
IOUT1 = 0 mA to 100 mA
dB
3
%
3.366
V
1.0
V
LOW DROP−OUT LINEAR REGULATOR 2 (LDO2) SPECIFICATION
Output Voltage
Dropout (ASO_RAIL − VOUT2)
IOUT2 = 0 mA to 80 mA,
7 V < ASO_RAIL < 18 V
VDR2
3.234
3.3
IOUT2 = 80 mA (Note 7)
Load Regulation
IOUT2 = 0 mA to 80 mA, VIN_B = 13.2 V
0
66
mV/mA
Line Regulation
IOUT2 = 1 mA,
7 V < ASO_RAIL < 18 V
0
1.2
mV/V
Output Current Limit
Output Load Capacitance Range
Output Load Capacitance ESR Range
(Notes 8 and 9)
120
mA
Co
Output Capacitance for Stability
1.0
100
mF
ESRCo
Maximum Cap ESR for stability
0.01
10
W
DVOUT2 (ASO Low to High Transient)
TJ = 25 °C , IOUT2 = 80 mA, ISYS = 400 mA,
CASO_RAIL = 1 mF, ESRCo = 0.01 W, Co =
22 mF, VIN−A falling
30
66
$mV
DVOUT2 (ASO high to Low Transient)
TJ = 25 °C , IOUT2 = 80 mA, ISYS = 400 mA,
CASO_RAIL = 1 mF, ESRCo = 0.01 W, Co =
22 mF, VIN−A rising
30
66
$mV
VIN_B = 13.2 V, 0.5 VPP, 100 Hz
60
Power Supply Ripple Rejection (Note 8)
PSRR
Startup Overshoot
IOUT2 = 0 mA to 80 mA
dB
3
%
+2%
V
2.5
V
LOW DROP−OUT LINEAR REGULATOR 3 (LDO3) SPECIFICATION
Output Voltage
VOUT3
IOUT3 = 0 mA to 400 mA,
VOUT3 + VDR3 v VIN_S3 v 18 V
Dropout (VIN_S3 − VOUT3)
VDR3
IOUT3 = 400 mA , VOUT3 = 5 V
(Notes 7 and 10)
Output Current Limit
−2%
−
500
mA
Load Regulation
IOUT3 = 0 mA to 400 mA,
VIN_B = 13.2 V
0
75
mV/mA
Line Regulation
IOUT3 = 1 mA,
VREF v VIN_S3 v 18 V
0
654
mV /V
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NCV8612B
ELECTRICAL CHARACTERISTICS (7 V < ASO_RAIL < 18 V, VIN−H = VIN−B w ASO_RAIL, VPP = 5 V, VIN_S3 tied to ASO_RAIL,
VBATT_MON = 0 V, EN = 5 V, IGNIN = 0 V, ISYS = 3 mA (Note 6)) Min/Max values are valid for the temperature range −40°C vTJ v 150
°C unless noted otherwise. Min/Max values are guaranteed by test, design or statistical correlation.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
LOW DROP−OUT LINEAR REGULATOR 3 (LDO3) SPECIFICATION
Output Load Capacitance Range
Output Load Capacitance ESR Range
(Notes 8 and 9)
Co
ESRCo
Output Capacitance for Stability
1.0
100
mF
Maximum Capacitance ESR for stability
0.01
12
W
DVOUT3 (ASO Low to High Transient)
TJ = 25 °C , IOUT3 = 400 mA, ISYS = 400
mA, CASO_RAIL = 1 mF, ESRCo = 0.01 W, Co
= 47 mF, VIN−A falling
15
36
$mV
DVOUT3 (ASO high to Low Transient)
TJ = 25 °C , IOUT3 = 400 mA, ISYS = 400
mA, CASO_RAIL = 1 mF, ESRCo = 0.01 W, Co
= 47 mF, VIN−A rising
15
36
$mV
VIN_B = 13.2 V, 0.5 VPP, 100 Hz
60
Power Supply Ripple Rejection (Note 8)
Startup Overshoot
PSRR
IOUT3 = 0 mA to 400 mA
dB
3
%
7. Dropout voltage is measured when the output voltage has dropped 100 mV relative to the nominal value obtained with ASO_RAIL = VIN_S3
= 13.2 V.
8. Not tested in production. Limits are guaranteed by design.
9. Refer to CIRCUIT DESCRIPTION Section for Stability Consideration
10. For other voltage versions refer to Typical Performance Characteristics Section.
ORDERING INFORMATION
Device
NCV8612BMNR2G
Conditions
Enable with LDO1 Reset monitor,
Adjustable LDO3
Package
Shipping
20 Lead DFN, 5x6
(Pb−Free)
2500 / Tape & Reel
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NCV8612B
NCV8612B
Figure 2. Automotive Radio System Block Diagram Example NCV8612B with NCV8855
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NCV8612B
CIRCUIT DESCRIPTION
Auto Switchover Circuitry
The auto switchover circuit is designed to insure
continuous operation of the device, automatically switching
the input voltage from the ASO_RAIL input, to the VIN−B
input, to the VIN−H input depending on conditions. The
primary input voltage pin is ASO_RAIL, which is driven
from the 8 V supply. When this voltage is present it will drive
the output voltages. Regardless of whether the 8 V supply is
available, the reference and core functions of the device will
be driven by the higher of VIN−B and VIN−H. The
switchover control circuitry will be powered solely by the
8 V supply, via VIN−A.
When the 8 V supply is not present, the gates of the 2
P−FET switches will be pulled to ground, turning the
switches on. In this condition, the VIN−B and VIN−H
voltages will be diode or’ed, with the higher voltage
powering the chip. The VIN−H voltage will be one diode
lower than the VIN−B voltage, thereby forcing the VIN−B
voltage to be dominant supply.
In the event that both the 8 V supply and the VIN−B supply
are not present, the VIN−H supply will be powering the
device. The VIN−H supply is then fed from a recommended
1000 mF cap. The duration of VIN−H supply is dependent on
output current. It is intended as protection against temporary
loss of battery conditions.
In the event of a double battery, or prolonged high voltage
condition on the battery line, a bleed transistor has been
included on the VIN−H line. With the large hold−up cap on
VIN−H, the voltage on that pin has the potential to remain
in an elevated position for an extended period of time. The
main result of this condition would be an
Overvoltage Shutdown of the device. In order to avoid this
condition, a transistor that is connected to the
Overvoltage Shutdown signal is tied to the VIN−H line. This
transistor will become active in a high voltage event,
allowing the hold−up cap to discharge the excess voltage in
a timely manner.
In the Block Diagram, Figure 1, CASO_RAIL is listed as a
1 mF capacitor. It is required for proper operation of the
device that CASO_RAIL is no larger than 1 mF.
During a switchover event, a timer in the output stages
prepares the regulator in anticipation of change in input
voltage. The event results in a hitch in the output waveforms,
as can be seen in Figure 3.
IOUT = 120 mA
COUT = 47 mF
Figure 3. VOUTX Response to ASO Switchover Event
VIN−B/VIN−H Minimum Operating Voltage
The internal reference and core functions are powered by
either the VIN−B or VIN−H supply. The higher of the two
voltages will dominate and power the reference. This
provides quick circuit response on start−up, as well as a
stable reference voltage. Since the VIN−B voltage will come
up much more quickly than the VIN−H voltage, initially, the
VIN−B voltage will be running the reference. In the case of
any transient drops on VIN−B, the VIN−H supply, with its
large hold−up capacitor, will then be the dominant voltage,
and will be powering the reference.
For proper operation of the device, VIN−B or VIN−H
must be at least 4.5 V. Below that voltage the reference will
not operate properly, leading to incorrect functioning by the
device. VIN−B or VIN−H must be greater than 4.5 V
regardless of the voltage on the VIN−A pin.
Enable Function
The NCV8612B is equipped with an Enable input. By
keeping the Enable voltage below 0.8 V, the three outputs
will be held low. By increasing the Enable pin voltage above
2.0 V, the three outputs will be enabled to their regulated
output voltage.
Internal Soft−Start
The NCV8612B is equipped with an internal soft−start
function. This function is included to limit inrush currents
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NCV8612B
temperatures (−25°C to −40°C), both the value and ESR of
the capacitor will vary considerably. The capacitor
manufacturer’s data sheet usually provides this information.
The value for each output capacitor COUTX shown in
Figures 22 − 27 should work for most applications;
however, it is not necessarily the optimized solution.
Stability is guaranteed at the following values:
and overshoot of output voltages. The soft−start function
applies to all 3 regulators.
The soft−start function kicks in for start up, start up via
enable, start up after thermal shutdown, and startup after an
over voltage condition.
LDO3 is not subject to soft−start under all conditions. The
LDO3 output is not affected by overvoltage shutdown, and
therefore is not effected by the soft−start function upon the
device’s return from an over voltage condition. Also, when
VIN_S3 is connected to an independent supply and the
supply is made available after the soft−start function, LDO3
will not have an independent soft−start.
COUT1 w 47 mF, ESR v 10 W
COUT2 w 47 mF, ESR v 10 W
COUT3 w 47 mF, ESR v 10 W
Actual limits are shown in graphs in the Typical
Performance Characteristics section.
LDO1 Regulator
Thermal
The LDO1 error amplifier compares the reference voltage
to a sample of the output voltage (VOUT1) and drives the gate
of an internal PFET. The reference is a bandgap design to
give it a temperature−stable output.
As power in the NCV8612B increases, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
on the PCB, the board material, and the ambient temperature
affect the rate of junction temperature rise for the part. When
the NCV8612B has good thermal conductivity through the
PCB, the junction temperature will be relatively low with
high power applications.
The maximum dissipation the NCV8612B can handle is
given by:
PD(max) = (TJ(max)−TA)/RthJA
See Figure 20 for RthJA versus PCB Area.
RthJA could be further decreased by using Multilayer PCB
and/or if Air Flow is taken into account.
LDO2 Regulator
The LDO2 error amplifier compares the reference voltage
to a sample of the output voltage (VOUT2) and drives the gate
of an internal PFET. The reference is a bandgap design to
give it a temperature−stable output.
LDO3 Regulator
The LDO3 error amplifier compares the reference voltage
to a sample of the output voltage (VOUT3) and drives the gate
of an internal PFET. The reference is a bandgap design to
give it a temperature−stable output
LDO3 is an adjustable voltage output. The adjustable
voltage option requires an external resistor divider feedback
network. LDO3 can be adjusted up to 10 V. The internal
reference voltage is 0.996 V. To determine the proper
feedback resistors, the following formula can be used:
VOUT3 = VOUT3FB [(R1+R2)/R2]
IGNOUT Circuitry
The IGNOUT pin is an open drain output Schmitt Trigger,
externally pulled up to 5 V via a 10 kW resistor. The
IGNOUT pin can be used to monitor the ignition signal of
the vehicle, and send a signal to mute an audio amplifier
during engine crank. The IGNIN pin is ESD protected, and
can handle peak transients up to 45 V. An external diode is
recommended to protect against negative voltage spikes.
The IGNOUT circuitry requires the device to be enabled
for proper operation.
VOUT3
R1
VOUTA FB
R2
VPP Function
The reset and warning circuits utilize a push−pull output
stage. The high signal is provided by VPP. VPP is tied
internally to LDO1. Under this setup, and any setup where
LDO’s 1−3 are tied to VPP, loss of the VPP signal can occur
if the pull up voltage is reduced due to over current, thermal
shutdown, or overvoltage conditions.
Figure 4. Feedback Network
Stability Considerations
The output or compensation capacitors, COUTX help
determine three main characteristics of a linear regulator:
startup delay, load transient response and loop stability. The
capacitor values and type should be based on cost,
availability, size and temperature constraints. Tantalum,
aluminum electrolytic, film, or ceramic capacitors are all
acceptable solutions, however, attention must be paid to
ESR constraints. The aluminum electrolytic capacitor is the
least expensive solution, but, if the circuit operates at low
Reset Outputs
The Reset Output is used as the power on indicator to the
Microcontroller. The NCV8612B Reset circuitry monitors
the output on LDO1.
This signal indicates when the output voltage is suitable
for reliable operation. It pulls low when the output is not
considered to be suitable. The Reset circuitry utilizes a push
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NCV8612B
until the VBATT_MON voltage rises above the HV_DET
threshold, typically 18 V to 20 V. The HV_DET signal will
reassert high once the HV_DET signal crosses the HV_DET
threshold going low.
The NCV8612B is also equipped with a Hot Flag pin
which indicates when the junction temperature is
approaching thermal shutdown. The Hot Flag signal will
remain high as long as the junction temperature is below the
Hot flag threshold, typically 140°C to 160°C. This pin is
intended as a warning that the junction temperature is
approaching the Thermal Shutdown threshold, which is
typically 160°C to 180°C. The Hot Flag signal will remain
low until the junction temperature drops below the Hot Flag
threshold.
The Hot_Flag circuitry does not run off the
VBATT_MON Pin, and can not be disabled by grounding
VBATT_MON.
Each of the three warning circuits utilizes a push−pull
output stage. The high signal is provided by VPP. VPP is
internally tied to VOUT1
pull output stage, with VPP as the high signal. In the event
of the part shutting down via Battery voltage or Enable, the
Reset output will be pulled to ground.
The input and output conditions that control the Reset
Output and the relative timing are illustrated in Figure 5,
Reset Timing. Output voltage regulation must be maintained
for the delay time before the reset output signals a valid
condition. The delay for the reset output is defined as the
amount of time it takes the timing capacitor on the delay pin
to charge from a residual voltage of 0 V to the Delay timing
threshold voltage VD of 2 V. The charging current for this is
ID of 5 mA. By using typical IC parameters with a 10 nF
capacitor on the Delay Pin, the following time delay is
derived:
tRD = CD * VDU / ID
tRD = 10 nF * (2 V)/ (5 mA) = 4 ms
Other time delays can be obtained by changing the CD
capacitor value. The Delay Time can be reduced by
decreasing the capacitance of CD. Using the formula above,
delay can be reduced as desired. Leaving the Delay Pin open
is not desirable as it can result in unwanted signals being
coupled onto the pin.
Overvoltage Shutdown
The NCV8612B is equipped with overvoltage shutdown
(OVS) functionality. The OVS is designed to turn on when
the VBATT_MON signal crosses 19 V. If the
VBATT_MON pin is tied to ground, the OVS functionality
will be disabled.
When OVS is triggered, LDO1 and LDO2 will both be
shut down. LDO3 is run off a separate input voltage line,
VIN_S3, and will not shutdown in this condition. Once the
OVS condition has passed, LDO1 and LDO2 will both turn
back on.
The VIN−H line is equipped with a bleed transistor to
prevent a continued OVS condition on the chip once the high
battery condition has subsided. This transistor is needed to
discharge the high voltage from the VIN−H hold−up
capacitor. This transistor will only turn on when an OVS is
detected on−chip, and will turn off as soon as the OVS
condition is no longer detected by the chip.
VBATT_MON and Warning Flags
The NCV8612B is equipped with High Voltage
Detection, Brown Out Detection, and High Temperature
Detection circuitry. The Overvoltage Shutdown, High
Voltage, and Brown Out Detection circuitry are all run off
the VBATT_MON input. If this functionality is not desired,
grounding of the VBATT_MON pin will turn off the
functions.
The HV_DET and BO_DET signals are in a high
impedance state until the VBATT_MON circuitry reaches it
minimum operating voltage, typically 1.0 V to 2.5 V. At that
point the BO_DET signal will be held low, while the
HV_DET signal will go high. The BO_DET signal will go
high once the VBATT_MON signal reaches the Brown Out
Threshold, typically 7 V to 8 V. The BO_DET signal will
stay high until the VBATT_MON voltage drops below the
Brown Out Threshold. The HV_DET signal will stay high
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NCV8612B
Load Dump
19V
VIN
Enable
VOUT Reset
Threshold
LDOX
Delay
Reset
Power On Reset
Overload on
Output
Over Voltage On Input
Momentary Glitch
on Output
Overvoltage on
Input
Enable Low
Shutdown via Input
Figure 5. NCV8612B Reset Timing Diagram
Load Dump
VIN_B
7.0V
4.4V
45V
< 3.25V
IGNIN
< 1V
−100V
5.0V
IGNOUT
Figure 6. IGNOUT Timing Diagram
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NCV8612B
8V
VIN_A
Overvoltage on VIN−B
19V
13.2V
VIN_B
Voltage Clamped at 16 V
16V
13.2V
VIN_H
DVIN−H
xxV
TVIN−H
19V
13.2V
Duration of TVIN−H and
drop of DVIN−H dependant
on output load conditions
7V
ASO_RAIL
Enable
LDOX
Delay
Reset
Loss of VIN−B
8V Switching Output
Voltage from SMPS ASIC
Turns On. 8V Switching Output
Voltage from SMPS ASIC
Turns Off.
VIN−B Turns
Back On
Overvoltage
Shutdown
Undervoltage
Lockout
8V Switching
Output Voltage
from SMPS
ASIC Turns On.
Shutdown via
Enable
Figure 7. Auto Switchover Circuit Timing Diagram VBATTMON Connected to ASO_RAIL
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NCV8612B
19V
18.5V
VBATT_MON
8V
7.85V
7.5V
2.5V
1.5V
2.0V
1.0V
VPP
HV_DET
VPP
BO_DET
Overvoltage on Input
Voltage Dip on Input
Figure 8. Warning Circuitry Timing Diagram
170°C
160°C
150°C
140°C
TJ
LDOX
VPP
HOT_FLG
Hot Flag
Recovers
Hot Flag
Triggers
Thermal
Shutdown
Thermal
Recovery
Figure 9. Thermal Shutdown Timing Diagram
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NCV8612B
19V
13.2V
7V
ASO_RAIL
VBATT_MON
Enable
5.0V
LDO1
LDO1 Reset
Threshold
3.3V
LDO2
LDO3
Delay
Reset
Overvoltage
Shutdown
Figure 10. NCV8612B Regulator Output Timing Diagram– VIN_S3 Tied to ASO_RAIL
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NCV8612B
Load Dump
19V
13.2V
ASO_RAIL
LDO1
LDO2
LDO3
Figure 11. NCV8612B Regulator Output Timing Diagram− VBATT_MON Grounded
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NCV8612B
3.40
IOUT1 = 100 mA
5.08
VOUT2, OUTPUT VOLTAGE (V)
VOUT1, OUTPUT VOLTAGE (V)
5.10
5.06
5.04
5.02
5.0
4.98
4.96
4.94
4.92
4.9
−40
−20
0
20
40
60
80
100
120
3.30
3.28
3.26
3.24
3.22
−20
0
20
40
60
80
100
120
TEMPERATURE (°C)
Figure 12. Output Voltage LDO1 vs
Temperature
Figure 13. Output Voltage LDO2 vs
Temperature
IOUT3 = 100 mA
VDR1, DROPOUT VOLTAGE (mV)
VOUT3, OUTPUT VOLTAGE (V)
3.32
140
300
5.06
5.04
5.02
5.00
4.98
4.96
4.94
4.92
4.90
−40
−20
0
20
40
60
80
100
120
TJ = 25°C
VOUT1 = 5.0 V
250
200
150
100
50
0
140
0
20
40
60
80
100
120
TEMPERATURE (°C)
IOUT1, OUTPUT CURRENT (mA)
Figure 14. Output Voltage LDO3 vs
Temperature
Figure 15. Dropout LDO1 vs Output Current
1000
350
TJ = 25°C
VOUT2 = 3.3 V
VDR3, DROPOUT VOLTAGE (mV)
VDR2, DROPOUT VOLTAGE (mV)
3.34
TEMPERATURE (°C)
5.08
250
200
150
100
50
0
0
3.36
3.20
−40
140
5.10
300
IOUT2 = 100 mA
3.38
10
20
30
40
50
60
70
900
700
600
500
400
300
200
100
0
80
TJ = 25°C
VOUT3 = 5.0 V
800
0
50
100
150
200
250
300
350 400
IOUT2, OUTPUT CURRENT (mA)
IOUT3, OUTPUT CURRENT (mA)
Figure 16. Dropout LDO2 vs Output Current
Figure 17. Dropout LDO3 vs Output Current
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NCV8612B
3.5
VDR3, DROPOUT VOLTAGE (V)
HV_DET THRESHOLD (V)
22.5
22
21.5
21
20.5
20
19.5
19
1
10
100
1000
10000
100000 1000000
T = 25°C
IOUT3 = 400 mA
3
2.5
2
1.5
1
0.5
0
1
2
3
4
6
5
8
7
9
10
VOUT3, OUTPUT VOLTAGE (V)
ASO−RAIL VOLTAGE RAMP (V/s)
Figure 18. HV−DET Threshold vs. dV/dt
Figure 19. LDO3 Dropout Voltage vs. Output
Voltage
RqJA, THERMAL RESISTANCE
JUNCTION−TO−AMBIENT (°C/W)
170
150
130
110
1−oz Cu single layer PCB
90
70
2−oz Cu single layer PCB
50
30
0
100
200
300
400
500
PCB COPPER AREA
600
700
(mm2)
Figure 20. RqJA vs. Copper Area
1000
RqJA, (°C/W)
100
10
1
D = 0.5
0.2
0.1
0.05
0.01
2−oz Cu single layer PCB, 100 mm2
0.1
Single Pulse
0.01
0.001
1E−06
TSP
1E−05
0.0001
0.001
0.01
0.1
PULSE TIME (sec)
Figure 21. RqJA vs. Duty Cycle
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1
10
100
1000
NCV8612B
100
100
Stable Region
10
1
0.1
Unstable Region
10
1
ESR (W)
ESR (W)
VIN = 18 V
VOUT1 = 5 V
COUT1 = 1 mF
Unstable Region
0.01
0.1
0.01
Unexplored Region*
Unexplored Region*
0.001
VIN = 18 V
VOUT1 = 5 V
COUT1 = 47 mF
Stable Region
0
20
40
60
80
0.001
120
100
0
20
IOUT1, OUTPUT CURRENT (mA)
40
60
80
100
120
IOUT1, OUTPUT CURRENT (mA)
Figure 22. COUT1 ESR Stability Region − 1 mF
Figure 23. COUT1 ESR Stability Region − 47 mF
*The min specified ESR is based on Murata’s capacitor GRM31CR60J476ME19 used in measurement. The true min ESR limit might be
lower than shown.
100
100
Stable Region
10
1
0.1
1
ESR (W)
ESR (W)
10
Unstable Region
VIN = 18 V
VOUT2 = 3.3 V
COUT2 = 1 mF
Unstable Region
Stable Region
0.1
VIN = 18 V
VOUT2 = 3.3 V
COUT2 = 47 mF
0.01
0.01
Unexplored Region*
0.001
0
10
20
30
40
50
60
70
0.001
80
0
10
IOUT2, OUTPUT CURRENT (mA)
20
30
40
50
60
70
80
IOUT2, OUTPUT CURRENT (mA)
Figure 24. COUT2 ESR Stability Region − 1 mF
Figure 25. COUT2 ESR Stability Region − 47 mF
*The min specified ESR is based on Murata’s capacitor GRM31CR60J476ME19 used in measurement. The true min ESR limit might be
lower than shown.
1000
100
Stable Region
10
Unstable Region
VIN = 18 V
VOUT3 = 1.0 V
COUT3 = 1 mF
VIN = 18 V
VOUT3 = 1.0 V
COUT3 = 47 mF
100
0.1
ESR (W)
ESR (W)
10
1
Unstable Region
0.1
0.01
0.001
Stable Region
1
Unstable Region
0.01
0
50
100
150
200
250
300
350
0.001
400
0
50
IOUT3, OUTPUT CURRENT (mA)
100
150
200
250
300
350
400
IOUT3, OUTPUT CURRENT (mA)
Figure 26. COUT3 ESR Stability Region − 1 mF
Figure 27. COUT3 ESR Stability Region − 47 mF
*The min specified ESR is based on Murata’s capacitor GRM31CR60J476ME19 used in measurement. The true min ESR limit might be
lower than shown.
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NCV8612B
dt = 79 ms
IOUT1 = 120 mA
Figure 28. Output Response of LDO1 to Loss of Vin−B
dt = 20.6 ms
IOUT3 = 400 mA
Figure 29. Output Response of LDO3 to Loss of Vin−B
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NCV8612B
dt = 121 ms
IOUT2 = 80 mA
Figure 30. Output Response of LDO2 to Loss of Vin−B
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NCV8612B
Figure 31. HV−DET Response to High Voltage − VBAT−MON tied to ASO−RAIL
Figure 32. HV−DET Response to High Voltage − VBAT−MON Left Open
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NCV8612B
Figure 33. BO−DET Response to LOW Voltage − VBAT−MON tied to ASO−RAIL
Figure 34. BO−DET Response to LOW Voltage − VBAT−MON Left Open
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NCV8612B
Figure 35. Output Response to OVS − VBAT−MON tied to ASO−RAIL
Figure 36. Output Response to OVS − VBAT−MON Left Open
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NCV8612B
PACKAGE DIMENSIONS
DFN20
CASE 505AB−01
ISSUE B
A
D
NOTES:
1. DIMENSIONS AND TOLERANCING PER
ASME Y14.5M, 1994.
2. DIMENSIONS IN MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINALS AND IS MEASURED BETWEEN
0.25 AND 0.30 MM FROM TERMINAL
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
B
PIN 1 LOCATION
E
2X
0.15 C
2X
DIM
A
A1
A2
A3
b
D
D2
E
E2
e
K
L
TOP VIEW
0.15 C
0.10 C
A2
A
0.08 C
A1
SIDE VIEW (A3)
C
SEATING
PLANE
D2
20X
20X
L
MILLIMETERS
MIN
MAX
0.80
1.00
0.00
0.05
0.65
0.75
0.20 REF
0.20
0.30
6.00 BSC
3.98
4.28
5.00 BSC
2.98
3.28
0.50 BSC
0.20
−−−
0.50
0.60
SOLDERING FOOTPRINT*
e
1
20X
10
0.78
4.24
E2
K
20
20X
b
0.10 C A B
0.05 C
3.24
PACKAGE
OUTLINE
11
5.30
1
NOTE 3
BOTTOM VIEW
0.50
PITCH
20X
0.35
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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NCV8612B/D