DATA SHEET MOS FIELD EFFECT TRANSISTOR NP88N075EUE, NP88N075KUE NP88N075CUE, NP88N075DUE, NP88N075MUE, NP88N075NUE SWITCHING N-CHANNEL POWER MOS FET DESCRIPTION These products are N-channel MOS Field Effect Transistors designed for high current switching applications. <R> ORDERING INFORMATION PART NUMBER NP88N075EUE-E1-AY Note1, 2 NP88N075EUE-E2-AY Note1, 2 NP88N075KUE-E1-AY Note1 NP88N075KUE-E2-AY Note1 NP88N075CUE-S12-AZ Note1, 2 NP88N075DUE-S12-AY Note1, 2 NP88N075MUE-S18-AY Note1 NP88N075NUE-S18-AY Note1 LEAD PLATING PACKING Pure Sn (Tin) Tape 800 p/reel PACKAGE TO-263 (MP-25ZJ) typ. 1.4 g TO-263 (MP-25ZK) typ. 1.5 g Sn-Ag-Cu Pure Sn (Tin) TO-220 (MP-25) typ. 1.9 g Tube 50 p/tube Notes 1. Pb-free (This product does not contain Pb in the external electrode.) 2. Not for new design TO-262 (MP-25 Fin Cut) typ. 1.8 g TO-220 (MP-25K) typ. 1.9 g TO-262 (MP-25SK) typ. 1.8 g (TO-220) FEATURES • Channel temperature 175 degree rated • Super low on-state resistance RDS(on) = 8.5 mΩ MAX. (VGS = 10 V, ID = 44 A) • Low input capacitance (TO-262) Ciss = 8200 pF TYP. (TO-263) The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. Document No. D14676EJ6V0DS00 (6th edition) Date Published October 2007 NS Printed in Japan 1999, 2000, 2007 The mark <R> shows major revised points. The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field. NP88N075EUE, NP88N075KUE, NP88N075CUE, NP88N075DUE, NP88N075MUE, NP88N075NUE ABSOLUTE MAXIMUM RATINGS (TA = 25°C) Drain to Source Voltage (VGS = 0 V) VDSS 75 V Gate to Source Voltage (VDS = 0 V) VGSS ±20 V ID(DC) ±88 A ID(pulse) ±352 A Total Power Dissipation (TC = 25°C) PT1 288 W Total Power Dissipation (TA = 25°C) PT2 1.8 W Channel Temperature Tch 175 °C Drain Current (DC) (TC = 25°C) Drain Current (Pulse) Note1 Note2 Tstg −55 to +175 °C Single Avalanche Current Note3 IAS 69/88 A Single Avalanche Energy Note3 EAS 450/14 mJ Storage Temperature Notes 1. Calculated constant current according to MAX. allowable channel temperature. 2. PW ≤ 10 μs, Duty cycle ≤ 1% 3. Starting Tch = 25°C, VDD = 35 V, RG = 25 Ω, VGS = 20 → 0 V (See Figure 4.) THERMAL RESISTANCE Channel to Case Thermal Resistance Rth(ch-C) 0.52 °C/W Channel to Ambient Thermal Resistance Rth(ch-A) 83.3 °C/W 2 Data Sheet D14676EJ6V0DS NP88N075EUE, NP88N075KUE, NP88N075CUE, NP88N075DUE, NP88N075MUE, NP88N075NUE ELECTRICAL CHARACTERISTICS (TA = 25°C) CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Zero Gate Voltage Drain Current IDSS VDS = 75 V, VGS = 0 V 10 μA Gate Leakage Current IGSS VGS = ±20 V, VDS = 0 V ±100 nA Gate to Source Threshold Voltage VGS(th) VDS = VGS, ID = 250 μA 2.0 3.0 4.0 V Forward Transfer Admittance | yfs | VDS = 10 V, ID = 44 A 30 60 Drain to Source On-state Resistance RDS(on) VGS = 10 V, ID = 44 A Input Capacitance Ciss Coss Output Capacitance S 6.2 8.5 mΩ VDS = 25 V, 8200 12300 pF VGS = 0 V, 800 1200 pF 440 800 pF f = 1 MHz Reverse Transfer Capacitance Crss Turn-on Delay Time td(on) VDD = 38 V, ID = 44 A, 35 77 ns tr VGS = 10 V, 28 70 ns 105 210 ns 16 40 ns VDD = 60 V, 150 230 nC VGS = 10 V, 30 nC 52 nC IF = 88 A, VGS = 0 V 1.0 V Rise Time Turn-off Delay Time td(off) Fall Time tf Total Gate Charge QG Gate to Source Charge QGS RG = 0 Ω ID = 88 A Gate to Drain Charge QGD Body Diode Forward Voltage VF(S-D) Reverse Recovery Time trr IF = 88 A, VGS = 0 V, 80 ns Qrr di/dt = 100 A/μs 240 nC Reverse Recovery Charge TEST CIRCUIT 1 AVALANCHE CAPABILITY D.U.T. RG = 25 Ω PG. VGS = 20 → 0 V TEST CIRCUIT 2 SWITCHING TIME D.U.T. L 50 Ω VGS RL Wave Form RG PG. VDD VGS 0 VGS 10% 90% VDD VDS 90% BVDSS IAS 90% VDS VGS 0 VDS 10% 0 10% Wave Form VDS ID τ VDD Starting Tch τ = 1 μs Duty Cycle ≤ 1% td(on) tr ton td(off) tf toff TEST CIRCUIT 3 GATE CHARGE D.U.T. IG = 2 mA PG. 50 Ω RL VDD Data Sheet D14676EJ6V0DS 3 NP88N075EUE, NP88N075KUE, NP88N075CUE, NP88N075DUE, NP88N075MUE, NP88N075NUE TYPICAL CHARACTERISTICS (TA = 25°C) Figure2. TOTAL POWER DISSIPATION vs. CASE TEMPERATURE 350 PT - Total Power Dissipation - W dT - Percentage of Rated Power - % Figure1. DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA 100 80 60 40 20 0 0 25 50 75 300 250 200 150 100 50 0 0 100 125 150 175 200 25 TC - Case Temperature - °C Figure3. FORWARD BIAS SAFE OPERATING AREA PW ID - Drain Current - A ID(pulse) 100 d ite im V) ) L 10 n o S( = RDVGS ( 10 ID(DC) 0 1m 10 0μ s s ms Po D Lim wer C ite Dis d sip a =1 μs tio n 10 1 TC = 25°C Single Pulse 0.1 0.1 1 10 75 100 125 150 175 200 Figure4. SINGLE AVALANCHE ENERGY DERATING FACTOR Single Pulse Avalanche Energy - mJ 1000 50 TC - Case Temperature - °C 500 450 mJ 400 300 IAS = 69 A 200 100 100 VDS - Drain to Source Voltage - V 14 mJ 0 25 50 88 A 75 100 125 150 175 Starting Tch - Starting Channel Temperature - °C Figure5. TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH rth(t) - Transient Thermal Resistance - °C/W 1000 100 Rth(ch-A) = 83.3°C/W 10 1 Rth(ch-C) = 0.52°C/W 0.1 0.01 10 μ Single Pulse TC = 25°C 100 μ 1m 10 m 100 m 1 PW - Pulse Width - s 4 Data Sheet D14676EJ6V0DS 10 100 1000 NP88N075EUE, NP88N075KUE, NP88N075CUE, NP88N075DUE, NP88N075MUE, NP88N075NUE Figure7. DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE Figure6. FORWARD TRANSFER CHARACTERISTICS 500 Pulsed VDS = 10 V TA = −55°C 25°C 75°C 175°C 100 ID - Drain Current - A ID - Drain Current - A 1000 10 1 3 5 4 6 300 VGS = 10 V 200 100 Pulsed 0 0 0.1 2 400 7 1 10 TA = 175°C 75°C 25°C −55°C 0.1 0.1 VDS = 10 V Pulsed 10 100 1 RDS(on) - Drain to Source On-state Resistance - mΩ ID - Drain Current - A Figure10. DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 15 Pulsed VGS = 10 V 10 5 0 1 10 100 1000 RDS(on) - Drain to Source On-state Resistance - mΩ 100 VGS(th) - Gate to Source Threshold Voltage - V | yfs | - Forward Transfer Admittance - S Figure8. FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT 0.01 0.01 4 VDS - Drain to Source Voltage - V VGS - Gate to Source Voltage - V 1 3 2 Figure9. DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 20 Pulsed 15 10 ID = 44 A 5 0 4 0 8 12 16 20 VGS - Gate to Source Voltage - V Figure11. GATE TO SOURCE THRESHOLD VOLTAGE vs. CHANNEL TEMPERATURE VDS = VGS ID = 250 μA 4 3 2 1 0 ID - Drain Current - A Data Sheet D14676EJ6V0DS −50 0 50 100 150 Tch - Channel Temperature - °C 5 Figure12. DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 18 ID = 44 A 16 14 12 10 VGS = 10 V 8 6 4 Figure13. SOURCE TO DRAIN DIODE FORWARD VOLTAGE 1000 IF - Diode Forward Current - A VGS = 10 V 100 0V 10 1 2 0 −50 0 50 100 0.1 0 150 0.5 Tch - Channel Temperature - °C 100000 1000 td(on), tr, td(off), tf - Switching Time - ns Ciss 1000 Coss Crss 100 0.1 1 10 tf td(off) 100 td(on) tr 10 1 0.1 100 ID - Drain Current - A Figure16. REVERSE RECOVERY TIME vs. DIODE FORWARD CURRENT Figure17. DYNAMIC INPUT/OUTPUT CHARACTERISTICS VDS - Drain to Source Voltage - V trr - Reverse Recovery Time - ns 1000 100 10 di/dt = 100 A/μs VGS = 0 V 1 10 100 100 10 80 8 VDD = 60 V 38 V 15 V VGS 60 6 40 4 20 2 VDS ID = 88 A 0 IF - Diode Forward Current - A 6 VDD = 38 V VGS = 10 V RG = 0 Ω 100 10 1 VDS - Drain to Source Voltage - V 1 0.1 1.5 Figure15. SWITCHING CHARACTERISTICS VGS = 0 V f = 1 MHz 10000 1.0 VF(S-D) - Body Diode Forward Voltage - V Figure14. CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE Ciss, Coss, Crss - Capacitance - pF Pulsed 0 40 80 120 QG - Gate Charge - nC Data Sheet D14676EJ6V0DS 0 160 VGS - Gate to Source Voltage - V RDS(on) - Drain to Source On-state Resistance - mΩ NP88N075EUE, NP88N075KUE, NP88N075CUE, NP88N075DUE, NP88N075MUE, NP88N075NUE NP88N075EUE, NP88N075KUE, NP88N075CUE, NP88N075DUE, NP88N075MUE, NP88N075NUE PACKAGE DRAWINGS (Unit: mm) Note 1.3 ± 0.2 10.0 ± 0.3 No plating 7.88 MIN. 4 2 3 1.4 ± 0.2 0.7 ± 0.2 2.54 TYP. 9.15 ± 0.3 8.0 TYP. 8.5 ± 0.2 1 5.7 ± 0.4 1.0 ± 0.5 4 4.45 ± 0.2 0.025 to 0.25 P. .5R 0 TY R 0.8 2.54 TYP. P. TY 0.5 ± 0.2 0.75 ± 0.2 0.5 ± 2.8 ± 0.2 1.Gate 2.Drain 3.Source 4.Fin (Drain) 1 2 1.Gate 2.Drain 2.5 3.Source 15.5 MAX. 5.9 MIN. 4 1 0.75 ± 0.1 2.54 TYP. 1.3 ± 0.2 12.7 MIN. 6.0 MAX. 1 2 3 0.5 ± 0.2 2.8 ± 0.2 0.75 ± 0.3 2.54 TYP. 2 3 1.0 ± 0.5 10 TYP. Note 4.8 MAX. 1.3 ± 0.2 8.5 ± 0.2 1.3 ± 0.2 4.Fin (Drain) 12.7 MIN. 4.8 MAX. φ 3.6 ± 0.2 10.0 TYP. 1.3 ± 0.2 3 4)TO-262 (MP-25 Fin Cut) 4 8ο 0.25 Note 10.6 MAX. 0.2 0 to 2.54 3)TO-220 (MP-25) 1.3 ± 0.2 2.54 ± 0.25 4.8 MAX. 10 TYP. 1.35 ± 0.3 2)TO-263 (MP-25ZK) 15.25 ± 0.5 1)TO-263 (MP-25ZJ) 3.0 ± 0.3 <R> 0.5 ± 0.2 2.8 ± 0.2 2.54 TYP. 1.Gate 2.Drain 3.Source 4.Fin (Drain) 2.54 TYP. 1.Gate 2.Drain 3.Source 4.Fin (Drain) Note Not for new design Data Sheet D14676EJ6V0DS 7 NP88N075EUE, NP88N075KUE, NP88N075CUE, NP88N075DUE, NP88N075MUE, NP88N075NUE 0.8 ± 0.1 0.5 ± 0.2 2.5 ± 0.2 2.54 TYP. 4.45 ± 0.2 10.1 ± 0.3 1.3 ± 0.2 1.27 ± 0.2 3.1 ± 0.3 1 2 3 13.7 ± 0.3 1.27 ± 0.2 2.54 TYP. 10.0 ± 0.2 4 3.1 ± 0.2 3 13.7 ± 0.3 1 2 4.45 ± 0.2 1.3 ± 0.2 15.9 MAX. 4 φ 3.8 ± 0.2 6.3 ± 0.3 2.8 ± 0.3 10.0 ± 0.2 1.2 ± 0.3 6)TO-262 (MP-25SK) 8.9 ± 0.2 5)TO-220 (MP-25K) 0.8 ± 0.1 0.5 ± 0.2 2.54 TYP. 1.Gate 2.Drain 3.Source 4.Fin (Drain) 2.54 TYP. 2.5 ± 0.2 1.Gate 2.Drain 3.Source 4.Fin (Drain) EQUIVALENT CIRCUIT Drain Gate Body Diode Source Remark Strong electric field, when exposed to this device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. 8 Data Sheet D14676EJ6V0DS NP88N075EUE, NP88N075KUE, NP88N075CUE, NP88N075DUE, NP88N075MUE, NP88N075NUE <R> TAPE INFORMATION There are two types (-E1, -E2) of taping depending on the direction of the device. Draw-out side <R> Reel side MARKING INFORMATION NEC 88N075 UE <R> Pb-free plating marking Abbreviation of part number Lot code RECOMMENDED SOLDERING CONDITIONS These products should be soldered and mounted under the following recommended conditions. For soldering methods and conditions other than those recommended below, please contact an NEC Electronics sales representative. For technical information, see the following website. Semiconductor Device Mount Manual (http://www.necel.com/pkg/en/mount/index.html) Soldering Method Soldering Conditions Infrared reflow Maximum temperature (Package's surface temperature): 260°C or below MP-25ZJ, MP-25ZK Time at maximum temperature: 10 seconds or less Time of temperature higher than 220°C: 60 seconds or less Preheating time at 160 to 180°C: 60 to 120 seconds Recommended Condition Symbol IR60-00-3 Maximum number of reflow processes: 3 times Maximum chlorine content of rosin flux (percentage mass): 0.2% or less Wave soldering Maximum temperature (Solder temperature): 260°C or below MP-25, MP-25K, MP-25SK, Time: 10 seconds or less MP-25 Fin Cut Maximum chlorine content of rosin flux: 0.2% (wt.) or less Partial heating Maximum temperature (Pin temperature): 350°C or below MP-25ZJ, MP-25ZK, Time (per side of the device): 3 seconds or less MP-25K, MP-25SK Maximum chlorine content of rosin flux: 0.2% (wt.) or less Partial heating Maximum temperature (Pin temperature): 300°C or below MP-25, MP-25 Fin Cut Time (per side of the device): 3 seconds or less THDWS P350 P300 Maximum chlorine content of rosin flux: 0.2% (wt.) or less Caution Do not use different soldering methods together (except for partial heating). Data Sheet D14676EJ6V0DS 9 NP88N075EUE, NP88N075KUE, NP88N075CUE, NP88N075DUE, NP88N075MUE, NP88N075NUE • The information in this document is current as of October, 2007. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. • No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Electronics. 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