CEP840G/CEB840G CEF840G N-Channel Enhancement Mode Field Effect Transistor PRELIMINARY FEATURES Type VDSS RDS(ON) ID @VGS CEP840G 500V 0.85Ω 8A 10V CEB840G 500V 0.85Ω 8A 10V CEF840G 500V 0.85Ω 8A e 10V D Super high dense cell design for extremely low RDS(ON). High power and current handing capability. Lead free product is acquired. G D G D S G S CEB SERIES TO-263(DD-PAK) G CEP SERIES TO-220 ABSOLUTE MAXIMUM RATINGS Parameter D S Tc = 25 C unless otherwise noted Limit Symbol TO-220/263 Drain-Source Voltage VDS Gate-Source Voltage VGS Drain Current-Continuous Drain Current-Pulsed S CEF SERIES TO-220F ID IDM a Maximum Power Dissipation @ TC = 25 C f PD - Derate above 25 C TO-220F 500 Units V ±30 V 8 8 e A A 32 32 125 40 W 1.0 0.32 W/ C e TJ,Tstg -55 to 150 C Symbol Limit Units Operating and Store Temperature Range Thermal Characteristics Parameter Thermal Resistance, Junction-to-Case RθJC 1.0 3.1 C/W Thermal Resistance, Junction-to-Ambient RθJA 62.5 65 C/W This is preliminary information on a new product in development now . Details are subject to change without notice . 1 Rev 1. 2007.Nov. http://www.cetsemi.com CEP840G/CEB840G CEF840G Electrical Characteristics Parameter Tc = 25 C unless otherwise noted Symbol Test Condition Min Drain-Source Breakdown Voltage BVDSS VGS = 0V, ID = 250µA 500 Zero Gate Voltage Drain Current IDSS Gate Body Leakage Current, Forward Gate Body Leakage Current, Reverse Typ Max Units VDS = 500V, VGS = 0V 25 µA IGSSF VGS = 30V, VDS = 0V 100 nA IGSSR VGS = -30V, VDS = 0V -100 nA 4 V 0.85 Ω Off Characteristics V On Characteristics b Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance Dynamic Characteristics VGS(th) VGS = VDS, ID = 250µA 2 RDS(on) VGS = 10V, ID = 4.8A 0.65 gFS VDS = 50V, ID = 4.8A 7 S 1240 pF 145 pF 20 pF c Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss VDS = 25V, VGS = 0V, f = 1.0 MHz Switching Characteristics c Turn-On Delay Time td(on) Turn-On Rise Time tr Turn-Off Delay Time td(off) VDD = 250V, ID = 8A, VGS = 10V, RGEN = 9.1Ω 20 40 ns 9 18 ns 48 92 ns Turn-Off Fall Time tf 8 16 ns Total Gate Charge Qg 33 43.8 nC Gate-Source Charge Qgs Gate-Drain Charge Qgd VDS = 400V, ID = 8A, VGS = 10V 6.2 nC 13.9 nC Drain-Source Diode Characteristics and Maximun Ratings Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage IS f b VSD VGS = 0V, IS = 8A Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature . b.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2% . c.Guaranteed by design, not subject to production testing. d.Limited only by maximum temperature allowed . e.Pulse width limited by safe operating area . f.Full package IS(max) = 4.6A . 2 8 A 1.5 V CEP840G/CEB840G CEF840G 18 VGS=10,9,8,7V 10 8 ID, Drain Current (A) ID, Drain Current (A) 12 VGS=6V 6 4 VGS=5V 2 0 0 2 4 6 8 10 TJ=125C 1 2 -55 C 3 4 5 6 Figure 1. Output Characteristics Figure 2. Transfer Characteristics RDS(ON), Normalized RDS(ON), On-Resistance(Ohms) 900 600 Coss 300 Crss 0 5 10 15 20 25 2.2 1.9 ID=4.8A VGS=10V 1.6 1.3 1.0 0.7 0.4 -100 -50 0 50 100 150 200 VDS, Drain-to-Source Voltage (V) TJ, Junction Temperature( C) Figure 3. Capacitance Figure 4. On-Resistance Variation with Temperature VDS=VGS ID=250µA IS, Source-drain current (A) C, Capacitance (pF) VTH, Normalized Gate-Source Threshold Voltage 25 C 3 VGS, Gate-to-Source Voltage (V) Ciss 1.1 1.0 0.9 0.8 0.7 0.6 -50 6 12 1200 1.2 9 VDS, Drain-to-Source Voltage (V) 1500 1.3 12 0 1800 0 15 -25 0 25 50 75 100 125 10 0 10 -1 10 -2 VGS=0V 0.4 150 0.6 0.8 1.0 1.2 TJ, Junction Temperature( C) VSD, Body Diode Forward Voltage (V) Figure 5. Gate Threshold Variation with Temperature Figure 6. Body Diode Forward Voltage Variation with Source Current 3 10 VDS=400V ID=8A RDS(ON)Limit 8 ID, Drain Current (A) VGS, Gate to Source Voltage (V) CEP840G/CEB840G CEF840G 6 4 2 0 0 10 20 30 40 100ms 10 1ms 10ms DC 10 10 50 1 0 TC=25 C TJ=150 C Single Pulse -1 10 0 10 1 10 2 10 Qg, Total Gate Charge (nC) VDS, Drain-Source Voltage (V) Figure 7. Gate Charge Figure 8. Maximum Safe Operating Area VDD t on RL V IN D VGS RGEN toff tr td(on) td(off) tf 90% 90% VOUT VOUT 10% INVERTED 10% G 90% S VIN 50% 50% 10% PULSE WIDTH Figure 10. Switching Waveforms Figure 9. Switching Test Circuit r(t),Normalized Effective Transient Thermal Impedance 10 0 D=0.5 10 0.2 0.1 -1 0.05 0.02 0.01 10 10 PDM t1 Single Pulse -2 1. RθJC (t)=r (t) * RθJC 2. RθJC=See Datasheet 3. TJM-TC = P* RθJC (t) 4. Duty Cycle, D=t1/t2 -3 10 t2 -5 10 -4 10 -3 10 -2 10 -1 Square Wave Pulse Duration (sec) Figure 11. Normalized Thermal Transient Impedance Curve 4 10 0 10 1 3