ON NCV8402AD Dual self-protected low-side driver with temperature and current limit Datasheet

NCV8402D, NCV8402AD
Dual Self-Protected
Low-Side Driver with
Temperature and Current
Limit
NCV8402D/AD is a dual protected Low−Side Smart Discrete device.
The protection features include overcurrent, overtemperature, ESD and
integrated Drain−to−Gate clamping for overvoltage protection. This
device offers protection and is suitable for harsh automotive
environments.
•
V(BR)DSS
(Clamped)
RDS(ON) TYP
ID MAX
42 V
165 mW @ 10 V
2.0 A*
*Max current limit value is dependent on input
condition.
Features
•
•
•
•
•
•
•
•
•
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Short−Circuit Protection
Thermal Shutdown with Automatic Restart
Overvoltage Protection
Integrated Clamp for Inductive Switching
ESD Protection
dV/dt Robustness
Analog Drive Capability (Logic Level Input)
AEC−Q101 Qualified and PPAP Capable
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements
These Devices are Pb−Free and are RoHS Compliant
Drain
Overvoltage
Protection
Gate
Input
ESD Protection
Temperature
Limit
Current
Sense
Source
Typical Applications
• Switch a Variety of Resistive, Inductive and Capacitive Loads
• Can Replace Electromechanical Relays and Discrete Circuits
• Automotive / Industrial
Current
Limit
MARKING DIAGRAM
8
SO−8
CASE 751
STYLE 11
8
1
xxxxxx
ALYW
G
1
xxxxxx
A
L
Y
W
G
= V8402D or 8402AD
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
PIN ASSIGNMENT
Source 1
Gate 1
Source 2
Gate 2
1
8
Drain 1
Drain 1
Drain 2
Drain 2
ORDERING INFORMATION
Device
Package
Shipping†
SOIC−8 2500/Tape & Reel
NCV8402DDR2G
NCV8402ADDR2G (Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2011
November, 2011 − Rev. 1
1
Publication Order Number:
NCV8402D/D
NCV8402D, NCV8402AD
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Drain−to−Source Voltage Internally Clamped
Drain−to−Gate Voltage Internally Clamped
(RG = 1.0 MW)
Symbol
Value
Unit
VDSS
42
V
VDGR
42
V
"14
V
Gate−to−Source Voltage
VGS
Continuous Drain Current
ID
Power Dissipation
@ TA = 25°C (Note 1)
@ TA = 25°C (Note 2)
Thermal Resistance
Junction−to−Ambient Steady State (Note 1)
Junction−to−Ambient Steady State (Note 2)
Single Pulse Drain−to−Source Avalanche Energy
(VDD = 32 V, VG = 5.0 V, IPK = 1.0 A, L = 300 mH, RG(ext) = 25 W)
Load Dump Voltage
(VGS = 0 and 10 V, RI = 2.0 W, RL = 9.0 W, td = 400 ms)
Operating Junction and Storage Temperature
Internally Limited
PD
0.8
1.62
W
RqJA
RqJA
157
77
°C/W
EAS
150
mJ
VLD
87
V
TJ, Tstg
−55 to 150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Surface−mounted onto min pad FR4 PCB, (Cu area = 40 sq. mm, 1 oz.).
2. Surface−mounted onto 1″ sq. FR4 board (Cu area = 625 sq. mm, 2 oz.).
+
ID
DRAIN
IG
+
VDS
GATE
SOURCE
VGS
−
−
Figure 1. Voltage and Current Convention
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2
NCV8402D, NCV8402AD
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Parameter
Test Condition
Symbol
Min
Typ
Max
Unit
VGS = 0 V, ID = 10 mA, TJ = 25°C
V(BR)DSS
42
46
55
V
40
45
55
0.25
4.0
1.1
20
50
100
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
(Note 3)
VGS = 0 V, ID = 10 mA, TJ = 150°C
(Note 5)
VGS = 0 V, VDS = 32 V, TJ = 25°C
Zero Gate Voltage Drain Current
IDSS
VGS = 0 V, VDS = 32 V, TJ = 150°C
(Note 5)
Gate Input Current
VDS = 0 V, VGS = 5.0 V
IGSSF
mA
mA
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
VGS = VDS, ID = 150 mA
Gate Threshold Temperature Coefficient
VGS = 10 V, ID = 1.7 A, TJ = 25°C
1.8
2.2
V
VGS(th)/TJ
VGS(th)
1.3
4.0
6.0
−mV/°C
RDS(on)
mW
165
200
VGS = 10 V, ID = 1.7 A, TJ = 150°C
(Note 5)
305
400
Static Drain−to−Source On−Resistance
VGS = 5.0 V, ID = 1.7 A, TJ = 25°C
195
230
VGS = 5.0 V, ID = 1.7 A, TJ = 150°C
(Note 5)
360
460
VGS = 5.0 V, ID = 0.5 A, TJ = 25°C
190
230
VGS = 5.0 V, ID = 0.5 A, TJ = 150°C
(Note 5)
350
460
Source−Drain Forward On Voltage
VGS = 0 V, IS = 7.0 A
VSD
1.0
V
VGS = 10 V, VDD = 12 V
ID = 2.5 A, RL = 4.7 W
tON
25
ms
tOFF
120
−dVDS/dtON
0.8
dVDS/dtOFF
0.3
SWITCHING CHARACTERISTICS (Note 5)
Turn−ON Time (10% VIN to 90% ID)
Turn−OFF Time (90% VIN to 10% ID)
Slew−Rate ON (70% VDS to 50% VDS)
VGS = 10 V, VDD = 12 V,
RL = 4.7 W
Slew−Rate OFF (50% VDS to 70% VDS)
V/ms
SELF PROTECTION CHARACTERISTICS (TJ = 25°C unless otherwise noted) (Note 4)
Current Limit
VDS = 10 V, VGS = 5.0 V, TJ = 25°C
3.7
4.3
5.0
VDS = 10 V, VGS = 5.0 V, TJ = 150°C
(Note 5)
2.3
3.0
3.7
VDS = 10 V, VGS = 10 V, TJ = 25°C
4.2
4.8
5.4
VDS = 10 V, VGS = 10 V, TJ = 150°C
(Note 5)
2.7
3.6
4.5
150
175
200
150
165
Temperature Limit (Turn−off)
Thermal Hysteresis
Temperature Limit (Turn−off)
Thermal Hysteresis
ILIM
VGS = 5.0 V (Note 5)
TLIM(off)
VGS = 5.0 V
DTLIM(on)
VGS = 10 V (Note 5)
TLIM(off)
VGS = 10 V
DTLIM(on)
15
VGS = 5 V ID = 1.0 A
IGON
50
IGCL
0.05
IGTL
0.15
A
°C
15
185
GATE INPUT CHARACTERISTICS (Note 5)
Device ON Gate Input Current
VGS = 10 V ID = 1.0 A
Current Limit Gate Input Current
VGS = 5 V, VDS = 10 V
400
VGS = 10 V, VDS = 10 V
Thermal Limit Fault Gate Input Current
VGS = 5 V, VDS = 10 V
mA
mA
0.4
VGS = 10 V, VDS = 10 V
mA
0.7
ESD ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (Note 5)
Electro−Static Discharge Capability
Human Body Model (HBM)
Machine Model (MM)
3. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.
4. Fault conditions are viewed as beyond the normal operating range of the part.
5. Not subject to production testing.
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3
ESD
4000
400
V
NCV8402D, NCV8402AD
TYPICAL PERFORMANCE CURVES
10
Emax (mJ)
IL(max) (A)
1000
TJstart = 25°C
100
TJstart = 25°C
TJstart = 150°C
TJstart = 150°C
1
10
10
10
100
L (mH)
Figure 2. Single Pulse Maximum Switch−off
Current vs. Load Inductance
100
L (mH)
Figure 3. Single Pulse Maximum Switching
Energy vs. Load Inductance
1000
10
1
0.1
Emax (mJ)
IL(max) (A)
TJstart = 25°C
TJstart = 150°C
1
100
TJstart = 150°C
10
10
TIME IN CLAMP (ms)
TJstart = 25°C
1
Figure 4. Single Pulse Maximum Inductive
Switch−off Current vs. Time in Clamp
8
8V
TA = 25°C
7
5
VDS = 10 V
6V
100°C
4V
ID (A)
3
3.5 V
4
3
2
3V
1
VGS = 2.5 V
0
−40°C
25°C
4
5V
5
ID (A)
Figure 5. Single Pulse Maximum Inductive
Switching Energy vs. Time in Clamp
10 V
6
10
TIME IN CLAMP (ms)
150°C
2
1
0
1
2
3
4
0
5
VDS (V)
1
3
VGS (V)
Figure 6. On−state Output Characteristics
Figure 7. Transfer Characteristics
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4
2
4
5
NCV8402D, NCV8402AD
TYPICAL PERFORMANCE CURVES
350
400
150°C, VGS = 5 V
150°C, ID = 0.5 A
300
RDS(on) (mW)
200
100°C, ID = 1.7 A
100°C, ID = 0.5 A
25°C, ID = 1.7 A
100
5
6
25°C, ID = 0.5 A
−40°C, ID = 0.5 A
−40°C, ID = 1.7 A
0
4
RDS(on) (mW)
150°C, ID = 1.7 A
300
150°C, VGS = 10 V
250
100°C, VGS = 5 V
200
25°C, VGS = 5 V
150
25°C, VGS = 10 V
−40°C, VGS = 5 V
100
−40°C, VGS = 10 V
7
VGS (V)
8
9
50
0.2
10
Figure 8. RDS(on) vs. Gate−Source Voltage
0.6
0.8
1
1.2
ID (A)
1.4
1.6
1.8
2
8
ID = 1.7 A
−40°C
7
VGS = 5 V
1.5
6
ILIM (A)
RDS(on) (NORMALIZED)
0.4
Figure 9. RDS(on) vs. Drain Current
2
1.75
100°C, VGS = 10 V
1.25
1
25°C
5
100°C
4
VGS = 10 V
150°C
3
0.75
0.5
−40 −20
0
20
40
60
T (°C)
80
100
120
2
140
VDS = 10 V
5
6
7
8
9
10
VGS (V)
Figure 10. Normalized RDS(on) vs. Temperature
Figure 11. Current Limit vs. Gate−Source
Voltage
10
8
VGS = 0 V
7
VGS = 10 V
IDSS (mA)
6
ILIM (A)
150°C
1
5
4
40
60
80
0.01
−40°C
0.001
3
20
100°C
25°C
VGS = 5 V
VDS = 10 V
2
−40 −20 0
0.1
100
120
0.0001
10
140
15
20
25
30
35
TJ (°C)
VDS (V)
Figure 12. Current Limit vs. Junction
Temperature
Figure 13. Drain−to−Source Leakage Current
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5
40
NCV8402D, NCV8402AD
TYPICAL PERFORMANCE CURVES
1.1
ID = 150 mA
VGS = VDS
1.1
1
1
VSD (V)
NORMALIZED VGS(th) (V)
1.2
0.9
−40°C
0.9
25°C
0.8
100°C
0.8
0.7
0.7
0.6
0.6
−40
0.5
150°C
−20
0
20
40
60
80
100
120
140
VGS = 0 V
1
2
3
4
5
T (°C)
Figure 14. Normalized Threshold Voltage vs.
Temperature
td(off)
tf
tr
td(on)
3
4
5
6
7
VGS (V)
8
9
10
DRAIN−SOURCE VOLTAGE SLOPE (V/ms)
TIME (ms)
100
50
9
10
ID = 2.5 A
VDD = 12 V
RG = 0 W
0.8
0.6
−dVDS/dt(on)
0.4
dVDS/dt(off)
0.2
0
3
Figure 16. Resistive Load Switching Time vs.
Gate−Source Voltage
4
5
6
7
VGS (V)
8
9
10
Figure 17. Resistive Load Switching
Drain−Source Voltage Slope vs. Gate−Source
Voltage
100
75
td(off), (VGS = 10 V)
tr, (VGS = 5 V)
tf, (VGS = 10 V)
50
tf, (VGS = 5 V)
td(off), (VGS = 5 V)
25
tr, (VGS = 10 V)
0
400
td(on), (VGS = 5 V)
td(on), (VGS = 10 V)
800
1200
1600
2000
RG (W)
DRAIN−SOURCE VOLTAGE SLOPE (V/ms)
1
ID = 2.5 A
VDD = 12 V
TIME (ms)
8
1
ID = 2.5 A
VDD = 12 V
RG = 0 W
150
0
7
Figure 15. Source−Drain Diode Forward
Characteristics
200
0
6
IS (A)
−dVDS/dt(on), VGS = 10 V
0.8
0.6
0.4
dVDS/dt(off), VGS = 5 V
0.2
0
dVDS/dt(off), VGS = 10 V
−dVDS/dt(on), VGS = 5 V
0
Figure 18. Resistive Load Switching Time vs.
Gate Resistance
500
1000
RG (W)
ID = 2.5 A
VDD = 12 V
1500
2000
Figure 19. Drain−Source Voltage Slope during
Turn On and Turn Off vs. Gate Resistance
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NCV8402D, NCV8402AD
TYPICAL PERFORMANCE CURVES
1000
R(t) (°C/W)
100
10
1
Duty Cycle = 50%
20%
10%
5%
2%
1%
0.1
0.01
0.0000001
Single Pulse
0.000001
0.00001
0.0001
0.001
0.01
0.1
PULSE WIDTH (sec)
Figure 20. Transient Thermal Resistance
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7
1
10
100
1000
NCV8402D, NCV8402AD
TEST CIRCUITS AND WAVEFORMS
RL
VIN
+
D
RG
VDD
G DUT
−
S
IDS
Figure 21. Resistive Load Switching Test Circuit
90%
VIN
10%
td(ON)
tr
td(OFF)
tf
90%
10%
IDS
Figure 22. Resistive Load Switching Waveforms
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8
NCV8402D, NCV8402AD
TEST CIRCUITS AND WAVEFORMS
L
VDS
VIN
D
RG
+
VDD
G DUT
−
S
tp
IDS
Figure 23. Inductive Load Switching Test Circuit
5V
VIN
0V
Tav
Tp
V(BR)DSS
Ipk
VDD
VDS
VDS(on)
IDS
0
Figure 24. Inductive Load Switching Waveforms
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9
NCV8402D, NCV8402AD
PACKAGE DIMENSIONS
SOIC−8
CASE 751−07
ISSUE AK
−X−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
8
5
S
B
0.25 (0.010)
Y
M
M
1
4
−Y−
K
G
C
N
DIM
A
B
C
D
G
H
J
K
M
N
S
X 45 _
SEATING
PLANE
−Z−
0.10 (0.004)
H
D
0.25 (0.010)
M
Z Y
S
X
M
J
S
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
STYLE 11:
PIN 1. SOURCE 1
2. GATE 1
3. SOURCE 2
4. GATE 2
5. DRAIN 2
6. DRAIN 2
7. DRAIN 1
8. DRAIN 1
SOLDERING FOOTPRINT*
1.52
0.060
7.0
0.275
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8_
0.25
0.50
5.80
6.20
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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NCV8402D/D