LM158QML www.ti.com SNOSAP3F – JULY 2005 – REVISED MARCH 2013 LM158QML Low Power Dual Operational Amplifiers Check for Samples: LM158QML FEATURES ADVANTAGES • • • • 1 2 • • • • • • • • • Available with Radiation Specification – High Dose Rate 100 krad(Si) – ELDRS Free 100 krad(Si) Internally Frequency Compensated for Unity Gain Large DC Voltage Gain: 100 dB Wide Bandwidth (Unity Gain): 1 MH z(Temperature Compensated) Wide Power Supply Range: – Single Supply: 3V to 32V – Or Dual Supplies: ±1.5V to ±16V Very Low Supply Current Drain (500 μA) − Essentially Independent of Supply Voltage Low Input Offset Voltage: 2 mV Input Common-mode Voltage Range Includes Ground Differential Input Voltage Range Equal to the Power Supply Voltage Large Output Voltage Swing: 0V to V+ − 1.5V UNIQUE CHARACTERISTICS • • • In the Linear Mode the Input Common-Mode Voltage Range Includes Ground and the Output Voltage can also Swing to Ground, even though Operated from only a Single Power Supply Voltage. The Unity Gain Cross Frequency is Temperature Compensated. The Input Bias Current is also Temperature Compensated. • • Two Internally Compensated Op Amps Eliminates Need for Dual Supplies Allows Direct Sensing Near Gnd and VO also Goes to Gnd Compatible with all Forms of Logic Power Drain Suitable for Battery Operation DESCRIPTION The LM158 series consists of two independent, high gain, internally frequency compensated operational amplifiers which were designed specifically to operate from a single power supply over a wide range of voltages. Operation from split power supplies is also possible and the low power supply current drain is independent of the magnitude of the power supply voltage. Application areas include transducer amplifiers, dc gain blocks and all the conventional op amp circuits which now can be more easily implemented in single power supply systems. For example, the LM158 series can be directly operated off of the standard +5V power supply voltage which is used in digital systems and will easily provide the required interface electronics without requiring the additional ±15V power supplies. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2005–2013, Texas Instruments Incorporated LM158QML SNOSAP3F – JULY 2005 – REVISED MARCH 2013 www.ti.com Connection Diagrams Figure 1. TO-99 Package See Package Number LMC0008C Top View Top View Figure 2. CDIP Package See Package Number NAB0008A OUT A 1 10 -IN A 2 9 OUT B V+ +IN A 3 8 -IN B GND 4 7 +IN B N/C 5 6 N/C Figure 3. 10 Lead CLGA Package See Package Number NAC0010A Schematic Diagram (Each Amplifier) These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 2 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM158QML LM158QML www.ti.com SNOSAP3F – JULY 2005 – REVISED MARCH 2013 Absolute Maximum Ratings (1) Supply Voltage, V+ 32VDC Differential Input Voltage 32VDC −0.3VDC to +32VDC Input Voltage Power Dissipation (2) 830 mW (3) Output Short-Circuit to GND (One Amplifier) V+ ≤ 15VDC and TA = 25°C Continuous Maximum Junction Temperature (TJmax) 150°C Input Current (VI < −0.3V) (4) 50 mA Operating Temperature Range −55°C ≤ TA ≤ +125°C Storage Temperature Range −65°C ≤ TA ≤ +150°C Lead Temperature (Soldering, 10 seconds) Thermal Resistance θJA θJC TO-99 300°C CDIP 260°C CLGA 260°C TO-99 (Still Air) 80°C/W CDIP (Still Air) 132°C/W CDIP (500LF/Min Air Flow) 81°C/W CLGA (Still Air) 195°C/W CLGA (500LF/Min Air Flow) 131°C/W TO-99 42°C/W CDIP 23°C/W CLGA Package Weight 33°C/W TO-99 1,000mg CDIP 1,100mg CLGA 220mg ESD Tolerance (5) (1) (2) (3) (4) (5) 155°C/W TO-99 (500LF/Min Air Flow) 250V Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. For ensured specifications and test conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), θJA (package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax = (TJmax - TA)/θJA or the number given in the Absolute Maximum Ratings, whichever is lower. Short circuits from the output to V+ can cause excessive heating and eventual destruction. When considering short circuits to ground, the maximum output current is approximately 40 mA independent of the magnitude of V+. At values of supply voltage in excess of +15V, continuous short-circuits can exceed the power dissipation ratings and cause eventual destruction. Destructive dissipation can result from simultaneous shorts on all amplifiers. This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the op amps to go to the V+voltage level (or to ground for a large overdrive) for the time duration that an input is driven negative. This is not destructive and normal output states will re-establish when the input voltage, which was negative, again returns to a value greater than −0.3V (at 25°C). Human body model, 1.5 kΩ in series with 100 pF. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM158QML 3 LM158QML SNOSAP3F – JULY 2005 – REVISED MARCH 2013 www.ti.com Quality Conformance Inspection Mil-Std-883, Method 5005 - Group A 4 Subgroup Description Temp °C 1 Static tests at +25 2 Static tests at +125 3 Static tests at -55 4 Dynamic tests at +25 5 Dynamic tests at +125 6 Dynamic tests at -55 7 Functional tests at +25 8A Functional tests at +125 8B Functional tests at -55 9 Switching tests at +25 10 Switching tests at +125 11 Switching tests at -55 12 Settling time at +25 13 Settling time at +125 14 Settling time at -55 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM158QML LM158QML www.ti.com SNOSAP3F – JULY 2005 – REVISED MARCH 2013 LM158 Electrical Characteristics SMD 5962–8771001 DC Parameters The following conditions apply, unless otherwise specified. Parameter ICC Power Supply Current VOH Output Voltage High VOL Output Voltage Low ISink Output Sink Current All voltages referenced to device ground. Max Units Subgroups +VCC = 5V, RL = 100K, VO = 1.4V 1.2 mA 1, 2, 3 +VCC = 30V, RL = 100K, VO = 1.4V 3.0 mA 1 4.0 Test Conditions Notes mA 2, 3 +VCC = 30V, RL = 2KΩ 26 V 1, 2, 3 +VCC = 30V, RL = 10KΩ 27 V 1, 2, 3 +VCC = 30V, RL = 10KΩ 20 mV 1, 2, 3 +VCC = 30V, ISink = 1µA 20 mV 1, 2, 3 +VCC = 5V, RL = 10KΩ 20 mV 1, 2, 3 12 µA 1 10 mA 1 5.0 mA 2, 3 +VCC = 15V, VO = 200mV, +VI = 0V, -VI = +65mV +VCC = 15V, VO = 2V, +VI = 0V, -VI = +65mV ISource Output Source Current Min +VCC = 15V, VO = 2V, +VI = 0V, -VI = -65mV -20 mA 1 -10 mA 2, 3 IOS Short Circuit Current +VCC = 5V, VO = 0V -60 mA 1 VIO Input Offset Voltage +VCC = 30V, VCM = 0V, RS = 50Ω, VO = 1.4V -5.0 5.0 mV 1 -7.0 7.0 mV 2, 3 +VCC = 30V, VCM = 28.5V, RS = 50Ω, VO = 1.4V -5.0 5.0 mV 1 +VCC = 30V, VCM = 28V, RS = 50Ω, VO = 1.4V -7.0 7.0 mV 2, 3 +VCC = 5V, VCM = 0V, RS = 50Ω, VO = 1.4V -5.0 5.0 mV 1 -7.0 7.0 mV 2, 3 70 dB 1 CMRR Common Mode Rejection Ratio +VCC = 30V, RS = 50Ω VI = 0V to 28.5V, ±IIB Input BIas Current +VCC = 5V, VCM = 0V See (1) -150 -1.0 nA 1 (1) -300 -1.0 nA 2, 3 -30 30 nA 1 -100 100 nA 2, 3 dB 1 See IIO Input Offset Current +VCC = 5V, VCM = 0V PSRR Power Supply Rejection Ratio +VCC = 5V to 30V, VCM = 0V VCM Common Mode Voltage Range +VCC = 30V VDiff Differential Input Voltage AVS Large Signal Gain (1) (2) (3) (4) 65 See (2), (3) 28.5 V 1 See (2), (3) 28.0 V 2, 3 V 1, 2, 3 See (4) +VCC = 15V, RL = 2KΩ, VO = 1V to 11V 32 50 V/mV 4 25 V/mV 5, 6 The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of the output so no loading change exists on the input lines. The input common-mode voltage of either input signal voltage should not be allowed to go negative by more than 0.3V (at 25°C). The upper end of the common-mode voltage range is V+ −1.5V (at 25°C), but either or both inputs can go to +32V without damage, independent of the magnitude of V+. Specified by input offset voltage. Specified parameter not tested. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM158QML 5 LM158QML SNOSAP3F – JULY 2005 – REVISED MARCH 2013 LM158A Electrical Characteristics www.ti.com SMD 5962–8771002, High Dose Rate DC Parameters The following conditions apply, unless otherwise specified. Parameter ICC Power Supply Current VOH Output Voltage High VOL Output Voltage Low All voltages referenced to device ground. Max Units Subgroups +VCC = 5V, RL = 100K, VO = 1.4V 1.2 mA 1, 2, 3 +VCC = 30V, RL = 100K, VO = 1.4V 3.0 mA 1 4.0 Test Conditions Notes Min mA 2, 3 +VCC = 30V, RL = 2KΩ 26 V 1, 2, 3 +VCC = 30V, RL = 10KΩ 27 V 1, 2, 3 +VCC = 30V, RL = 10KΩ +VCC = 30V, ISink = 1µA Output Sink Current +VCC = 15V, VO = 200mV, +VI = 0V, -VI = +65mV +VCC = 15V, VO = 2V, +VI = 0V, -VI = +65mV mV 1 mV 2, 3 40 mV 1 100 mV 2, 3 40 mV 1 100 mV 2, 3 12 µA 1 10 mA 1 5.0 mA 2, 3 -20 mA 1 -10 mA 2, 3 mA 1 +VCC = 5V, RL = 10KΩ ISink 40 100 ISource Output Source Current +VCC = 15V, VO = 2V, +VI = 0V, -VI = -65mV IOS Short Circuit Current +VCC = 5V, VO = 0V -60 VIO Input Offset Voltage +VCC = 30V, VCM = 0V, RS = 50Ω, VO = 1.4V -2.0 2.0 mV 1 -4.0 4.0 mV 2, 3 +VCC = 30V, VCM = 28.5V, RS = 50Ω, VO = 1.4V -2.0 2.0 mV 1 +VCC = 30V, VCM = 28V, RS = 50Ω, VO = 1.4V -4.0 4.0 mV 2, 3 +VCC = 5V, VCM = 0V, RS = 50Ω, VO = 1.4V -2.0 2.0 mV 1 -4.0 4.0 mV 2, 3 70 dB 1 CMRR Common Mode Rejection Ratio +VCC = 30V, RS = 50Ω VI = 0V to 28.5V, ±IIB Input BIas Current +VCC = 5V, VCM = 0V See (1) See IIO Input Offset Current +VCC = 5V, VCM = 0V PSRR Power Supply Rejection Ratio +VCC = 5V to 30V, VCM = 0V VCM Common Mode Voltage Range +VCC = 30V Differential Input Voltage AVS Large Signal Gain See (2) (1) (2) (3) (4) 6 -1.0 nA 1 -100 -1.0 nA 2, 3 -10 10 nA 1 -30 30 nA 2, 3 dB 1 (3) 28.5 V 1 (2) (3) 28.0 V 2, 3 V 1, 2, 3 See +VCC = 15V, RL = 2KΩ, VO = 1V to 11V -50 65 See VDiff (1) (4) 32 50 V/mV 4 25 V/mV 5, 6 The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of the output so no loading change exists on the input lines. The input common-mode voltage of either input signal voltage should not be allowed to go negative by more than 0.3V (at 25°C). The upper end of the common-mode voltage range is V+ −1.5V (at 25°C), but either or both inputs can go to +32V without damage, independent of the magnitude of V+. Specified by input offset voltage. Specified parameter not tested. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM158QML LM158QML www.ti.com SNOSAP3F – JULY 2005 – REVISED MARCH 2013 SMD 5962–8771002, High Dose Rate DC Drift Parameters The following conditions apply, unless otherwise specified. All voltages referenced to device ground. Delta calculations are performed on QMLV devices at Group B, Subgroup 5 only. Parameter VIO Input Offset Voltage ±IIB (1) Input Bias Current Min Max Units Subgroups +VCC = 30V, VCM = 0V, RS = 50Ω, VO = 1.4V -0.5 0.5 mV 1 +VCC = 30V, VCM = 28.5V, RS = 50Ω, VO = 1.4V -0.5 0.5 mV 1 +VCC = 5V, VCM = 0V, RS = 50Ω, VO = 1.4V -0.5 0.5 mV 1 -10 10 nA 1 Test Conditions +VCC = 5V, VCM = 0V Notes See (1) The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of the output so no loading change exists on the input lines. SMD 5962–8771002, High Dose Rate SMD 5962–8771002, High Dose Rate 100K Post Radiation Limits @ +25°C (1) DC Parameters The following conditions apply, unless otherwise specified. Parameter VIO (1) (2) Input Offset Voltage ±IIB Input Bias Current ICC Power Supply Current Test Conditions Notes Min Max Units Sub groups +VCC = 30V, VCM = 0V, RS = 50Ω, VO = 1.4V See (1) -4.0 4.0 mV 1 +VCC = 30V, VCM = 28.5V, RS = 50Ω, VO = 1.4V See (1) -4.0 4.0 mV 1 +VCC = 5V, VCM = 0V, RS = 50Ω, VO = 1.4V See (1) -4.0 4.0 mV 1 +VCC = 5V, VCM = 0V See (1) (2) -60 -1.0 nA 1 1.5 mA 1 +VCC = 5V, RL = 100K, VO = 1.4V See (1) Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post Radiation Limits Table. These parts may be dose rate sensitive in a space environment and demonstrate enhanced low dose rate sensitivity. Radiation end point limits for the noted parameters are specified only for the conditions as specified in MIL-STD-883, per Test Method 1019, Condition A. The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of the output so no loading change exists on the input lines. LM158A Electrical Characteristics DC Parameters SMD 5962–8771003 ELDRS Free Only The following conditions apply, unless otherwise specified. Parameter ICC All voltages referenced to device ground. Power Supply Current VOH Output Voltage High VOL Output Voltage Low All voltages referenced to device ground. Max Units Subgroups +VCC = 5V, RL = 100K, VO = 1.4V 1.2 mA 1, 2, 3 +VCC = 30V, RL = 100K, VO = 1.4V 3.0 mA 1, V 1, 2, 3 Test Conditions Notes Min 4.0 +VCC = 30V, RL = 2KΩ 26 +VCC = 30V, RL = 10KΩ 27 +VCC = 30V, RL = 10KΩ +VCC = 30V, ISink = 1µA +VCC = 5V, RL = 10KΩ 2, 3 V 1, 2, 3 40 mV 1 100 mV 2, 3 40 mV 1 100 mV 2, 3 40 mV 1 100 mV 2, 3 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM158QML 7 LM158QML SNOSAP3F – JULY 2005 – REVISED MARCH 2013 LM158A Electrical Characteristics DC Parameters (continued) www.ti.com SMD 5962–8771003 ELDRS Free Only The following conditions apply, unless otherwise specified. Parameter ISink Output Sink Current All voltages referenced to device ground. Test Conditions Notes +VCC = 15V, VO = 200mV, +VI = 0V, -VI = +65mV +VCC = 15V, VO = 2V, +VI = 0V, -VI = +65mV ISource Output Source Current Units Subgroups 12 µA 1 10 mA 1 5.0 mA 2, 3 Min +VCC = 15V, VO = 2V, +VI = 0V, -VI = -65mV Max -20 mA 1 -10 mA 2, 3 mA 1 IOS Short Circuit Current +VCC = 5V, VO = 0V -60 VIO Input Offset Voltage +VCC = 30V, VCM = 0V, RS = 50Ω, VO = 1.4V -2.0 2.0 mV 1 -4.0 4.0 mV 2, 3 +VCC = 30V, VCM = 28.5V, RS = 50Ω, VO = 1.4V -2.0 2.0 mV 1 +VCC = 30V, VCM = 28V, RS = 50Ω, VO = 1.4V -4.0 4.0 mV 2, 3 +VCC = 5V, VCM = 0V, RS = 50Ω, VO = 1.4V -2.0 2.0 mV 1 -4.0 4.0 mV 2, 3 70 dB 1 CMRR Common Mode Rejection Ratio +VCC = 30V, RS = 50Ω VI = 0V to 28.5V, ±IIB Input BIas Current +VCC = 5V, VCM = 0V See (1) See IIO Input Offset Current +VCC = 5V, VCM = 0V PSRR Power Supply Rejection Ratio +VCC = 5V to 30V, VCM = 0V VCM Common Mode Voltage Range +VCC = 30V VDiff Differential Input Voltage AVS Large Signal Gain (1) (2) (3) (4) (1) -50 -1.0 nA 1 -100 -1.0 nA 2, 3 -10 10 nA 1 -30 30 nA 2, 3 dB 1 65 See (2), (3) 28.5 V 1 See (2), (3) 28.0 V 2, 3 V 1, 2, 3 See (4) +VCC = 15V, RL = 2KΩ, VO = 1V to 11V 32 50 V/mV 4 25 V/mV 5, 6 The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of the output so no loading change exists on the input lines. The input common-mode voltage of either input signal voltage should not be allowed to go negative by more than 0.3V (at 25°C). The upper end of the common-mode voltage range is V+ −1.5V (at 25°C), but either or both inputs can go to +32V without damage, independent of the magnitude of V+. Specified by input offset voltage. Specified parameter not tested. SMD 5962–8771003 ELDRS Free Only DC Drift Parameters The following conditions apply, unless otherwise specified. All voltages referenced to device ground. Delta calculations are performed on QMLV devices at Group B, Subgroup 5 only. Parameter VIO 8 Input Offset Voltage Min Max Units Subgroups +VCC = 30V, VCM = 0V, RS = 50Ω, VO = 1.4V -0.5 0.5 mV 1 +VCC = 30V, VCM = 28.5V, RS = 50Ω, VO = 1.4V -0.5 0.5 mV 1 +VCC = 5V, VCM = 0V, RS = 50Ω, VO = 1.4V -0.5 0.5 mV 1 Test Conditions Submit Documentation Feedback Notes Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM158QML LM158QML www.ti.com SNOSAP3F – JULY 2005 – REVISED MARCH 2013 SMD 5962–8771003 ELDRS Free Only DC Drift Parameters (continued) The following conditions apply, unless otherwise specified. All voltages referenced to device ground. Delta calculations are performed on QMLV devices at Group B, Subgroup 5 only. Parameter ±IIB (1) Input Bias Current Test Conditions +VCC = 5V, VCM = 0V Notes Min Max Units Subgroups See (1) -10 10 nA 1 The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of the output so no loading change exists on the input lines. SMD 5962–8771003 ELDRS Free Only 100K Post Radiation Limits @ +25°C (1) DC Parameters The following conditions apply, unless otherwise specified. Parameter VIO ±IIB (1) (2) Input Offset Voltage Input Bias Current All voltages referenced to device ground. Test Conditions Notes Min Max Units Sub groups +VCC = 30V, VCM = 0V, RS = 50Ω, VO = 1.4V See (1) -4.0 4.0 mV 1 +VCC = 30V, VCM = 28.5V, RS = 50Ω, VO = 1.4V See (1) -4.0 4.0 mV 1 +VCC = 5V, VCM = 0V, RS = 50Ω, VO = 1.4V See (1) -4.0 4.0 mV 1 +VCC = 5V, VCM = 0V See (1) (2) -60 -1.0 nA 1 Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post Radiation Limits Table. These parts may be sensitive in a high dose environment. Low dose rate testing has been performed on a wafer-by-wafer basis, per Test Method 1019, Condition D of MIL-STD-883, with no enhanced low dose rate sensitivity (ELDRS). The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of the output so no loading change exists on the input lines. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM158QML 9 LM158QML SNOSAP3F – JULY 2005 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics 10 Input Voltage Range Input Current Figure 4. Figure 5. Supply Current Voltage Gain Figure 6. Figure 7. Open Loop Frequency Response Common-Mode Rejection Ratio Figure 8. Figure 9. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM158QML LM158QML www.ti.com SNOSAP3F – JULY 2005 – REVISED MARCH 2013 Typical Performance Characteristics (continued) Voltage Follower Pulse Response Voltage Follower Pulse Response (Small Signal) Figure 10. Figure 11. Large Signal Frequency Response Output Characteristics Current Sourcing Figure 12. Figure 13. Output Characteristics Current Sinking Current Limiting Figure 14. Figure 15. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM158QML 11 LM158QML SNOSAP3F – JULY 2005 – REVISED MARCH 2013 www.ti.com APPLICATION HINTS The LM158 series are op amps which operate with only a single power supply voltage, have true-differential inputs, and remain in the linear mode with an input common-mode voltage of 0 VDC. These amplifiers operate over a wide range of power supply voltage with little change in performance characteristics. At 25°C amplifier operation is possible down to a minimum supply voltage of 2.3 VDC. Precautions should be taken to insure that the power supply for the integrated circuit never becomes reversed in polarity or that the unit is not inadvertently installed backwards in a test socket as an unlimited current surge through the resulting forward diode within the IC could cause fusing of the internal conductors and result in a destroyed unit. Large differential input voltages can be easily accommodated and, as input differential voltage protection diodes are not needed, no large input currents result from large differential input voltages. The differential input voltage may be larger than V+ without damaging the device. Protection should be provided to prevent the input voltages from going negative more than −0.3 VDC (at 25°C). An input clamp diode with a resistor to the IC input terminal can be used. To reduce the power supply current drain, the amplifiers have a class A output stage for small signal levels which converts to class B in a large signal mode. This allows the amplifiers to both source and sink large output currents. Therefore both NPN and PNP external current boost transistors can be used to extend the power capability of the basic amplifiers. The output voltage needs to raise approximately 1 diode drop above ground to bias the on-chip vertical PNP transistor for output current sinking applications. For ac applications, where the load is capacitively coupled to the output of the amplifier, a resistor should be used, from the output of the amplifier to ground to increase the class A bias current and prevent crossover distortion. Where the load is directly coupled, as in dc applications, there is no crossover distortion. Capacitive loads which are applied directly to the output of the amplifier reduce the loop stability margin. Values of 50 pF can be accommodated using the worst-case non-inverting unity gain connection. Large closed loop gains or resistive isolation should be used if larger load capacitance must be driven by the amplifier. The bias network of the LM158 establishes a drain current which is independent of the magnitude of the power supply voltage over the range of 3 VDC to 30 VDC. Output short circuits either to ground or to the positive power supply should be of short time duration. Units can be destroyed, not as a result of the short circuit current causing metal fusing, but rather due to the large increase in IC chip dissipation which will cause eventual failure due to excessive junction temperatures. Putting direct short-circuits on more than one amplifier at a time will increase the total IC power dissipation to destructive levels, if not properly protected with external dissipation limiting resistors in series with the output leads of the amplifiers. The larger value of output source current which is available at 25°C provides a larger output current capability at elevated temperatures (see Typical Performance Characteristics) than a standard IC op amp. The circuits presented in the section on typical applications emphasize operation on only a single power supply voltage. If complementary power supplies are available, all of the standard op amp circuits can be used. In general, introducing a pseudo-ground (a bias voltage reference of V+/2) will allow operation above and below this value in single power supply systems. Many application circuits are shown which take advantage of the wide input common-mode voltage range which includes ground. In most cases, input biasing is not required and input voltages which range to ground can easily be accommodated. 12 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM158QML LM158QML www.ti.com SNOSAP3F – JULY 2005 – REVISED MARCH 2013 Typical Single-Supply Applications (V+ = 5.0 VDC) *R not needed due to temperature independent IIN Figure 16. Non-Inverting DC Gain (0V Output) VO = 0 VDC for VIN = 0 VDC AV = 10 Where: VO = V1 + V2 −V3 − V4 (V1 + V2) ≥ (V3 + V4) to keep VO > 0 VDC Figure 17. DC Summing Amplifier (VIN'S ≥ 0 VDC and VO ≥ 0 VDC) Figure 18. Power Amplifier Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM158QML 13 LM158QML SNOSAP3F – JULY 2005 – REVISED MARCH 2013 fo = 1 kHz Q = 50 Av = 100 (40 dB) www.ti.com Figure 19. “BI-QUAD” RC Active Bandpass Filter Figure 20. Fixed Current Sources 14 Submit Documentation Feedback Figure 21. Lamp Driver Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM158QML LM158QML www.ti.com SNOSAP3F – JULY 2005 – REVISED MARCH 2013 *(Increase R1 for IL small) VL ≤ V+ −2V Figure 22. LED Driver Figure 23. Current Monitor VO = VIN Figure 24. Driving TTL Figure 25. Voltage Follower Figure 26. Pulse Generator Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM158QML 15 LM158QML SNOSAP3F – JULY 2005 – REVISED MARCH 2013 www.ti.com Figure 27. Squarewave Oscillator HIGH ZIN LOW ZOUT 16 Figure 28. Pulse Generator Figure 29. Low Drift Peak Detector Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM158QML LM158QML www.ti.com SNOSAP3F – JULY 2005 – REVISED MARCH 2013 IO = 1 amp/volt VIN (Increase RE for IO small) Figure 30. High Compliance Current Sink Figure 31. Comparator with Hysteresis *WIDE CONTROL VOLTAGE RANGE: 0 VDC ≤ VC ≤ 2 (V+ −1.5V DC) Figure 32. Voltage Controlled Oscillator (VCO) Figure 33. AC Coupled Inverting Amplifier Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM158QML 17 LM158QML SNOSAP3F – JULY 2005 – REVISED MARCH 2013 www.ti.com Figure 34. Ground Referencing a Differential Input Signal Av = 11 (As Shown) Figure 35. AC Coupled Non-Inverting Amplifier fo = 1 kHz Q=1 AV = 2 Figure 36. DC Coupled Low-Pass RC Active Filter 18 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM158QML LM158QML www.ti.com SNOSAP3F – JULY 2005 – REVISED MARCH 2013 fo = 1 kHz Q = 25 Figure 37. Bandpass Active Filter Figure 38. High Input Z, DC Differential Amplifier Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM158QML 19 LM158QML SNOSAP3F – JULY 2005 – REVISED MARCH 2013 www.ti.com Figure 39. Photo Voltaic-Cell Amplifier Figure 40. Bridge Current Amplifier Figure 41. High Input Z Adjustable-Gain DC Instrumentation Amplifier 20 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM158QML LM158QML www.ti.com SNOSAP3F – JULY 2005 – REVISED MARCH 2013 Figure 42. Using Symmetrical Amplifiers to Reduce Input Current (General Concept) Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM158QML 21 LM158QML SNOSAP3F – JULY 2005 – REVISED MARCH 2013 www.ti.com REVISION HISTORY Changes from Revision E (March 2013) to Revision F • 22 Page Changed layout of National Data Sheet to TI format .......................................................................................................... 20 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM158QML PACKAGE OPTION ADDENDUM www.ti.com 27-Jul-2016 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) 5962-8771002GA ACTIVE TO-99 LMC 8 20 TBD Call TI Call TI -55 to 125 LM158AH-SMD 5962-8771002GA Q A CO 5962-8771002GA Q > T 5962-8771002QXA ACTIVE CFP NAC 10 54 TBD Call TI Call TI -55 to 125 LM158AWG /883 Q 5962-87710 (02QXA ACO ~ 02QYA ACO) (02QXA >T ~ 02QYA >T) 5962R8771002V9A ACTIVE DIESALE Y 0 38 Green (RoHS & no Sb/Br) Call TI Level-1-NA-UNLIM -55 to 125 5962R8771002VGA ACTIVE TO-99 LMC 8 20 TBD Call TI Call TI -55 to 125 LM158AHRQMLV 5962R8771002VGA Q ACO 5962R8771002VGA Q >T 5962R8771002VPA ACTIVE CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LM158AJRQMLV 5962R87710 02VPA Q ACO 02VPA Q >T 5962R8771002VXA ACTIVE CFP NAC 10 54 TBD Call TI Call TI -55 to 125 LM158AWG (RLQMLV Q ~ RQMLV Q) 5962R87710 02VXA ACO 02VXA >T 5962R8771003V9A ACTIVE DIESALE Y 0 38 Green (RoHS & no Sb/Br) Call TI Level-1-NA-UNLIM 25 Only 5962R8771003VGA ACTIVE TO-99 LMC 8 20 TBD Call TI Call TI -55 to 125 LM158AHRLQMLV 5962R8771003VGA Q ACO 5962R8771003VGA Q >T 5962R8771003VPA ACTIVE CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LM158AJRLQV Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 27-Jul-2016 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) 5962R87710 03VPA Q ACO 03VPA Q >T 5962R8771003VXA ACTIVE CFP NAC 10 54 TBD Call TI Call TI -55 to 125 LM158 MD8 ACTIVE DIESALE Y 0 400 Green (RoHS & no Sb/Br) Call TI Level-1-NA-UNLIM -55 to 125 LM158 MW8 ACTIVE WAFERSALE YS 0 1 Green (RoHS & no Sb/Br) Call TI Level-1-NA-UNLIM -55 to 125 LM158A MDE ACTIVE DIESALE Y 0 38 Green (RoHS & no Sb/Br) Call TI Level-1-NA-UNLIM -55 to 125 LM158A MDR ACTIVE DIESALE Y 0 38 Green (RoHS & no Sb/Br) Call TI Level-1-NA-UNLIM -55 to 125 LM158AH-SMD ACTIVE TO-99 LMC 8 20 TBD Call TI Call TI -55 to 125 LM158AH-SMD 5962-8771002GA Q A CO 5962-8771002GA Q > T LM158AH/883 ACTIVE TO-99 LMC 8 20 TBD Call TI Call TI -55 to 125 LM158AH/883 Q ACO LM158AH/883 Q >T LM158AHRLQMLV ACTIVE TO-99 LMC 8 20 TBD Call TI Call TI -55 to 125 LM158AHRLQMLV 5962R8771003VGA Q ACO 5962R8771003VGA Q >T LM158AHRQMLV ACTIVE TO-99 LMC 8 20 TBD Call TI Call TI -55 to 125 LM158AHRQMLV 5962R8771002VGA Q ACO 5962R8771002VGA Q >T LM158AJ/883 ACTIVE CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LM158AJ/883 5962-87710 02PA Q ACO 02PA Q >T LM158AJRLQMLV ACTIVE CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LM158AJRLQV 5962R87710 Addendum-Page 2 LM158AWG RLQMLV Q 5962R87710 03VXA ACO 03VXA >T Samples PACKAGE OPTION ADDENDUM www.ti.com 27-Jul-2016 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) 03VPA Q ACO 03VPA Q >T LM158AJRQMLV ACTIVE CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LM158AJRQMLV 5962R87710 02VPA Q ACO 02VPA Q >T LM158AWG/883 ACTIVE CFP NAC 10 54 TBD Call TI Call TI -55 to 125 LM158AWG /883 Q 5962-87710 (02QXA ACO ~ 02QYA ACO) (02QXA >T ~ 02QYA >T) LM158AWGRLQMLV ACTIVE CFP NAC 10 54 TBD Call TI Call TI -55 to 125 LM158AWG RLQMLV Q 5962R87710 03VXA ACO 03VXA >T LM158AWGRQMLV ACTIVE CFP NAC 10 54 TBD Call TI Call TI -55 to 125 LM158AWG (RLQMLV Q ~ RQMLV Q) 5962R87710 02VXA ACO 02VXA >T LM158H/883 ACTIVE TO-99 LMC 8 20 TBD Call TI Call TI -55 to 125 LM158H/883 Q ACO LM158H/883 Q >T (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Addendum-Page 3 Samples PACKAGE OPTION ADDENDUM www.ti.com 27-Jul-2016 Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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OTHER QUALIFIED VERSIONS OF LM158QML, LM158QML-SP : • Military: LM158QML • Space: LM158QML-SP NOTE: Qualified Version Definitions: • Military - QML certified for Military and Defense Applications • Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application Addendum-Page 4 MECHANICAL DATA NAB0008A J08A (Rev M) www.ti.com MECHANICAL DATA NAC0010A WG10A (Rev H) www.ti.com IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. 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