Intersil ACTS541T Radiation hardened octal three-state buffer/line driver Datasheet

ACTS541T
Data Sheet
July 1999
Radiation Hardened Octal Three-State
Buffer/Line Driver
Intersil’s Satellite Applications FlowTM (SAF) devices are fully
tested and guaranteed to 100kRAD total dose. These QML
Class T devices are processed to a standard flow intended
to meet the cost and shorter lead-time needs of large
volume satellite manufacturers, while maintaining a high
level of reliability.
The Intersil ACTS541T is a Radiation Hardened Octal
Buffer/Line Driver, with three-state outputs. The output
enable pins OE1, OE2 control the three-state outputs. If
either enable is high the output will be in a high impedance
state. For data output both enables must be low.
Specifications
Specifications for Rad Hard QML devices are controlled by
the Defense Supply Center in Columbus (DSCC). The SMD
numbers listed below must be used when ordering.
Detailed Electrical Specifications for the ACTS541T are
contained in SMD 5962-96726. A “hot-link” is provided from
our website for downloading.
www.intersil.com/spacedefense/newsafclasst.asp
• QML Class T, Per MIL-PRF-38535
• Radiation Performance
- Gamma Dose (γ) 1 x 105 RAD(Si)
- Latch-Up Free Under Any Conditions
- Single Event Upset (SEU) Immunity: <1 x 10-10
Errors/Bit/Day (Typ)
- SEU LET Threshold . . . . . . . . . . . . .>100 MEV-cm2/mg
• 1.25 Micron Radiation Hardened SOS CMOS
• Significant Power Reduction Compared to ALSTTL Logic
• DC Operating Voltage Range . . . . . . . . . . . . 4.5V to 5.5V
• Input Logic Levels
- VIL = 0.8V Max
- VIH = VCC/2 Min
• Fast Propagation Delay . . . . . . . . 21ns (Max), 14ns (Typ)
Pinouts
ACTS541T (SBDIP), CDIP2-T20
TOP VIEW
Ordering Information
PART
NUMBER
TEMP.
RANGE
(oC)
5962R9672602TRC
ACTS541DTR-02
-55 to 125
5962R9672602TXC
ACTS541KTR-02
-55 to 125
NOTE: Minimum order quantity for -T is 150 units through
distribution, or 450 units direct.
OE1
1
20 VCC
A0
2
19 OE2
A1
3
18 Y0
A2
4
17 Y1
A3
5
16 Y2
A4
6
15 Y3
A5
7
14 Y4
A6
8
13 Y5
A7
9
12 Y6
GND 10
11 Y7
ACTS541T (FLATPACK), CDFP4-F20
TOP VIEW
OE1
1
20
VCC
A0
2
19
OE2
A1
3
18
Y0
A2
4
17
Y1
A3
5
16
Y2
A4
6
15
Y3
A5
7
14
Y4
A6
8
13
Y5
A7
9
12
Y6
10
11
Y7
GND
1
4612.1
Features
Intersil’s Quality Management Plan (QM Plan), listing all
Class T screening operations, is also available on our
website.
www.semi.intersil.com/quality/manuals.asp
ORDERING
NUMBER
File Number
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
ACTS541T
Functional Diagram
VCC
2
18
A0
OE1
OE2
Y0
1
GND
VCC
19
3
17
A1
Y1
GND
VCC
4
16
A2
Y2
GND
VCC
5
15
A3
Y3
GND
VCC
6
14
A4
Y4
GND
VCC
7
13
A5
Y5
GND
VCC
8
12
A6
Y6
GND
VCC
9
GND VCC
10
A7
11
Y7
20
GND
TRUTH TABLE
INPUTS
OUTPUTS
OE1
OE2
An
Yn
L
L
H
H
L
L
L
L
H
X
X
Z
X
H
X
Z
NOTE: L = Low Logic Level, H = High Logic Level, Z = High Impedance.
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ACTS541T
Die Characteristics
DIE DIMENSIONS:
PASSIVATION:
(2600µm x 2600µm x 533µm ±51µm)
Type: Silox (SiO2)
102 x 102 x 21mils ±2mil
Thickness: 8.0kÅ ±1.0kÅ
METALLIZATION:
WORST CASE CURRENT DENSITY:
< 2.0e5 A/cm2
Type: Al Si Cu
Thickness: 10.0kÅ ±2kÅ
TRANSISTOR COUNT:
SUBSTRATE POTENTIAL:
182
Unbiased (Silicon on Sapphire)
PROCESS:
Bond Pad #20 (VCC) First
CMOS SOS
BACKSIDE FINISH:
Sapphire
Metallization Mask Layout
(18) YO
(19) OE2
(20) VCC
(1) OE1
(2) A0
(3) A1
ACTS541T
A2 (4)
(17) Y1
A3 (5)
(16) Y2
NC
NC
NC
NC
Y5 (13)
Y6 (12)
Y7 (11)
(14) Y4
GND (10)
A5 (7)
A7 (9)
(15) Y3
A6 (8)
A4 (6)
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
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