ON NLV74LVX14DTR2G Hex schmitt inverter Datasheet

MC74LVX14
Hex Schmitt Inverter
With 5 V−Tolerant Inputs
The MC74LVX14 is an advanced high speed CMOS Schmitt
inverter. The inputs tolerate voltages up to 7 V, allowing the interface
of 5 V systems to 3 V systems.
The MC74LVX14 is pin and functionally compatible to the
MC74LVX04, but the inputs have hysteresis and, with its Schmitt
trigger function, can be used as a line receiver which will receive slow
input signals.
Features
•
•
•
•
•
•
•
•
•
•
High Speed: tPD = 6.8 ns (Typ) at VCC = 3.3 V
Low Power Dissipation: ICC = 2 mA (Max) at TA = 25°C
Powerdown Protection Provided on Inputs
Balanced Propagation Delays
Low Noise: VOLP = 0.5 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance: Human Body Model > 2000 V;
Machine Model > 200 V
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These Devices are Pb−Free and are RoHS Compliant
A0
A1
A2
A3
1
2
3
4
5
6
9
8
11
10
13
12
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SOIC−14 NB
D SUFFIX
CASE 751A
TSSOP−14
DT SUFFIX
CASE 948G
PIN ASSIGNMENT
VCC
14
A5
13
O5
12
A4
11
O4
10
1
2
3
4
5
A0
O0
A1
O1
A2
A3
9
O3
8
6
7
O2 GND
14−Lead (Top View)
MARKING DIAGRAMS
14
O0
LVX14G
AWLYWW
O1
1
O2
SOIC−14 NB
O3
14
A4
A5
LVX
14
ALYWG
G
O4
O5
1
Figure 1. Logic Diagram
TSSOP−14
PIN NAMES
Pins
Function
An
On
Data Inputs
Data Outputs
LVX14
A
WL, L
Y
WW, W
G or G
FUNCTION TABLE
(Note: Microdot may be in either location)
An
On
L
H
H
L
© Semiconductor Components Industries, LLC, 2014
August, 2014 − Rev. 7
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
1
Publication Order Number:
MC74LVX14/D
MC74LVX14
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage
–0.5 to +7.0
V
Vin
DC Input Voltage
–0.5 to +7.0
V
Vout
DC Output Voltage
–0.5 to VCC +0.5
V
IIK
Input Diode Current
−20
mA
IOK
Output Diode Current
±20
mA
Iout
DC Output Current, per Pin
±25
mA
ICC
DC Supply Current, VCC and GND Pins
±50
mA
PD
Power Dissipation
180
mW
Tstg
Storage Temperature
–65 to +150
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VCC
DC Supply Voltage
Vin
DC Input Voltage
Vout
DC Output Voltage
TA
Operating Temperature, All Package Types
Min
Max
Unit
2.0
3.6
V
0
5.5
V
0
VCC
V
−40
+85
°C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Test Conditions
VCC
V
TA = 25°C
Min
VT+
Positive Threshold Voltage (Figure 4)
3.0
VT−
Negative Threshold Voltage (Figure 4)
3.0
0.90
VH
Hysteresis Voltage (Figure 4)
3.0
0.30
1.9
2.9
2.58
VOH
High−Level Output Voltage
(Vin = VIH or VIL)
IOH = −50 mA
IOH = −50 mA
IOH = −4 mA
2.0
3.0
3.0
VOL
Low−Level Output Voltage
(Vin = VIH or VIL)
IOL = 50 mA
IOL = 50 mA
IOL = 4 mA
2.0
3.0
3.0
Iin
Input Leakage Current
Vin = 5.5 V or GND
ICC
Quiescent Supply Current
Vin = VCC or GND
Typ
TA = −40 to 85°C
Max
Min
2.20
Max
Unit
2.20
V
0.90
1.20
2.0
3.0
0.0
0.0
0.30
V
1.20
1.9
2.9
2.48
V
V
0.1
0.1
0.36
0.1
0.1
0.44
V
3.6
±0.1
±1.0
mA
3.6
2.0
20.0
mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns)
TA = 25°C
Symbol
Parameter
tPLH,
tPHL
Propagation Delay, Input−to−Output
tOSHL
tOSLH
Output−to−Output Skew (Note 1)
Typ
Max
Min
Max
Unit
VCC = 2.7 V
CL = 15 pF
CL = 50 pF
8.7
11.2
16.3
19.8
1.0
1.0
19.5
23.0
ns
VCC = 3.3 ± 0.3 V
CL = 15 pF
CL = 50 pF
6.8
9.3
10.6
14.1
1.0
1.0
12.5
16.0
VCC = 2.7 V
VCC = 3.3 ± 0.3 V
CL = 50 pF
CL = 50 pF
Test Conditions
Min
TA = −40 to 85°C
1.5
1.5
1.5
1.5
ns
1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (tOSHL) or LOW−to−HIGH (tOSLH); parameter
guaranteed by design.
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2
MC74LVX14
CAPACITIVE CHARACTERISTICS
TA = 25°C
Typ
Max
Cin
Input Capacitance
4
10
CPD
Power Dissipation Capacitance (Note 2)
21
Symbol
Min
TA = −40 to 85°C
Parameter
Min
Max
Unit
10
pF
pF
2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC / 6 (per buffer). CPD is used to determine the
no−load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC.
NOISE CHARACTERISTICS (Input tr = tf = 3.0 ns, CL = 50 pF, VCC = 3.3 V, Measured in SOIC Package)
TA = 25°C
Symbol
Characteristic
Typ
Max
Unit
VOLP
Quiet Output Maximum Dynamic VOL
0.3
0.5
V
VOLV
Quiet Output Minimum Dynamic VOL
−0.3
−0.5
V
VIHD
Minimum High Level Dynamic Input Voltage
2.0
V
VILD
Maximum Low Level Dynamic Input Voltage
0.9
V
TEST POINT
VCC
A
OUTPUT
50%
DEVICE
UNDER
TEST
GND
tPLH
O
tPHL
CL*
50% VCC
*Includes all probe and jig capacitance
Figure 2. Switching Waveforms
Figure 3. Test Circuit
ORDERING INFORMATION
Package
Shipping†
SOIC−14 NB
(Pb−Free)
2500 Tape & Reel
MC74LVX14DTR2G
TSSOP−14
(Pb−Free)
2500 Tape & Reel
NLV74LVX14DTR2G*
TSSOP−14
(Pb−Free)
2500 Tape & Reel
Device
MC74LVX14DR2G
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
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3
VT , TYPICAL INPUT THRESHOLD VOLTAGE (VOLTS)
MC74LVX14
4
3
(VT+)
2
VHtyp
(VT-)
1
2.5
2
3.5
3
3.6
VCC, POWER SUPPLY VOLTAGE (VOLTS) VHtyp = (VT+ typ) - (VT- typ)
Figure 4. Typical Input Threshold, VT+, VT− versus Power Supply Voltage
VCC
VH
VT+
VT-
Vin
GND
VOH
Vout
VOL
(a) A Schmitt-Trigger Squares Up Inputs With Slow Rise and Fall Times
VCC
VH
VT+
VT-
Vin
GND
VOH
Vout
VOL
(b) A Schmitt-Trigger Offers Maximum Noise Immunity
Figure 5. Typical Schmitt−Trigger Applications
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4
MC74LVX14
PACKAGE DIMENSIONS
TSSOP−14
CASE 948G
ISSUE B
14X K REF
0.10 (0.004)
0.15 (0.006) T U
M
T U
V
S
S
S
N
2X
14
L/2
0.25 (0.010)
8
M
B
−U−
L
PIN 1
IDENT.
F
7
1
0.15 (0.006) T U
N
S
DETAIL E
ÇÇÇ
ÉÉÉ
ÇÇÇ
ÉÉÉ
ÇÇÇ
K
A
−V−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
K1
J J1
SECTION N−N
−W−
C
0.10 (0.004)
−T− SEATING
PLANE
D
H
G
DETAIL E
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
MILLIMETERS
INCHES
MIN
MAX
MIN MAX
4.90
5.10 0.193 0.200
4.30
4.50 0.169 0.177
−−−
1.20
−−− 0.047
0.05
0.15 0.002 0.006
0.50
0.75 0.020 0.030
0.65 BSC
0.026 BSC
0.50
0.60 0.020 0.024
0.09
0.20 0.004 0.008
0.09
0.16 0.004 0.006
0.19
0.30 0.007 0.012
0.19
0.25 0.007 0.010
6.40 BSC
0.252 BSC
0_
8_
0_
8_
SOLDERING FOOTPRINT*
7.06
1
0.65
PITCH
14X
0.36
14X
1.26
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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5
MC74LVX14
PACKAGE DIMENSIONS
D
SOIC−14 NB
CASE 751A−03
ISSUE K
A
B
14
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF AT
MAXIMUM MATERIAL CONDITION.
4. DIMENSIONS D AND E DO NOT INCLUDE
MOLD PROTRUSIONS.
5. MAXIMUM MOLD PROTRUSION 0.15 PER
SIDE.
8
A3
E
H
L
1
0.25
M
DETAIL A
7
B
13X
M
b
0.25
M
C A
S
B
S
e
DETAIL A
h
A
X 45 _
M
A1
C
SEATING
PLANE
DIM
A
A1
A3
b
D
E
e
H
h
L
M
MILLIMETERS
MIN
MAX
1.35
1.75
0.10
0.25
0.19
0.25
0.35
0.49
8.55
8.75
3.80
4.00
1.27 BSC
5.80
6.20
0.25
0.50
0.40
1.25
0_
7_
INCHES
MIN
MAX
0.054 0.068
0.004 0.010
0.008 0.010
0.014 0.019
0.337 0.344
0.150 0.157
0.050 BSC
0.228 0.244
0.010 0.019
0.016 0.049
0_
7_
SOLDERING FOOTPRINT*
6.50
14X
1.18
1
1.27
PITCH
14X
0.58
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and the
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Sales Representative
MC74LVX14/D
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