Rohm BD750L2EFJ-CE2 Ultra low quiescent current ldo regulator Datasheet

Datasheet
Single-Output LDO Regulators
Ultra Low Quiescent Current LDO
Regulator
BD7xxL2EFJ/FP/FP2/FP3-C
●General Description
The BD7xxL2EFJ/FP/FP2/FP3-C are low quiescent
regulators featuring 50V absolute maximum voltage,
and output voltage accuracy of ±2%, 200mA output
current and 6μA (Typ.) current consumption. There
regulators are therefore ideal for applications
requiring a direct connection to the battery and a
low current consumption. Ceramic capacitors can
be used for compensation of the output capacitor
phase. Furthermore, these ICs also feature
overcurrent protection to protect the device from
damage caused by short-circuiting and an
integrated thermal shutdown to protect the device
from overheating at overload conditions.
●Key specification
 Ultra low quiescent current:
 Output voltage:
 Output current capability:
 High output voltage accuracy:
 Low ESR ceramic capacitor
can be used as output capacitor
●Packages
 EFJ: HTSOP-J8
●Features

Ultra low quiescent current: 6μA (Typ.)

Output current capability: 200mA

Output voltage: 3.3 V or 5.0 V(Typ.)

High output voltage accuracy: ±2%

Low saturation voltage by using PMOS output
transistor.

Integrated overcurrent protection to protect the
IC from damage caused by output
short-circuiting.

Integrated thermal shutdown to protect the IC
from overheating at overload conditions.

Low ESR ceramic capacitor can be used as
output capacitor.

HTSOP-J8, TO252-3, TO263-3F, SOT223-4F
4type package

FP: TO252-3

FP2: TO263-3F

FP3: SOT223-4F
6μA (Typ.)
3.3 V or 5.0 V (Typ.)
200mA
±2%
W (Typ.) x D (Typ.) x H (Max.)
4.90mm x 6.00mm x 1.00mm
6.50mm x 9.50mm x 2.50mm
10.16mm x 15.10mm x 4.70mm
6.53mm x 7.00mm x 1.80mm
Figure 1. Package Outlook
●Applications

Automotive (body, audio system, navigation system, etc.)
●Typical Application Circuits
 Components externally connected: 0.1 µF ≤ CIN, 4.7 µF ≤ COUT (Typ.)
*Electrolytic, tantalum and ceramic capacitors can be used.
FIN
BD7xxL2FP-C
1:VCC
HTSOP-J8
2:N.C.
3:VOUT
TO252-3
TO263-3F
SOT223-4F
Figure 2. Typical Application Circuits
○Product structure:Silicon monolithic integrated circuit
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Datasheet
BD7xxL2EFJ/FP/FP2/FP3-C
●Ordering Information
B
D
7
x
x
L
2
E
Output Voltage
33: 3.3V
50: 5.0V
F
J
Package
EFJ: HTSOP-J8
FP: TO252-3
FP2: TO263-3F
FP3: SOT223-4F
-
C
E
2
Taping
E2: reel-wound
embossed tamping
●Lineup
Output current
ability
Output voltage
(Typ.)
Package type
Orderable Part Number
HTSOP-J8
BD733L2EFJ-CE2
TO252-3
BD733L2FP-CE2
TO263-3F
BD733L2FP2-CE2
SOT223-4F
BD733L2FP3-CE2
HTSOP-J8
BD750L2EFJ-CE2
TO252-3
BD750L2FP-CE2
TO263-3F
BD750L2FP2-CE2
SOT223-4F
BD750L2FP3-CE2
3.3 V
200 mA
5.0 V
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Datasheet
BD7xxL2EFJ/FP/FP2/FP3-C
●Pin Configuration
TO252-3
(TOP VIEW)
HTSOP-J8
(TOP VIEW)
8
7
6
TO263-3F
(TOP VIEW)
SOT223-4F
(TOP VIEW)
5
FIN
1
2
3
4
1
2
3
1
2
1
3
2
3
Figure 3. Pin Configuration
●Pin Description
■TO252-3, TO263-3F, SOT223-4F
■HTSOP-J8
Pin No.
Pin Name
Function
Pin No.
Pin Name
Function
1
VOUT
Output pin
1
VCC
Supply voltage input pin
2
N.C.
Not connected
2
N.C./GND
TO252-3: N.C.
TO263-3F, SOT223-4F: GND
3
N.C.
Not connected
3
VOUT
Output pin
4
N.C.
Not connected
FIN
GND
GND
5
GND
GND
6
N.C.
Not connected
7
N.C.
Not connected
8
VCC
Supply voltage input pin
(※N.C. terminals are not need to connect to GND.)
(※N.C. terminals are not need to connect to GND.
(※Exposed die pad is need to be connected to GND.)
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Datasheet
BD7xxL2EFJ/FP/FP2/FP3-C
●Block Diagram
■HTSOP-J8
■TO252-3, TO263-3F, SOT223-4F
Figure 4. Block Diagram
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Datasheet
BD7xxL2EFJ/FP/FP2/FP3-C
●Absolute Maximum Ratings(Ta=25°C)
Parameter
Symbol
Ratings
Unit
*1
VCC
-0.3 to +50.0
V
HTSOP-J8
*2
Pd
0.75
W
TO252-3
*2
Pd
1.3
W
TO263-3F
*2
Pd
1.9
W
SOT223-4F
*2
Pd
0.6
W
Operating Temperature Range
Topr
-40 to +125
°C
Storage Temperature Range
Tstg
-55 to +150
°C
Tjmax
150
°C
Supply Voltage
Power Dissipation
Maximum Junction Temperature
*1 Pd should not be exceeded.
*2 HTSOP-J8 mounted on 114.3 mm x 76.2 mm x 1.6 mmt Glass-Epoxy PCB based on JEDEC. If Ta ≧25 °C, reduce by 6.0 mW/°C.
(1-layer PCB: Copper foil area on the reverse side of PCB: 0 mm x 0 mm)
TO252-3 mounted on 114.3 mm x 76.2 mm x 1.6 mmt Glass-Epoxy PCB based on JEDEC. If Ta ≧25 °C, reduce by 10.4 mW/°C.
(1-layer PCB: Copper foil area on the reverse side of PCB: 0 mm x 0 mm)
TO263-3F mounted on 114.3 mm x 76.2 mm x 1.6 mmt Glass-Epoxy PCB based on JEDEC. If Ta ≧25 °C, reduce by 15.3mW/°C.
(1-layer PCB: Copper foil area on the reverse side of PCB:0 mm x 0 mm)
SOT223-4F mounted on 114.3 mm x 76.2 mm x 1.6 mmt Glass-Epoxy PCB based on JEDEC. If Ta ≧25 °C, reduce by 4.8 mW/°C.
(1-layer PCB: Copper foil area on the reverse side of PCB: 0 mm x 0 mm)
●Operating Conditions(-40 < Ta < +125°C)
■BD733L2EFJ/FP/FP2/FP3-C
Parameter
Symbol
Min.
Max.
Unit
Supply Voltage
*3
VCC
4.37
45.0
V
Startup Voltage
*4
VCC
3.0
-
V
IOUT
0
200
mA
Symbol
Min.
Max.
Unit
Output Current
■BD750L2EFJ/FP/FP2/FP3-C
Parameter
Supply Voltage
*3
VCC
5.8
45.0
V
Startup Voltage
*4
VCC
3.0
-
V
IOUT
0
200
mA
Output Current
*3 For output voltage, refer to the dropout voltage corresponding to the output current.
*4 When IOUT=0mA.
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Datasheet
BD7xxL2EFJ/FP/FP2/FP3-C
●Thermal Resistance
Parameter
Symbol
Min.
Max.
Unit
HTSOP-J8 Package
Junction to Ambient
*5
θja
43.1
-
°C/W
Junction to Case (bottom)
*5
θjc
10
-
°C/W
Junction to Ambient
*6
θja
24.5
-
°C/W
Junction to Case (bottom)
*6
θjc
3
-
°C/W
Junction to Ambient
*7
θja
15.6
-
°C/W
Junction to Case (bottom)
*7
θjc
3
-
°C/W
Junction to Ambient
*8
θja
83.3
-
°C/W
Junction to Case (bottom)
*8
θjc
17
-
°C/W
TO252-3 Package
TO263-3F Package
SOT223-4F Package
*5
HTSOP-J8 mounted on 114.3 mm x 76.2 mm x 1.6 mmt Glass-Epoxy PCB based on JEDEC.
(4-layer PCB: Copper foil on the reverse side of PCB: 74.2 mm x 74.2 mm)
*6
TO252-3 mounted on 114.3 mm x 76.2 mm x 1.6 mmt Glass-Epoxy PCB based on JEDEC.
(4-layer PCB: Copper foil on the reverse side of PCB: 74.2 mm x 74.2 mm)
*7
TO263-3F mounted on 114.3 mm x 76.2 mm x 1.6 mmt Glass-Epoxy PCB based on JEDEC.
(4-layer PCB: Copper foil on the reverse side of PCB: 74.2 mm x 74.2 mm)
*8
SOT223-4F mounted on 114.3 mm x 76.2 mm x 1.6 mmt Glass-Epoxy PCB based on JEDEC.
(4-layer PCB: Copper foil on the reverse side of PCB: 74.2 mm x 74.2 mm)
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Datasheet
BD7xxL2EFJ/FP/FP2/FP3-C
●Electrical Characteristics (BD733L2EFJ/FP/FP2/FP3-C)
(Unless otherwise specified, -40 < Ta < +125°C, VCC=13.5V, IOUT=0mA, Reference value: Ta=25°C)
Limit
Parameter
Symbol
Unit
Conditions
Min.
Typ.
Max.
Ib
-
6
15
μA
Output voltage
VOUT
3.23
3.30
3.37
V
8V < VCC < 16V
0mA < IOUT < 100mA
Dropout voltage
ΔVd
-
0.6
1.0
V
VCC=VOUT×0.95, IOUT=200mA
Ripple rejection
R.R.
50
63
-
dB
f=120Hz, ein=1Vrms,
IOUT=100mA
Line regulation
Reg I
-
5
20
mV
8V < VCC < 16V
Load regulation
Reg L
-
5
20
mV
10mA < IOUT < 200mA
Bias current
●Electrical Characteristics (BD750L2EFJ/FP/FP2/FP3-C)
(Unless otherwise specified, -40 < Ta < +125°C, VCC=13.5V, IOUT=0mA, Reference value: Ta=25°C)
Limit
Parameter
Unit
Symbol
Conditions
Min.
Typ.
Max.
Ib
-
6
15
μA
Output voltage
VOUT
4.9
5.0
5.1
V
8V < VCC < 16V
0mA < IOUT < 100mA
Dropout voltage
ΔVd
-
0.4
0.7
V
VCC=VOUT×0.95, IOUT=200mA
Ripple rejection
R.R.
50
60
-
dB
f=120Hz, ein=1Vrms,
IOUT=100mA
Line regulation
Reg I
-
5
20
mV
8V < VCC < 16V
Load regulation
Reg L
-
5
20
mV
10mA < IOUT < 200mA
Bias current
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Datasheet
BD7xxL2EFJ/FP/FP2/FP3-C
●Typical Performance Curves
■BD733L2EFJ/FP/FP2/FP3-C Reference data
Unless otherwise specified: -40 < Ta < +125°C, VCC=13.5V, IOUT=0mA
6
100
90
-40℃
25℃
125℃
OUTPUT VOLTAGE : VOUT[V]
BIAS CURRENT : lb[μA]
80
-40°C
25°C
125°C
5
70
60
50
40
30
20
4
3
2
1
10
0
0
0
10
20
30
40
0
50
20
30
40
SUPPLY VOLTAGE : VCC[V]
SUPPLY VOLTAGE : VCC[V]
Figure 5. Bias current
Figure 6. Output voltage vs. Supply voltage
IOUT=10mA
6
50
6
-40°C
25°C
125°C
5
OUTPUT VOLTAGE : VOUT[V]
OUTPUT VOLTAGE : VOUT[V]
10
4
3
2
4
3
2
1
1
0
0
0
10
20
30
40
-40°C
25°C
125°C
5
0
50
200
400
600
800
SUPPLY VOLTAGE : VCC[V]
OUTPUT CURRENT : IOUT[mA]
Figure 7. Output voltage vs. Supply voltage
IOUT=100mA
Figure 8. Output voltage vs. Load
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Datasheet
BD7xxL2EFJ/FP/FP2/FP3-C
■BD733L2EFJ/FP/FP2/FP3-C Reference data
Unless otherwise specified: -40 < Ta < +125°C, VCC=13.5V, IOUT=0mA
90
1.2
80
RIPPLE REJECTION : R.R.[dB]
DROPOUT : △Vd[V]
-40°C
25°C
125°C
0.8
0.4
-40°C
25°C
125°C
70
60
50
40
30
20
10
0
0.0
0
40
80
120
160
10
200
100
10000
100000
FREQUENCY : f[Hz]
OUTPUT CURRENT : IOUT[mA]
Figure 10. Ripple rejection
(ein=1Vrms,IOUT=100mA)
Figure 9. Dropout voltage
6
20
18
OUTPUT VOLTAGE : VOUT[V]
-40℃
25℃
125℃
16
BIAS CURRENT : lb[μA]
1000
14
12
10
8
6
4
5
4
3
2
1
2
0
0
0
40
80
120
160
200
100
120
140
160
180
OUTPUT CURRENT : IOUT[mA]
AMBIENT TEMPERATURE : Ta[℃]
Figure 11. Total supply current vs. Load
Figure 12. Thermal shutdown
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Datasheet
BD7xxL2EFJ/FP/FP2/FP3-C
■BD733L2EFJ/FP/FP2/FP3-C Reference data
Unless otherwise specified: -40 < Ta < +125°C, VCC=13.5V, IOUT=0mA
3.315
10
9
BIAS CURRENT : lb[μA]
OUTPUT VOLTAGE : VOUT[V]
3.310
3.305
3.300
3.295
3.290
8
7
6
5
3.285
3.280
4
-40
0
40
80
120
AMBIENT TEMPERATURE : Ta[℃]
0
40
80
120
AMBIENT TEMPERATURE : Ta[℃]
Figure 13. Output voltage vs. temperature
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Figure 14. Quiescent current vs. temperature
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Datasheet
BD7xxL2EFJ/FP/FP2/FP3-C
■BD750L2EFJ/FP/FP2/FP3-C Reference data
Unless otherwise specified: -40 < Ta < +125°C, VCC=13.5V, IOUT=0mA
100
8
90
-40℃
25℃
125℃
OUTPUT VOLTAGE : VOUT[V]
BIAS CURRENT : lb[μA] .
80
-40°C
25°C
125°C
7
70
60
50
40
30
20
6
5
4
3
2
1
10
0
0
0
10
20
30
40
0
50
20
30
40
50
SUPPLY VOLTAGE : VCC[V]
SUPPLY VOLTAGE : VCC[V]
Figure 15. Bias current
Figure 16. Output voltage vs. Supply voltage
8
8
7
7
-40°C
25°C
125°C
6
OUTPUT VOLTAGE : VOUT[V]
OUTPUT VOLTAGE : VOUT[V]
10
5
4
3
2
6
5
4
3
2
1
1
0
0
0
10
20
30
40
50
0
200
400
600
800
1000
OUTPUT CURRENT : IOUT[mA]
SUPPLY VOLTAGE : VCC[V]
Figure 17. Output voltage vs. Supply voltage
IOUT=100mA
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-40°C
25°C
125°C
Figure 18. Output voltage vs. Load
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Datasheet
BD7xxL2EFJ/FP/FP2/FP3-C
■BD750L2EFJ/FP/FP2/FP3-C Reference data
Unless otherwise specified: -40 < Ta < +125°C, VCC=13.5V, IOUT=0mA
90
-40°C
25°C
125°C
80
-40°C
25°C
125°C
RIPPLE REJECTION : R.R.[dB]
DROPOUT VOLTAGE : △Vd[V]
1.2
0.8
0.4
70
60
50
40
30
20
10
0.0
0
0
40
80
120
160
200
10
100
OUTPUT CURRENT : IOUT[mA]
10000
100000
FREQUENCY : f[Hz]
Figure 19. Dropout voltage
Figure 20. Ripple rejection
(ein=1Vrms,IOUT=100mA)
20
6
18
OUTPUT VOLTAGE : VOUT[V]
-40℃
25℃
125℃
16
BIAS CURRENT : lb[μA] .
1000
14
12
10
8
6
4
5
4
3
2
1
2
0
0
0
40
80
120
160
200
100
120
140
160
180
OUTPUT CURRENT : IOUT[mA]
AMBIENT TEMPERATURE : Ta[℃]
Figure 21. Total supply current vs. Load
Figure 22. Thermal shutdown
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Datasheet
BD7xxL2EFJ/FP/FP2/FP3-C
■BD750L2EFJ/FP/FP2/FP3-C Reference data
Unless otherwise specified: -40 < Ta < +125°C, VCC=13.5V, IOUT=0mA
10
5.020
9
5.010
BIAS CURRENT : lb[μA]
OUTPUT VOLTAGE : VOUT[V]
5.015
5.005
5.000
4.995
4.990
4.985
4.980
8
7
6
5
4.975
4
4.970
-40
0
40
80
120
0
40
80
120
AMBIENT TEMPERATURE : Ta[℃]
AMBIENT TEMPERATURE : Ta[℃]
Figure 24. Bias current vs. temperature
Figure 23. Output voltage vs. temperature
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Datasheet
BD7xxL2EFJ/FP/FP2/FP3-C
●Reference data (BD7xxL2EFJ-C Series)
HTSOP-J8
8:VCC 7:N.C. 6:N.C. 5:GND
1µF
8:VCC 7:N.C. 6:N.C. 5:GND
BD7xxL2EFJ-C
1µF
1:VOUT 2:N.C. 3:N.C. 4:N.C.
BD7xxL2EFJ-C
1:VOUT 2:N.C. 3:N.C. 4:N.C.
4.7µF
4.7µF
Measurement setup for Figure 5, 14, 15, 24
Measurement setup for
Figure 6, 7, 12, 13, 16, 17, 22, 23
IOUT
Measurement setup for Figure 8, 18
8:VCC 7:N.C. 6:N.C. 5:GND
1Vrms
1µF
BD7xxL2EFJ-C
1:VOUT 2:N.C. 3:N.C. 4:N.C.
4.7µF
Measurement setup for Figure 9, 19
●Reference data (BD7xxL2FP-C Series)
Measurement setup for Figure 5, 14, 15, 24
Measurement setup for Figure 9, 19
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IOUT
Measurement setup for Figure 10, 20
Measurement setup for Figure 11, 21
TO252-3
Measurement setup for
Figure 6, 7, 12, 13, 16, 17, 22, 23
Measurement setup for Figure 8, 18
Measurement setup for Figure 10, 20
Measurement setup for Figure 11, 21
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Datasheet
BD7xxL2EFJ/FP/FP2/FP3-C
●Reference data (BD7xxL2FP2-C Series) TO263-3F
Measurement setup for Figure 5, 14, 15, 24
Measurement setup for Figure 9, 19
Measurement setup for
Figure 6, 7, 12, 13, 16, 17, 22, 23
Measurement setup for Figure 8, 18
Measurement setup for Figure 10, 20
Measurement setup for Figure 11, 21
●Reference data (BD7xxL2FP3-C Series) SOT223-4F
Measurement setup for Figure 5, 14, 15, 24
Measurement setup for Figure 9, 19
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Measurement setup for
Figure 6, 7, 12, 13, 16, 17, 22, 23
Measurement setup for Figure 8, 18
Measurement setup for Figure 10, 20
Measurement setup for Figure 11, 21
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Datasheet
BD7xxL2EFJ/FP/FP2/FP3-C
●Selection of Components Externally Connected
・VCC pin
Insert capacitors with a capacitance of 0.1μF or higher between the VCC and GND pin. Choose the capacitance
according to the line between the power smoothing circuit and the VCC pin. Selection of the capacitance also
depends on the application. Verify the application and allow for sufficient margins in the design. We recommend
using a capacitor with excellent voltage and temperature characteristics.
・Output pin capacitor
In order to prevent oscillation, a capacitor needs to be placed between the output pin and GND pin. We recommend
using a capacitor with a capacitance of 4.7μF or higher. Electrolytic, tantalum and ceramic capacitors can be used.
When selecting the capacitor ensure that the capacitance of 4.7μF or higher is maintained at the intended applied
voltage and temperature range. Due to changes in temperature the capacitor’s capacitance can fluctuate possibly
resulting in oscillation. For selection of the capacitor refer to the IOUT vs. ESR data. The stable operation range
given in the reference data is based on the standalone IC and resistive load. For actual applications the stable
operating range is influenced by the PCB impedance, input supply impedance and load impedance. Therefore
verification of the final operating environment is needed.
When selecting a ceramic type capacitor, we recommend using X5R, X7R or better with excellent temperature and
DC-biasing characteristics and high voltage tolerance.
Also, in case of rapidly changing input voltage and load current, select the capacitance in accordance with verifying
that the actual application meets with the required specification.
●Measurement setup
8:VCC
CIN
7:N.C.
6:N.C.
5:GND
BD7xxL2EFJ-C
1:VOUT 2:N.C.
3:N.C.
4:N.C.
ESR
IOUT
COUT
HTSOP-J8
TO252-3
TO263-3F
○Condition
VCC=13.5V
CIN=0.1μF
4.7µF < COUT < 22µF
Ta=-40 < Ta < +125℃
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SOT223-4F
○Condition
VCC=13.5V
CIN=0.1µF
4.7µF < COUT < 100µF
Ta=-40 < Ta < +125℃
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14.Mar.2013 Rev.003
Datasheet
BD7xxL2EFJ/FP/FP2/FP3-C
●Power Dissipation
■HTSOP-J8
IC mounted on ROHM standard board based on JEDEC.
Board material: FR4
Board size: 114.3 mm × 76.2 mm × 1.6 mmt
(with thermal via on the board)
Mount condition: PCB and exposed pad are soldered.
Top copper foil: The footprint ROHM recommend.
+ wiring to measure.
5
Power Dissipation: Pd[W]
4
②2.9 W
3
①: 1-layer PCB
(Copper foil area on the reverse side of PCB: 0 mm × 0 mm)
②: 4-layer PCB
(2 inner layers and copper foil area on the reverse side of PCB:
74.2 mm × 74.2 mm)
2
①0.75 W
1
0
0
25
50
75
100
125
150
Ambient Temperature: Ta[˚С]
Condition①: θja = 166.7 °C/W, θjc(top) = 45 °C/W
Condition②: θja = 43.1 °C/W, θjc(top) = 16 °C/W,
θjc(bottom) = 10 °C/W
Figure 25. Package Data
(HTSOP-J8)
■TO252-3
IC mounted on ROHM standard board based on JEDEC.
Board material: FR4
Board size: 114.3 mm × 76.2 mm × 1.6 mmt
(with thermal via on the board)
Mount condition: PCB and exposed pad are soldered.
Top copper foil: The footprint ROHM recommend.
+ wiring to measure.
6
②5.1 W
Power Dissipation: Pd[W]
5
4
3
①: 1-layer PCB
(Copper foil area on the reverse side of PCB: 0 mm × 0 mm)
②: 4-layer PCB
(2 inner layers and copper foil area on the reverse side of PCB:
74.2mm × 74.2 mm)
2
①1.3 W
1
0
0
25
50
75
100
125
Ambient Temperature: Ta[°C]
150
Condition①: θja = 96.2 °C/W, θjc(top) = 22 °C/W
Condition②: θja = 24.5 °C/W, θjc(top) = 5 °C/W,
θjc(bottom) = 3 °C/W
Figure 26. Package Data
(TO252-3)
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Datasheet
BD7xxL2EFJ/FP/FP2/FP3-C
■TO263-3F
IC mounted on ROHM standard board based on JEDEC.
Board material: FR4
Board size: 114.3 mm × 76.2 mm × 1.6 mmt
(with thermal via on the board)
Mount condition: PCB and exposed pad are soldered.
Top copper foil: The footprint ROHM recommend.
+ wiring to measure.
10
②8.0 W
Power Dissipation: Pd[W]
8
6
①: 1-layer PCB
(Copper foil area on the reverse side of PCB: 0 mm × 0 mm)
②: 4-layer PCB
(2 inner layers and copper foil area on the reverse side of PCB:
74.2mm × 74.2 mm)
4
①1.9 W
2
0
0
25
50
75
100
125
150
Ambient Temperature: Ta[°C]
Condition①: θja = 65.2 °C/W, θjc(top) = 19 °C/W
Condition②: θja = 15.6 °C/W, θjc(top) = 16 °C/W,
θjc(bottom) = 3 °C/W
Figure 27. Package Data
(TO263-3F)
■SOT223-4F
IC mounted on ROHM standard board based on JEDEC.
Board material: FR4
Board size: 114.3 mm × 76.2 mm × 1.6 mmt
(with thermal via on the board)
Mount condition: PCB and exposed pad are soldered.
Top copper foil: The footprint ROHM recommend.
+ wiring to measure.
5
Power Dissipation: Pd[W]
4
3
2
②1.5 W
1
①0.6 W
①: 1-layer PCB
(Copper foil area on the reverse side of PCB: 0 mm × 0 mm)
②: 4-layer PCB
(2 inner layers and copper foil area on the reverse side of PCB:
74.2mm × 74.2 mm)
0
0
25
50
75
100
125
Ambient Temperature: Ta[°C]
150
Condition①: θja = 208.3 °C/W, θjc(top) = 52 °C/W
Condition②: θja = 83.3 °C/W, θjc(top) = 36 °C/W,
θjc(bottom) = 17 °C/W
Figure 28. Package Data
(SOT223-4F)
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Datasheet
BD7xxL2EFJ/FP/FP2/FP3-C
Refer to the heat mitigation characteristics illustrated in Figure 25 to Figure 28 when using the IC in an environment of Ta≧25°C.
The characteristics of the IC are greatly influenced by the operating temperature, and it is necessary to operate under the
maximum junction temperature Timax.
Even if the ambient temperature Ta is at 25°C it is possible that the junction temperature Tj reaches high temperatures.
Therefore, the IC should be operated within the power dissipation range.
The following method is used to calculate the power consumption Pc (W)
Pc=(VCC-VOUT)×IOUT+VCC×Ib
Power dissipation Pd≧Pc
VCC
VOUT
IOUT
Ib
Ishort
The load current Lo is obtained by operating the IC within the power dissipation range.
Pd-VCC×Ib
IOUT≦
: Input voltage
: Output voltage
: Load current
: Bias current
: Shorted current
VCC-VOUT
(Refer to Figure 11 and Figure 21 for the Ib)
Thus, the maximum load current IOUTmax for the applied voltage VCC can be calculated during the thermal design process.
●HTSOP-J8
■Calculation example 1) with Ta=125°C, VCC=13.5V, VOUT=3.3V
0.576-13.5×Ib
IOUT≦
10.2
IOUT≦56.4mA
θja=43.1°C/W → -23.2mW/°C
25°C=2.90W → 125°C=0.576W
(Ib: 6µA)
At Ta=125°C with Figure 25 ② condition, the calculation shows that ca 56.4mA of output current is possible at 10.2V potential
difference across input and output.
■Calculation example 2) with Ta=125°C, VCC=13.5V, VOUT=5.0V
0.576-13.5×Ib
IOUT≦
8.5
IOUT≦67.7mA
θja=43.1°C/W → -23.2mW/°C
25°C=2.90W → 125°C=0.576W
(Ib: 6µA)
At Ta=125°C with Figure 25 ② condition, the calculation shows that ca 67.7mA of output current is possible at 8.5V potential
difference across input and output.
The thermal calculation shown above should be taken into consideration during the thermal design in order to keep the whole
operating temperature range within the power dissipation range.
In the event of shorting (i.e. VOUT and GND pins are shorted) the power consumption Pc of the IC can be calculated as follows:
Pc=VCC×(Ib+Ishort)
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(Refer to Figure 8 and Figure 18 for the Ishort)
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BD7xxL2EFJ/FP/FP2/FP3-C
●TO252-3
■Calculation example 3) with Ta=125°C, VCC=13.5V, VOUT=3.3V
1.02-13.5×Ib
IOUT≦
10.2
IOUT≦100mA
θja=24.5°C/W → -40.8mW/°C
25°C=5.10W → 125°C=1.02W
(Ib: 6µA)
At Ta=125°C with Figure 26 ② condition, the calculation shows that ca 100mA of output current is possible at 10.2V potential
difference across input and output.
■Calculation example 4) with Ta=125°C, VCC=13.5V, VOUT=5.0V
1.02-13.5×Ib
IOUT≦
8.5
IOUT≦120mA
θja=24.5°C/W → -40.8mW/°C
25°C=5.10W → 125°C=1.02W
(Ib: 6µA)
At Ta=125°C with Figure 26 ② condition, the calculation shows that ca 120mA of output current is possible at 8.5V potential
difference across input and output.
The thermal calculation shown above should be taken into consideration during the thermal design in order to keep the whole
operating temperature range within the power dissipation range.
In the event of shorting (i.e. VOUT and GND pins are shorted) the power consumption Pc of the IC can be calculated as follows:
Pc=VCC×(Ib+Ishort)
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(Refer to Figure 8 and Figure 18 for the Ishort)
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Datasheet
BD7xxL2EFJ/FP/FP2/FP3-C
●TO263-3F
■Calculation example 5) with Ta=125°C, VCC=13.5V, VOUT=3.3V
1.59-13.5×Ib
IOUT≦
10.2
IOUT≦156mA
θja=15.6°C/W → -64.1mW/°C
25°C=8.00W → 125°C=1.59W
(Ib: 6µA)
At Ta=125°C with Figure 27 ② condition, the calculation shows that ca 156mA of output current is possible at 10.2V potential
difference across input and output.
■Calculation example 6) with Ta=125°C, VCC=13.5V, VOUT=5.0V
1.59-13.5×Ib
IOUT≦
8.5
IOUT≦187mA
θja=15.6°C/W → -64.1mW/°C
25°C=8.00W → 125°C=1.59W
(Ib: 6µA)
At Ta=125°C with Figure 27 ② condition, the calculation shows that ca 187mA of output current is possible at 8.5V potential
difference across input and output.
The thermal calculation shown above should be taken into consideration during the thermal design in order to keep the whole
operating temperature range within the power dissipation range.
In the event of shorting (i.e. VOUT and GND pins are shorted) the power consumption Pc of the IC can be calculated as follows:
Pc=VCC×(Ib+Ishort)
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(Refer to Figure 8 and Figure 18 for the Ishort)
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Datasheet
BD7xxL2EFJ/FP/FP2/FP3-C
●SOT223-4F
■Calculation example 7) with Ta=125°C, VCC=13.5V, VOUT=3.3V
0.30-13.5×Ib
IOUT≦
10.2
IOUT≦29.4mA
θja=83.3°C/W → -12.0mW/°C
25°C=1.50W → 125°C=0.30W
(Ib: 6µA)
At Ta=125°C with Figure 28 ② condition, the calculation shows that ca 29.4mA of output current is possible at 10.2V potential
difference across input and output.
■Calculation example 8) with Ta=125°C, VCC=13.5V, VOUT=5.0V
0.30-13.5×Ib
IOUT≦
8.5
IOUT≦35.2mA
θja=83.3°C/W → -12.0mW/°C
25°C=1.50W → 125°C=0.30W
(Ib: 6µA)
At Ta=125°C with Figure 28 ② condition, the calculation shows that ca 35.2mA of output current is possible at 8.5V potential
difference across input and output.
The thermal calculation shown above should be taken into consideration during the thermal design in order to keep the whole
operating temperature range within the power dissipation range.
In the event of shorting (i.e. VOUT and GND pins are shorted) the power consumption Pc of the IC can be calculated as follows:
Pc=VCC×(Ib+Ishort)
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(Refer to Figure 8 and Figure 18 for the Ishort)
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Datasheet
BD7xxL2EFJ/FP/FP2/FP3-C
●Application Examples
・Applying positive surge to the VCC pin
If the possibility exists that surges higher than 50V will be applied to the VCC pin, a zenar diode should be placed
between the VCC pin and GND pin as shown in the figure below.
FIN
BD7xxL2FP2-C
1:VCC 2:GND 3:VOUT
CIN
HTSOP-J8
COUT
IOUT
TO263-3F
TO252-3
SOT223-4F
・Applying negative surge to the VCC pin
If the possibility exists that negative surges lower than the GND are applied to the VCC pin, a Shottky diode should be
place between the VCC pin and GND pin as shown in the figure below.
FIN
BD7xxL2FP2-C
1:VCC 2:GND 3:VOUT
CIN
HTSOP-J8
TO252-3
COUT
TO263-3F
IOUT
SOT223-4F
・Implementing a protection diode
If the possibility exists that a large inductive load is connected to the output pin resulting in back-EMF at time of startup
and shutdown, a protection diode should be placed as shown in the figure below.
VOUT
●I/O equivalence circuits
○Input terminal
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○Output terminal *inside of () shows 5V
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BD7xxL2EFJ/FP/FP2/FP3-C
●Operational Notes
1) Absolute maximum ratings
Exceeding the absolute maximum rating for supply voltage, operating temperature or other parameters can result in
damages to or destruction of the chip. In this event it also becomes impossible to determine the cause of the damage
(e.g. short circuit, open circuit, etc.). Therefore, if any special mode is being considered with values expected to exceed
the absolute maximum ratings, implementing physical safety measures, such as adding fuses, should be considered.
2) The electrical characteristics given in this specification may be influenced by conditions such as temperature, supply
voltage and external components. Transient characteristics should be sufficiently verified.
3) GND electric potential
Keep the GND pin potential at the lowest (minimum) level under any operating condition. Furthermore, ensure that,
including the transient, none of the pin’s voltages are less than the GND pin voltage.
4) GND wiring pattern
When both a small-signal GND and a high current GND are present, single-point grounding (at the set standard point) is
recommended. This in order to separate the small-signal and high current patterns and to ensure that voltage changes
stemming from the wiring resistance and high current do not cause any voltage change in the small-signal GND. Similarly,
care must be taken to avoid wiring pattern fluctuations in any connected external component GND.
5) Inter-pin shorting and mounting errors
Ensure that when mounting the IC on the PCB the direction and position are correct. Incorrect mounting may result in
damaging the IC. Also, shorts caused by dust entering between the output, input and GND pin may result in damaging
the IC.
6) Inspection using the set board
The IC needs to be discharged after each inspection process as, while using the set board for inspection, connecting a
capacitor to a low-impedance pin may cause stress to the IC. As a protection from static electricity, ensure that the
assembly setup is grounded and take sufficient caution with transportation and storage. Also, make sure to turn off the
power supply when connecting and disconnecting the inspection equipment.
7) Power dissipation (Pd)
Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in
deterioration of the properties of the chip. The absolute maximum rating of the Pd stated in this specification is when the
IC is mounted on a 70mm X 70mm X 1.6mm glass epoxy board. In case of exceeding this absolute maximum rating,
increase the board size and copper area to prevent exceeding the Pd rating.
8) Thermal design
The power dissipation under actual operating conditions should be taken into consideration and a sufficient margin
should be allowed for in the thermal design. On the reverse side of the package this product has an exposed heat pad for
improving the heat dissipation. Use both the front and reverse side of the PCB to increase the heat dissipation pattern as
far as possible. The amount of heat generated depends on the voltage difference across the input and output, load
current, and bias current. Therefore, when actually using the chip, ensure that the generated heat does not exceed the
Pd rating.
Tjmax: maximum junction temperature=150°C, Ta: ambient temperature (°C), θja: junction-to-ambient thermal
resistance (°C/W), Pd: power dissipation rating (W), Pc: power consumption (W), VCC: input voltage,
VOUT: output voltage, IOUT: load current, Ib: bias current
Power dissipation rating
Power consumption
Pd (W)=(Tjmax-Ta)/θja
Pc (W)=(VCC-VOUT)×IOUT+VCC×Ib
9) Rapid variation in VCC voltage and load current
In case of a rapidly changing input voltage, transients in the output voltage might occur due to the use of a MOSFET as
output transistor. Although the actual application might be the cause of the transients, the IC input voltage, output current
and temperature are also possible causes. In case problems arise within the actual operating range, use
countermeasures such as adjusting the output capacitance.
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Datasheet
BD7xxL2EFJ/FP/FP2/FP3-C
10) Minute variation in output voltage
In case of using an application susceptible to minute changes to the output voltage due to noise, changes in input and
load current, etc., use countermeasures such as implementing filters.
11) Overcurrent protection circuit
This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This protection
circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should not be used in
applications characterized by continuous operation or transitioning of the protection circuit.
12) Thermal shutdown (TSD)
This IC incorporates and integrated thermal shutdown circuit to prevent heat damage to the IC. Normal operation should
be within the power dissipation rating, if however the rating is exceeded for a continued period, the junction temperature
(Tj) will rise and the TSD circuit will be activated and turn all output pins OFF. After the Tj falls below the TSD threshold
the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from heat
damage.
13) In some applications, the VCC and pin potential might be reversed, possibly resulting in circuit internal damage or
damage to the elements. For example, while the external capacitor is charged, the VCC shorts to the GND. Use a
capacitor with a capacitance with less than 1000μF. We also recommend using reverse polarity diodes in series or a
bypass between all pins and the VCC pin.
14) This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P/N junctions are formed at the intersection of these P layers with the N layers of other elements to create a
variety of parasitic elements.
For example, in case a resistor and a transistor are connected to the pins as shown in the figure below then:
○ The P/N junction functions as a parasitic diode when GND > pin A for the resistor, or GND > pin B for the transistor.
○ Also, when GND > pin B for the transistor (NPN), the parasitic diode described above combines with the N layer of the
other adjacent elements to operate as a parasitic NPN transistor.
Parasitic diodes inevitably occur in the structure of the IC. Their operation can result in mutual interference between
circuits and can cause malfunctions and, in turn, physical damage to or destruction of the chip. Therefore do not employ
any method in which parasitic diodes can operate such as applying a voltage to an input pin that is lower than the
(P substrate) GND.
Figure 29. Example of the Parasitic Device Structures
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Datasheet
BD7xxL2EFJ/FP/FP2/FP3-C
●Physical Dimension, Tape and Reel Information
Package Name
HTSOP-J8
<Tape and Reel information>
Tape
Embossed carrier tape
Quantity
2500pcs
Direction
of feed
E2
The direction is the 1pin of product is at the upper left when you hold
( reel on the left hand and you pull out the tape on the right hand
Direction of feed
1pin
Reel
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)
∗ Order quantity needs to be multiple of the minimum quantity.
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Datasheet
BD7xxL2EFJ/FP/FP2/FP3-C
●Physical Dimension, Tape and Reel Information
Package Name
TO252-3
<Tape and Reel information>
Tape
Embossed carrier tape
Quantity
2000pcs
Direction
of feed
E2
The direction is the 1pin of product is at the lower left when you hold
( reel on the left hand and you pull out the tape on the right hand
Direction of feed
1pin
Reel
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)
∗ Order quantity needs to be multiple of the minimum quantity.
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Datasheet
BD7xxL2EFJ/FP/FP2/FP3-C
●Physical Dimension, Tape and Reel Information
Package Name
TO263-3F
Direction of Feed
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BD7xxL2EFJ/FP/FP2/FP3-C
●Physical Dimension, Tape and Reel Information
Package Name
SOT223-4F
Direction of Feed
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Datasheet
BD7xxL2EFJ/FP/FP2/FP3-C
●Marking Diagrams (TOP VIEW)
HTSOP-J8
TO252-3
TO252-3
(TOP VIEW)
HTSOP-J8 (TOP VIEW)
Part Number Marking
Part Number Marking
LOT Number
1PIN MARK
LOT Number
TO263-3F
SOT223-4F
SOT223-4F (TOP VIEW)
TO263-3F (TOP VIEW)
Part Number Marking
LOT Number
LOT Number
1PIN
Part Number
Marking
Output Voltage (V)
BD733L2
3.3
BD750L2
5.0
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Part Number Marking
1PIN
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Datasheet
BD7xxL2EFJ/FP/FP2/FP3-C
●Revision History
Date
Revision
21.Aug.2012
001
New Release
24.Sep.2012
002
New Release TO252-3 package.
003
Page 1.Series name is changed.
Page 6. Append Thermal Resistance θja, θjc.
Page 8. Figure 5, Page 9. Figure 11 All Quiescent current are integrated into Bias Current.
Page 10. Figure 14, Page 11. Figure 15 All Quiescent current are integrated into Bias Current.
Page 12. Figure 21, Page 13. Figure 24 All Quiescent current are integrated into Bias Current.
Page 17, 18. Figure 25, 26, 27, 28
Power Dissipation is changed to be compliant with JEDEC standard.
Page 19, 20. Calculation examples are changed.
Page 25. “Application example” is deleted.
Figure 29 “ Example of the Parasitic Device Structures” is renewed.
14.Mar.2013
Changes
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Notice
General Precaution
1. Before you use our Products, you are requested to carefully read this document and fully understand its contents.
ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this document is current as of the issuing date and subject to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales
representative.
Precaution on using ROHM Products
1.
If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment,
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Notice - Rev.004
© 2013 ROHM Co., Ltd. All rights reserved.
Datasheet
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the
ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since our Products might fall under controlled goods prescribed by the applicable foreign exchange and foreign trade act,
please consult with ROHM representative in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data. ROHM shall not be in any way responsible or liable
for infringement of any intellectual property rights or other damages arising from use of such information or data.:
2.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the information contained in this document.
Notice - Rev.004
© 2013 ROHM Co., Ltd. All rights reserved.
Datasheet
Other Precaution
1.
The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or
liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or
concerning such information.
2.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
3.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
4.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
5.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice - Rev.004
© 2013 ROHM Co., Ltd. All rights reserved.
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