LINER LTC2641 140v cmos rail-to-rail output, picoamp input current op amp Datasheet

LTC6090
140V CMOS Rail-to-Rail
Output, Picoamp Input
Current Op Amp
Description
Features
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Supply Range: ±4.75V to ±70V (140V)
0.1Hz to 10Hz Noise: 3.5μVP-P
Input Bias Current: 50pA
Low Offset Voltage: 1.6mV Maximum
Rail-to-Rail Output Stage
Output Sink and Source 10mA
10MHz Gain Bandwidth Product
19V/µs Slew Rate
11nV/√Hz Noise Density
Thermal Shutdown
Available in Thermally Enhanced SOIC-8E or
TSSOP-16E Packages
The LTC®6090 is a high voltage precision operational
amplifier. The low noise, low bias current input stage is
ideal for high gain configurations. The LTC6090 has low
input offset voltage, a rail-to-rail output stage, and can be
run from a single 140V or split ±70V supplies.
The LTC6090 is internally protected against overtemperature conditions. A thermal warning output, TFLAG, goes
active when the die temperature approaches 150°C. The
output stage can be turned off with the output disable pin
OD. By tying the OD pin to the thermal warning output,
the part will disable the output stage when it is out of the
safe operating area. These pins easily interface to any
logic family.
Applications
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The LTC6090 is unity gain stable with up to a 200pF output
capacitor. A wide input and output common mode range
along with many features makes the LTC6090 useful for
many high voltage applications.
ATE
Piezo Drivers
Photodiode Amplifier
High Voltage Regulators
Optical Networking
The LTC6090 is available in an 8-lead SO and 16-lead
TSSOP with exposed pad for low thermal resistance.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Typical Application
High Voltage DAC Buffer Application
140VP-P Sine Wave Output
80
VREF = 2.5V
60
70V
DIN
16
+
LTC2641
LTC6090
VOUT = ±70V
–
16.2k
–70V
OUTPUT VOLTAGE (V)
3V
40
20
0
–20
–40
–60
–80
453k
6090 TA01a
25µs/DIV
6090 TA01b
16.9k
10pF
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LTC6090
Absolute Maximum Ratings
(Note 1)
Total Supply Voltage (V+ to V–)................................150V
COM.................................................................... V– to V+
Input Voltage
OD....................................................... V– to V+ + 0.3V
+IN, –IN,................................... V– – 0.3V to V+ + 0.3V
OD to COM..................................................... 0V to 6V
Input Current
+IN, –IN............................................................ ±10mA
TFLAG Output
TFLAG.......................................V – – 0.3V to V+ + 0.3V
TFLAG to COM.......................................... –0.3V to 6V
Output Current
OUT Short-Circuit Duration (Note 2)............. Indefinite
Operating Junction Temperature Range
(Note 3)....................................................–40°C to 125°C
Specified Junction Temperature Range (Note 4)
LTC6090C................................................. 0°C to 70°C
LTC6090I..............................................–40°C to 85°C
LTC6090H........................................... –40°C to 125°C
Junction Temperature (Note 5).............................. 150°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................... 300°C
ESD Sensitive: The input pins (+IN and –IN) to this device
are sensitive to ESD. Any ESD of 250V (HBM) or greater
may result in elevated input bias current. Please use proper
precautionary measures to avoid electrical damage.
Pin Configuration
TOP VIEW
TOP VIEW
COM 1
–IN 2
+IN 3
V–
4
9
V–
COM
1
16 OD
GUARD
2
15 GUARD
3
14 V+
8
OD
GUARD
7
V+
–IN
4
6
OUT
+IN
5
GUARD
6
11 GUARD
GUARD
7
10 GUARD
V–
8
9
5
TFLAG
S8E PACKAGE
8-LEAD PLASTIC SO
TJMAX = 150°C, θJC = 5°C/W
EXPOSED PAD (PIN 9) IS V–, MUST BE SOLDERED TO PCB
17
V–
13 GUARD
12 OUT
TFLAG
FE PACKAGE
16-LEAD PLASTIC TSSOP
TJMAX = 150°C, θJC = 10°C/W
EXPOSED PAD (PIN 17) IS V–, MUST BE SOLDERED TO PCB
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LTC6090
Order Information
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
JUNCTION TEMPERATURE RANGE
LTC6090CS8E#PBF
LTC6090CS8E#TRPBF
6090
8-Lead Plastic SO
0°C to 70°C
LTC6090IS8E#PBF
LTC6090IS8E#TRPBF
6090
8-Lead Plastic SO
–40°C to 85°C
LTC6090HS8E#PBF
LTC6090HS8E#TRPBF
6090
8-Lead Plastic SO
–40°C to 125°C
LTC6090CFE#PBF
LTC6090CFE#TRPBF
6090FE
16-Lead Plastic TSSOP
0°C to 70°C
LTC6090IFE#PBF
LTC6090IFE#TRPBF
6090FE
16-Lead Plastic TSSOP
–40°C to 85°C
LTC6090HFE#PBF
LTC6090HFE#TRPBF
6090FE
16-Lead Plastic TSSOP
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
Electrical Characteristics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TJ = 25°C. Test conditions are V+ = 70V, V– = –70V, VCM = VOUT = 0V, VOD = Open
unless otherwise noted.
C-, I-SUFFIXES
SYMBOL PARAMETER
VOS
CONDITIONS
IOS
Input Bias Current (Note 6)
Input Offset Current (Note 6)
Supply Voltage = ±70V
Supply Voltage = ±15V
Supply Voltage = ±15V
MAX
l
±330
±330
±1000
±1600
l
4
4
µV/°C
3
3
3
3
800
pA
pA
pA
120
pA
pA
l
Supply Voltage = ±15V
0.5
l
en
MAX
UNITS
±330
±330
±1000
±1600
μV
μV
0.5
30
14
11
14
11
nV/√Hz
nV/√Hz
Input Noise Voltage
0.1Hz to 10Hz
3.5
3.5
µVP-P
1
1
fA/√Hz
VCM
Input Common Mode Range
Guaranteed by CMRR
l
CIN
Common Mode Input
Capacitance
CDIFF
Differential Input Capacitance
CMRR
Common Mode Rejection Ratio VCM = –67V to 67V
AVOL
50
TYP
f = 1kHz
f = 10kHz
Input Noise Current Density
VOUT
MIN
Input Noise Voltage Density
in
PSRR
H-SUFFIX
TYP
Input Offset Voltage
∆VOS /∆T Input Offset Voltage Drift
IB
MIN
Power Supply Rejection Ratio
V –+3V
±68
V+ –3V
V –+3V
9
±68
V+ –3V
9
5
V
V
pF
5
pF
125
105
100
125
l
105
100
dB
dB
105
100
118
105
100
118
l
dB
dB
VS = ±4.75V to ±70V
Output Voltage Swing High
(Referred to V+)
No Load
ISOURCE = 1mA
ISOURCE = 10mA
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l
l
25
100
750
50
200
1500
25
100
750
50
200
1500
mV
mV
mV
Output Voltage Swing Low
(Referred to V –)
No Load
ISINK = 1mA
ISINK = 10mA
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l
l
10
40
250
25
80
600
10
40
250
25
80
600
mV
mV
mV
Large-Signal Voltage Gain
RL = 10k,
VOUT from –60V to 60V
l
500
400
12000
500
400
12000
V/mV
V/mV
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LTC6090
Electrical Characteristics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TJ = 25°C. Test conditions are V+ = 70V, V– = –70V, VCM = VOUT = 0V, VOD = Open
unless otherwise noted.
C-, I-SUFFIXES
SYMBOL PARAMETER
ISC
SR
GBW
CONDITIONS
Output Short-Circuit Current
(Source and Sink)
Supply Voltage = ±70V
Supply Voltage = ±15V
Slew Rate
AV = –2, RL = 10k
Gain-Bandwidth Product
MIN
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15
l
8
l
5
fTEST = 20kHz, RL = 10k
ΦM
Phase Margin
RL = 10k, CL = 50pF
FPBW
Full Power Bandwidth
VO = 125VP–P
Settling Time 0.1%
VSTEP = 1V, Av = 1,
RL = 10k
IS
Supply Current
No Load
H-SUFFIX
MAX
50
MIN
15
19
8
10
4
52
l
tS
TYP
25
20
2.7
l
Supply Voltage Range
Guaranteed by the PSRR Test l
ODH
ODL
OD Pin Voltage, Referenced to
COM Pin
VIH
VIL
Amplifier DC Output
Impedance, Disabled
DC, OD = COM
MAX
mA
mA
19
V/μs
V/μs
10
MHz
MHz
52
Deg
9.5
140
l COM+2.5V
l
COM+0.65V
2.7
9.5
COM+2.5V
450
V–
kHz
kHz
2
3.9
4.2
µs
3.9
4.5
mA
mA
140
V
COM+0.65V
V
V
450
V+ – 5
UNITS
50
25
20
2
VS
TYP
V–
kΩ
V+ – 5
COMCM
COM Pin Voltage Range
l
V
20
21
22.5
20
21
22.5
V
500
665
850
500
665
850
kΩ
COMV
COM Pin Open Circuit Voltage
l
COMR
COM Pin Resistance
l
TEMPF
Die Temperature Where TFLAG
Is Active
l
145
145
°C
l
5
5
°C
TEMPHYS TFLAG Output Hysteresis
ITFLAG
TFLAG Pull-Down Current
TFLAG Output Voltage = 0V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: A heat sink may be required to keep the junction temperature
below the absolute maximum rating when the output is shorted
indefinitely.
Note 3: The LTC6090C/LTC6090I are guaranteed functional over the
operating junction temperature range –40°C to 85°C. The LTC6090H
is guaranteed functional over the operating junction temperature range
–40°C to 125°C. Specifying the junction temperature range as an operating
condition is applicable for devices with potentially significant quiescent
power dissipation.
l
70
120
170
70
120
170
µA
Note 4: The LTC6090C is guaranteed to meet specified performance from
0°C to 70°C. The LTC6090C is designed, characterized, and expected
to meet specified performance from –40°C to 85°C but is not tested or
QA sampled at these temperatures. The LTC6090I is guaranteed to meet
specified performance from –40°C to 85°C. The LTC6090H is guaranteed
to meet specified performance from –40°C to 125°C.
Note 5: This device includes over temperature protection that is intended
to protect the device during momentary overload conditions. Operation
above the specified maximum operating junction temperature is not
recommended.
Note 6: Input bias and offset current is production tested with ±15V
supplies. See Typical Performance Characteristics curves of actual typical
performance over full supply range.
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LTC6090
Typical Performance Characteristics
AVOL and Phase vs Frequency
PHASE
90
120
100
100
80
80
GAIN
60
70
40
60
20
50
0
40
–20
30
–40
0.1
1
10
100
1000
FREQUENCY (kHz)
PHASE (DEG)
GAIN (dB)
80
PSRR vs Frequency
140
VS = ±70V
80
60
20
0
0
0.1
1
10
100
1000
FREQUENCY (kHz)
140
500
400
100
0
20
–100
–200
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE (°C)
1000
6090 G04
2.8
1.0
0
25
50
75
100
SUPPLY VOLTAGE (V)
125
150
6090 G07
–40°C
–500
VS = ±70V
–1000
–70 –65 –60 –55 0
55 60 65
COMMON MODE VOLTAGE (V)
70
6090 G06
Output Disable Supply Current
vs Supply Voltage
0.8
VS = ±70V
VS = ±40V
VS = ±15V
OUTPUT DISABLE CURRENT (mA)
3.0
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
3.1
TA = 125°C
TA = 85°C
TA = 25°C
TA = –40°C
125°C
25°C
0
Supply Current vs Temperature
3.4
1.8
500
6090 G05
Supply Current vs Supply Voltage
2.2
1000 10000
1000
VS = ±70V
VS = ±30V
VS = ±5V
200
40
2.6
1
10
100
FREQUENCY (kHz)
Offset Voltage
vs Common Mode Voltage
300
–600
–200
200
600
INPUT OFFSET VOLTAGE (µV)
0.1
6090 G03
OFFSET VOLTAGE (µV)
100
OFFSET (µV)
NUMBER OF UNITS
VS = ±70V
V = 0V
120 CM
TA = 25°C
1.4
–20
0.01
10000
Offset Voltage Drift
60
PSRR–
6090 G02
VOS Distribution
80
PSRR+
40
20
20
10000
AV = 1V
60
40
6090 G01
0
–1000
120
PSRR (dB)
100
CMRR vs Frequency
100
CMRR (dB)
120
2.7
2.6
2.5
2.4
2.3
–40 –25 –10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
6090 G08
0.7
0.6
0.5
0.4
0.3
TA = 125°C
TA = 85°C
TA = 25°C
TA = –40°C
0.2
0.1
0
0
20
40
60
80 100 120
TOTAL SUPPLY VOLTAGE (V)
140
6090 G09
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LTC6090
Typical Performance Characteristics
Voltage Noise vs Frequency
0.1Hz to 10Hz Voltage Noise
Large Signal Transient Response
VOLTAGE NOISE DENSITY (nV/√Hz)
1000
AV = 10
VS = ±70V
100
OUTPUT
NOISE
2µV/DIV
OUTPUT
20V/DIV
10
1
0.001
0.01
0.1
1
FREQUENCY (kHz)
10
100
6090 G11
TIME (1s/DIV)
6090 G12
5µs/DIV
6090 G10
Small Signal Transient Response
Output Impedance vs Frequency
with Output Disabled (OD = COM)
Output Impedance vs Frequency
100
OUTPUT RESISTANCE (kΩ)
INPUT
50mV/DIV
1000
CL = 0pF
CL = 200pF
IMPEDANCE (Ω)
10
OUTPUT
50mV/DIV
1
0.1
AV = 1
CL = 100pF
5µs/DIV
6090 G13
0.01
0.001
0.01
0.1
1
FREQUENCY (kHz)
10
100
10
1
0
0.01
100
CL = 0pF
CL = 200pF
0.1
1
10
FREQUENCY (kHz)
6090 G14
Output Disable Response Time
Input Bias Current vs Temperature
±70V
INPUT BIAS CURRENT (pA)
OUTPUT
10mV/DIV
5µs/DIV
6090 G16
1000
AV = 1
INPUT
100mV/DIV
OUT
2V/DIV
0V
1000
6090 G15
Settling Time
RL = 10kΩ
OD
2V/DIV
0V
100
1µs/DIV
6090 G17
100
±5V
10
1
0.1
0
20
40
60
80 100 120
JUNCTION TEMPERATURE (°C)
140
6090 G18
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LTC6090
Typical Performance Characteristics
Input Bias Current
vs Common Mode Voltage
Input Bias Current
vs Common Mode Voltage
4
1500
VS = ±70V
TA = 25°C
0
TA = –40°C
–2
500
0
–500
–1000
–4
–70
–50 –30 –10 0 10
30
50
INPUT COMMON MODE VOLTAGE (V)
–50 –30 –10 0 10
30
50
INPUT COMMON MODE VOLTAGE (V)
V+
VS = ±40V
V+ – 0.2
SOURCE
V+ – 0.4
V+ – 0.6
V+ – 0.8
V+ – 1.0
V – + 1.0
V – + 0.8
V – + 0.6
V – + 0.4
V – + 0.2
V–
0.001
TA = 125°C
TA = 25°C
TA = –40°C
0.01
SINK
V – + 0.4
TA = 125°C
TA = 25°C
TA = –40°C
0.001
0.1
1
10
LOAD CURRENT (mA)
160
V – + 0.6
V–
0.001
TA = 125°C
TA = 25°C
TA = –40°C
0.01
AV = 11
CL = 10pF
RF = 100kΩ
140
SOURCE
V – + 0.8
V – + 0.4
SINK
120
100
80
60
40
20
0.1
1
10
LOAD CURRENT (mA)
0
100
1
10
100
FREQUENCY (kHz)
6090 G23
1000
6090 G24
Frequency Response, AV = +1
4
100
Output Voltage Swing
vs Frequency
V+ – 1.2
100
Frequency Response, AV = +10
30
CL = 0pF
CL = 200pF
VS = ±70V
CF = 15pF
20
2
–70
2ND
–80
GAIN (dB)
10
–60
0
0
–10
–90
–2
3RD
–100
CL = 200pF
CL = 100pF
CL = 0pF
–20
–110
–120
0.01
SINK
6090 G21
V+ – 1.0
GAIN (dB)
DISTORTION (dBc)
–50
V – + 0.6
70
V+ – 0.8
VS = ±70V
AV = 10
VOUT = 10VP-P
RL = 10k
–40
V – + 0.8
V–
V+ – 0.6
Distortion vs Frequency
–30
V – + 1.0
VS = ±70V
V+ – 0.4
6090 G22
–20
V+ – 1.0
Output Voltage Swing
vs Load Current, ±70V
V – + 0.2
0.1
1
10
LOAD CURRENT (mA)
V+ – 0.8
OUTPUT VOLTAGE SWING (V)
OUTPUT VOLTAGE SWING (V)
Output Voltage Swing
vs Load Current, ±40V
OUTPUT VOLTAGE SWING (V)
V+
V+ – 0.6
6090 G20
6090 G19
V+ – 0.2
SOURCE
V+ – 0.4
V – + 0.2
–1500
–70
70
VS = ±15V
V+ – 0.2
OUTPUT VOLTAGE SWING (V)
INPUT BIAS CURRENT (pA)
INPUT BIAS CURRENT (pA)
1000
2
V+
VS = ±70V
TA = 125°C
Output Voltage Swing
vs Load Current, ±15V
10
100
FREQUENCY (kHz)
6090 G25
–4
10
100
1000
FREQUENCY (kHz)
10000
6090 G26
–30
0
10
100
1000
FREQUENCY (kHz)
10000
6090 G27
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LTC6090
Typical Performance Characteristics
Thermal Shutdown Hysteresis
Open Circuit Voltage of COM, OD,
TFLAG
Output Slewing with AV = –10
3.0
100
OUTPUT
20V/DIV
2.5µs/DIV
6090 G29
80
2.0
PIN VOLTAGE (V)
SUPPLY CURRENT (mA)
2.5
OD
COM
TFLAG
V – = 0V
OUTPUT
20V/DIV
1.5
1.0
60
40
20
0.5
0
162 164 166 168 170 172 174 176 178
JUNCTION TEMPERATURE (°C)
2.5µs/DIV
6090 G29
0
0
20
40
60
80 100 120
TOTAL SUPPLY VOLTAGE (V)
6090 G30
6090 G28
Pin Functions
140
(S8E/FE)
COM (Pin 1/Pin 1): COM Pin is used to interface OD and
TFLAG pins to voltage control circuits. Tie this pin to the
low voltage ground, or let it float.
–IN (Pin 2/Pin 4): Inverting Input Pin. Input common
mode range is V – + 3V to V + – 3V. Do not exceed absolute
maximum voltage range.
+IN (Pin 3/Pin 5): Noninverting Input Pin. Input common
mode range is V – + 3V to V + – 3V. Do not exceed absolute
maximum voltage range.
V– (Pin 4, Exposed Pad Pin 9/Pin 8, Exposed Pad
Pin 17): Negative Supply Pin. Connect to V– Only. To
achieve low thermal resistance connect this pin to the
V – power plane. The V – power plane connection removes
heat from the device and should be electrically isolated
from all other power planes.
OUT (Pin 6/Pin 12): Output Pin. If this rail-to-rail output
goes below V– , the ESD protection diode will forward
bias. If OUT goes above V+, then output device diodes
will forward bias. Avoid forward biasing the diodes on the
OUT pin. Excessive current can cause damage.
V+ (Pin 7/Pin 14): Positive Supply Pin.
OD (Pin 8/Pin 16): Output Disable Pin. Active low input
disables the output stage. If left open, an internal pull-up
resistor enables the amplifier. Input voltage levels are
referred to the COM pin.
GUARD (NA/Pins 2, 3, 6, 7, 10, 11, 13, 15): Guard pins
increase clearance and creepage between other pins.
Pins 3 and 6 can be used to build guard rings around the
inputs.
TFLAG (Pins 5, 9/Pins 9, 17): Temperature Flag Pin. The
TFLAG pin is an open drain output that sinks current when
the die temperature exceeds 145°C.
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LTC6090
Block Diagram
V+
V+
2M
2M
10k
COM
10k
OD
1.2V
2M
–
ESD
+
ESD
V–
V
–
V+
125Ω
–IN
ESD
V+
1M
ESD
+IN
V–
OUTPUT
ENABLE
DIFFERENTIAL
DRIVE
GENERATOR
125Ω
OUT
1M
ESD
V–
TO COM PIN
10k
500Ω
V–
INPUT STAGE
10k
TJ > 175°C
DIE
TEMPERATURE
TJ > 145°C
SENSOR
TFLAG
ESD
V–
30k
V–
6090 BD
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LTC6090
Applications Information
General
Output Range
The LTC6090 high voltage operational amplifier is designed
in a Linear Technology proprietary process enabling a railto-rail output stage with a 140V supply while maintaining
precision, low offset, and low noise.
To get full benefit of the output drive, the feedback resistor
should be chosen carefully. Consider an amplifier with
AV = –50 and a 5k feedback resistor. A 1V input will cause
the output to rise to 50V. Since +IN is at the same potential
as –IN, a current of 10mA will flow through the feedback
resistor limiting the ability of the amplifier to drive a load.
A better choice is a 50k feedback resistor reducing the
current in the feedback resistor to 1mA.
Power Supply
The LTC6090 works off single or split supplies. Split supplies can be balanced or unbalanced. For example, two
±70V supplies can be used, or a 100V and –40V supply
can be used. For single supply applications place a high
quality surface mount ceramic 0.1µF bypass capacitor
between the supply pins close to the part. For dual supply
applications use two high quality surface mount ceramic
capacitors between V+ to ground, and V– to ground located
close to the part. When using split supplies, supply sequencing does not cause problems.
Input Protection
As shown in the block diagram, the LTC6090 has a comprehensive protection network to prevent damage to the
input devices. The current limiting resistors and back to
back diodes are to keep the inputs from being driven apart.
The voltage-current relationship combines exponential
and resistive until the voltage difference between the pins
reach 12V.
At that point the Zeners turn on. Additional current into
the pins will snap back the input differential voltage to 9V.
In the event of an ESD strike between an input and V–, the
voltage clamps and ESD device fire providing a current
path to V– protecting the input devices.
The input pin protection is designed to protect against
momentary ESD events. A repetitive large fast input swing
(>5.5V and <20ns rise time) will cause repeated stress on
the MOSFET input devices. When in such an application,
anti-parallel diodes (1N4148) should be connected between
the inputs to limit the swing.
Interfacing to Low Voltage Circuits
The COM pin is provided to set a common signal ground
for communication to a microprocessor or other low
voltage logic circuit. The COM pin should be tied to the
low voltage ground as shown in Figure 1. If left floating,
the internal resistive voltage divider will cause the COM
pin to rise 30% above mid-supply. The COM, OD, and
TFLAG pins are protected from overvoltage by internal
Zener diodes and current limiting resistors. Care should be
taken to observe the absolute maximum voltage between
the COM, OD and TFLAG pins which are limited ≤6V with
respect to COM.
Output Disable
The OD pin is an active low disable with an internal 2MΩ
resistor that will pull up the OD pin enabling the output
stage. The OD pin voltage is limited by an internal Zener
diode. When the OD pin is brought low to the COM pin,
the output stage is disabled, leaving the bias and input
circuits enabled. This results in 680μA (typical) standby
current through the device. The OD pin can be directly
connected to the low voltage driving circuitry or an open
drain NMOS device can be used as shown in Figure 1.
6090fa
10
LTC6090
Applications Information
LTC6090
V+
V+
2M
10k
OD
TO LOW
VOLTAGE
CONTROL
OUT
10V/DIV
V+
2M
10k
COM
TIE TO LOW
VOLTAGE GROUND
1ms/DIV
Figure 2. Starting Up
2M
LOW VOLTAGE
SUPPLY
V–
6090 F02
10k
500Ω
200k
TO LOW
VOLTAGE
CONTROL
TFLAG
OD
2V/DIV
10k
OUT
2V/DIV
30k
V–
2.5ms/DIV
6090 F01
Figure 1. Low Voltage Interface
6090 F03
Figure 3. LTC6090 Output Disable Function
For simplest shutdown operation, float the COM pin, and
tie the OD pin to the TFLAG pin. This will float the low
voltage control pins, and the overtemperature circuit will
safely shutdown the output stage if the die temperature
reaches 145°C.
temperature sensor has 5°C of hysteresis requiring the
part to cool to 140°C before disabling the TFLAG pin. Since
the TFLAG pin is referenced to the COM pin, precaution
should be exercised and the absolute maximum ratings
should be observed for the COM and TFLAG pins.
Since the OD pin is referenced to the COM pin, precaution
should be exercised and the absolute maximum ratings
should be observed for the COM and OD pins.
Tying the TFLAG pin to the OD pin will automatically shut
down the output stage when the die temperature exceeds
145°C as shown in Figure 4. This will ensure that the junction temperature does not exceed 150°C.
When coming out of shutdown the LTC6090 bias circuits
and input stage are already powered up leaving only the
output stage to turn on and drive to the proper output
voltage. Figures 2 and 3 show the part starting up and
coming out of shutdown, respectively.
Thermal Shutdown
The TFLAG pin is an open drain output pin that sinks 120µA
(typical) when the die temperature exceeds 145°C. The
For safety, an independent second overtemperature
threshold shuts down the output stage if the internal die
temperature rises to 175°C. There is hysteresis in the
thermal shutdown circuit requiring the die temperature
to cool 7°C. Once the device has cooled sufficiently, the
output stage will enable. Degradation can occur or reliability may be affected when the junction temperature
of the device exceeds 150°C.
6090fa
11
LTC6090
Applications Information
LTC6090
The guard ring completely encloses the high impedance
node –IN. To simplify the PCB layout avoid using vias on
this node. In addition, the solder mask should be pulled
back along the guard ring exposing the metal. To help
the spacing between nodes, one of the extra pins on the
TSSOP package is used to route the guard ring behind
the –IN pin. The PCB should be thoroughly cleaned after
soldering to ensure there is no solder paste between the
exposed pad (Pin 17) and the guard ring.
V+
2M
10k
OD
TFLAG
10k
30k
GUARD RING
V–
C2
6090 F04
Figure 4. Automatic Thermal Output
Disable Using the TFLAG Pin
R2
The LTC6090 is a precision low offset high gain amplifier that requires good analog PCB layout techniques to
maintain high performance. Start with a ground plane that
is star connected. Pull back the ground plane from any
high voltage vias. Critical signals such as the inputs should
have short lead lengths to reduce stray capacitance which
also improves stability. Use high quality surface mount
ceramic capacitors to bypass the supply(s).
–
R1
Board Layout
+
LTC6090
6090 F05a
Figure 5a. Circuit Diagram Showing Guard Ring
OUT
In addition to the typical layout issues encountered with
a precision operational amplifier, there are the issues of
high voltage and high power. Important consideration for
high voltage traces are spacing, humidity and dust. High
voltage electric fields between adjacent conductors attract
dust. Moisture is absorbed by the dust and can contribute
to board leakage and electrical breakdown.
It is important to clean the PCB after soldering down the
part. Solder flux will accumulate dust and become a leakage hazard. It is recommended to clean the PCB with a
solvent, or simply use soap and water to remove residue.
Baking the PCB will remove left over moisture. Depending
on the application, a special low leakage board material
may be considered.
The TSSOP package has guard pins for applications that
require a guard ring. An example schematic diagram and
PCB layout is shown in Figures 5a and 5b, respectively,
of a circuit using a guard ring to protect the –IN pin.
+IN
R2
–IN
R1
C1
6090 F05b
Figure 5b. TSSOP Package PCB Layout with Guard Ring
6090fa
12
LTC6090
Applications Information
Power Dissipation
With a supply voltage of 140V it doesn’t take much current
to consume a lot of power. Consider that 10mA at 140V
consumes 1.4W of power and needs to be dissipated in a
small plastic SO package. To aid in power dissipation both
LTC6090 packages have exposed pads for low thermal
resistance. The amount of metal connected to the exposed
pad will lower the θJA of a package. An optimal amount
of PCB metal connected to the SO package will lower the
junction to ambient thermal resistance down to 33°C/W.
If minimal metal is used, the θJA could more than double
(see Table 1). If the exposed pad has no metal beneath it,
θJA could be as high 120°C/W.
It’s recommended that the exposed pad have as much PCB
metal connected to it as reasonably available. The more PCB
metal connected to the exposed pad, the lower the thermal
resistance. Use multiple vias from the exposed pad to the
V– supply plane. The exposed pad is electrically connected
to the V– pin. In addition, a heat sink may be necessary
if operating near maximum junction temperature. See
Table 1 for guidance on how thermal resistance changes
as a function of metal area connected to the exposed pad.
The LTC6090 is specified to source and sink 10mA at 140V.
If the total supply voltage is dropped across the device,
1.4W of power will need to be dissipated. If the quiescent
power is included (140V • 2.8mA = 0.4W), the total power
dissipated is 1.8W. The internal die temperature will rise
59° using an optimal layout in a SO package. A sub-optimal
layout could more than double the amount of temperature
increase due to power dissipation.
Table 1. Thermal Resistance as PCB Area of Exposed Pad Varies
EXAMPLE A
TOP LAYER A
EXAMPLE B
TOP LAYER B
EXAMPLE C
TOP LAYER C
EXAMPLE D
TOP LAYER D
BOTTOM LAYER A
BOTTOM LAYER B
BOTTOM LAYER C
BOTTOM LAYER D
θJA = 50°C/W
θJC = 5°C/W
θCA = 45°C/W
θJA = 57°C/W
θJC = 5°C/W
θCA = 52°C/W
MINIMUM BOTTOM LAYER B
MINIMUM BOTTOM LAYER C
θJA = 57°C/W
θJC = 5°C/W
θCA = 52°C/W
θJA = 58°C/W
θJC = 5°C/W
θCA = 53°C/W
θJA = 43°C/W
θJC = 5°C/W
θCA = 38°C/W
MINIMUM BOTTOM LAYER A
θJA = 54°C/W
θJC = 5°C/W
θCA = 49°C/W
θJA = 72°C/W
θJC = 5°C/W
θCA = 67°C/W
6090fa
13
LTC6090
Applications Information
In order to avoid damaging the device, the absolute
maximum junction temperature should not be exceeded
(TJMAX = 150°C). Junction temperature is determined
using the expression:
TJ = PD • θJA + TA
where PD is the power dissipated in the package, θJA is the
package thermal resistance from ambient to junction and
TA is the ambient temperature. For example, if the part has
a 140V supply voltage with 2.8mA of quiescent current
and the output is 20V above the negative rail sourcing
10mA, the total power dissipated in the device is (120V •
10mA) + (140V • 2.8mA) = 1.6W. Under these conditions
the ambient temperature should not exceed:
TA = TJMAX – (PD • θJA) = 150°C – (1.6W • 33°C/W) = 97°C.
and any additional heat sinking. The three SOA curves in
Figure 6 show the direct effect of θJA on SOA.
Stability with Large Resistor Values
A large feedback resistor along with the intrinsic input
capacitance will create an additional pole that affects
stability and causes peaking in the closed loop response
as shown in Figure 7. To mitigate the peaking a small
feedback capacitor placed around the feedback resistor, as
shown in Figure 8, will reduce the peaking and overshoot.
Figure 9 shows the closed loop response with a 10pF
feedback capacitor.
Additionally stray capacitance on the input pins should
be kept to a minimum.
Safe Operating Area
30
The LTC6090 is safe when operated within the boundaries
shown in Figure 6. Thermal resistance junction to case,
θJC, is rated at a constant 5°C/W. Thermal resistance
junction to ambient, θJA, is dependent on board layout
LOAD CURRENT (mA)
100
20
GAIN (dB)
The safe operating area, or SOA, illustrates the voltage,
current, and temperature conditions where the device can
be reliably operated. Shown below in Figure 6 is the SOA
for the LTC6090. The SOA takes into account the power
dissipated by the device. This includes the product of the
load current and difference between the supply and output
voltage, and the quiescent current and supply voltage.
10
0
–10
10
100
FREQUENCY (kHz)
1000
6090 F07
Figure 7. Uncompensated Closed Loop Response
θJA = 33°C
θJA = 66°C
θJA = 99°C
10pF
100k
10
20k
PARASITIC INPUT
CAPACITANCE
SOA
–
+
LTC6090
6090 F08
1
1
10
100
1000
SUPPLY VOLTAGE – LOAD VOLTAGE (V)
Figure 8. LTC6090 with Feedback Capacitance
to Reduce Peaking
6090 F06
Figure 6. Safe Operating Area
6090fa
14
LTC6090
Applications Information
TOTAL HARMONIC DISTORTION + NOISE (%)
30
GAIN (dB)
20
10
0
–10
10
100
FREQUENCY (kHz)
1000
10
VS = ±70V
AV = 5
RL = 10k
CF = 30pF
1
0.1
VOUT = 100VP-P
0.01
0.001
VOUT = 50VP-P
VOUT = 10VP-P
10
100
1000
10000
FREQUENCY (Hz)
6090 F09
Figure 9. Compensated Closed Loop
Response Reduces Peaking
Slew Enhancement
The LTC6090 includes a slew enhancement circuit which
boosts the slew rate to 19V/μs making the part capable
of slewing rail-to-rail across the 140V output range in
less than 8μs. To optimize the slew rate and minimize
settling, stray capacitance should be kept to a minimum.
A feedback capacitor reduces overshoot and nonlinearities
associated with the slew enhancement circuit. The size of
the feedback capacitor should be tailored to the specific
board, supply voltage and load conditions.
Slewing is a nonlinear behavior and will affect distortion.
The relationship between slew rate and full power bandwidth is given in the relationship below.
SR = VO • ω
Where VO is the peak output voltage and ω is frequency in
radians. The fidelity of a large sine wave output is limited
by the slew rate. The graph in Figure 10 shows distortion
versus frequency for several output levels.
Multiplexer Application
Several LTC6090s may be arranged to act as a high voltage analog multiplexer as shown in Figure 11. When using
this arrangement, it is possible for the output to affect the
source on the disabled amplifier’s noninverting input. The
inverting and noninverting inputs are clamped through
resistors and back to back diodes. There is a path for
100000
6090 F10
Figure 10. Distortion vs Frequency for Large Output Swings
current to flow from the multiplexer output through the
disabled amplifier’s feedback resistor, and through the
inputs to the noninverting input’s source. For example, if
the enabled amplifier has a –70V output, and the disabled
amplifier has a 5V input, there is 75V across the two resistors and the input pins. To keep this current below 1mA
the combined resistance of the RIN and feedback resistor
needs to be about 75k.
The output impedance of the disabled amplifier is 450kΩ
at DC. The AC output impedance is shown in the Typical
Performance Characteristics section.
SELECT
CH1
10k
+
OD
COM
LTC6090
–
10k
100k
CH2
10k
MUX
OUT
+
OD
COM
LTC6090
–
10k
100k
6090 F11
Figure 11. Multiplexer Application
6090fa
15
LTC6090
Typical Applications
Gain of 20 Amplifier with a 40mA Protected Output Driver
Gain of 10 with Protected Output Current Doubler
200k
1%
40.2k
70V
47pF
2
VIN
2k
3
40.2k
–
7
4
2k
–
BAV99
5
8
TF
LTC6090 SD
+
70V
22.1k
1%
CZT5551
9
1k
6
+
VIN
12.1Ω
604Ω
1k
1
±70V
AT ±20mA
VOUT
–70V
BAV99
70V
CZT5401
–70V
100Ω
1%
TF
LTC6090 OD
200k
–
100Ω
1%
TF
LTC6090 OD
6090 TA02
6090 TA03
+
–70V
12V to ±70V Isolated Flyback Converter for Amplifier Supply
750311692 CRM1U-06M
1:1:5
VIN
12V
2.2µF
1M
•
BZX100A
VIN
BAV20W
EN/UVLO
562k
RFB
0.47µF
100V
•
+
100k
LTC6090
RREF
LT3511
•
10k
TC
–
CRM1U-06M
0.47µF
100V
VOUT2–
SW
VC
70V
VOUT1+
GND
BIAS
24.9k
–70V
4.7µF
2.2nF
6090 TA04
9V to ±65V Isolated Flyback Converter for Amplifier Supply
750311692
1:1:5
VIN
9V
100k
1
2
22k
3
LT8300
EN/UVLO
VIN
GND
RFB
SW
130k
5
4
4
3
4.7µF
8
•
65V
CMMR1U-2
6
•
1µF
130V
CMHZ5266B
+
LTC6090
7
•
–
CMMR1U-2
5
1µF
100V
6090 TA05
–65V
6090fa
16
LTC6090
Typical Applications
Audio Power Amplifier
50V
1N4148
40.2Ω
1nF
1N4148
100pF
CZT5401
1k
33.2k
IXTH50N20
100pF
VTOP
7
2
1k
3
1nF
5
LTC6090
+
4
9
100pF
8
1
2.49k
6
1N4148
LT1166
VIN
1k
100k
ILIM+
0.1Ω
1µF
1µH
VOUT
1µF
1N4148
0.1Ω
ILIM–
OUT
22nF
10Ω
20k
1k
SENSE–
100k
VBOTTOM
10k*
499k
499Ω
33.2k
CZT5550
1nF
1N4148
IXTH24P20
100pF
1N4148
39.2Ω
–50V
6090 TA06a
* USE SEVERAL SERIES RESISTORS TO REDUCE DISTORTION (i.e. 5 × 2kΩ).
Total Harmonic Distortion Plus Noise
Analyzer Passband 10Hz to 80kHz
TOTAL HARMONIC DISTORTION PLUS NOISE (%)
IN
–
SENSE+
0.100
0.010
4Ω AT 100W
0.001
8Ω AT 50W
0
10
100
1000
10000
FREQUENCY (Hz)
100000
6090 TA06b
6090fa
17
LTC6090
Typical Applications
High Current Pulse Amplifier
75pF
10k
70V
7
2
499k
IN
3
10k
–
+
9
2SK1057
IHSM-3825
1µH
8
499Ω
LTC6090
4
499k
1k
5
1
100Ω
–70V
OUT
2SJ161
6090 TA07
60V Step Response Into 10Ω
40
30
VOLTS
20
10
0
–10
–20
5µs/DIV
6090 TA07b
6090fa
18
LTC6090
Typical Applications
Simple 100W Audio Amplifier
50pF
2k
2k
2k
2k
2k
50V
100k
100Ω
2SK1057
100nF
7
2
499k
3
10k
5
4
499k
9
6.8k
8
LTC6090
+
6
IHSM-3825
1µH
1k
10k
OUT
BIAS
1
1k
6.8k
2SJ161
100nF
100Ω
2SJ161
100k
–50V
6090 TA08a
SET QUIESCENT SUPPLY CURRENT AT ABOUT 200mA WITH BIAS ADJUSTMENT.
SET QUIESCENT CURRENT TO 100mA IF PARALLEL MOSFETs ARE NOT USED (FOR 8Ω OR HIGHER).
Total Harmonic Distortion Plus
Noise vs Frequency
TOTAL HARMONIC DISTORTION PLUS NOISE (%)
IN
–
2SK1057
1
0.1
4Ω AT 100W
0.01
8Ω AT 50W
0.001
0.0001
100
1k
FREQUENCY (Hz)
10k
6090 TA08b
6090fa
19
LTC6090
Typical Applications
Wide Common Mode Range 10x Gain Instrumentation Amplifier
Typically <1mV Input-Referred Error
70V
7
3
+IN
2
+
5
8
LTC6090
–
4
9
6
22pF
10k*
1
100k
22pF
1
LT5400-2
100k
2
7
8
7
3
100k
–70V
205k
70V
7
3
–IN
70V
2
+
4
3
100k
5
9
22pF
8
6
100k
10k*
6
2
5
4
LTC6090
–
24.9k
100k
9
+
5
8
LTC6090
–
4
9
6
1
49.9Ω
OUT
–3dB at 45kHz
22pF
LTC6090 TA09
1
–70V
* THESE RESISTORS CAN BE 0Ω IF INPUT SIGNAL SOURCE IMPEDANCES ARE <20MΩ.
–70V
90
CMRR (dB)
80
70
60
50
40
1
10
CM FREQUENCY (kHz)
100
6090 TA09b
6090fa
20
LTC6090
Package Description
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
FE Package
16-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663 Rev J)
FE Package
16-Lead Plastic TSSOP (4.4mm)
Exposed Pad Variation BA
(Reference LTC DWG # 05-08-1663 Rev J)
Exposed Pad Variation BA
4.90 – 5.10*
(.193 – .201)
2.74
(.108)
2.74
(.108)
16 1514 13 12 1110
6.60 ±0.10
4.50 ±0.10
9
2.74
(.108)
2.74 6.40
(.108) (.252)
BSC
SEE NOTE 4
0.45 ±0.05
1.05 ±0.10
0.65 BSC
1 2 3 4 5 6 7 8
RECOMMENDED SOLDER PAD LAYOUT
4.30 – 4.50*
(.169 – .177)
0.09 – 0.20
(.0035 – .0079)
0.50 – 0.75
(.020 – .030)
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
MILLIMETERS
2. DIMENSIONS ARE IN
(INCHES)
3. DRAWING NOT TO SCALE
0.25
REF
1.10
(.0433)
MAX
0° – 8°
0.65
(.0256)
BSC
0.195 – 0.30
(.0077 – .0118)
TYP
0.05 – 0.15
(.002 – .006)
FE16 (BA) TSSOP REV J 1012
4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
6090fa
21
LTC6090
Package Description
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
S8E Package
8-Lead Plastic SOIC (Narrow .150 Inch) Exposed Pad
(ReferenceS8E
LTC Package
DWG # 05-08-1857 Rev Ø)
8-Lead Plastic SOIC (Narrow .150 Inch) Exposed Pad
(Reference LTC DWG # 05-08-1857 Rev Ø)
.189 – .197
(4.801 – 5.004)
NOTE 3
.045 ±.005
.050 BSC
8
.245
MIN
.030 ±.005
TYP
.089 REF .160 ±.005
.118 REF
1
.010 – .020
× 45°
(0.254 – 0.508)
.053 – .069
(1.346 – 1.752)
0°– 8° TYP
.016 – .050
(0.406 – 1.270)
NOTE:
1. DIMENSIONS IN
.150 – .157
.080 – .098
(3.810 – 3.988)
(2.032 – 2.489)
NOTE 3
.228 – .244
(5.791 – 6.197)
RECOMMENDED SOLDER PAD LAYOUT
.008 – .010
(0.203 – 0.254)
.005 (0.13) MAX
7
5
6
.014 – .019
(0.355 – 0.483)
TYP
INCHES
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
3
2
.118 – .138
(2.997 – 3.505)
4
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC S8E 0809 REV Ø
6090fa
22
LTC6090
Revision History
REV
DATE
DESCRIPTION
A
11/12
Added ESD Statement.
PAGE NUMBER
2
6090fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LTC6090
Typical Application
Extended Dynamic Range 1MΩ Transimpedance Photodiode Amplifier
0.3pF
10M
1%
IPD
125V
2
3
PHOTODIODE
SFH213
–
+
7
8
LTC6090
1
5
200k
1%
100mW
4
–3V
VOUT
6
22.1k
1%
–3V
VOUT = IPD • 1M
OUTPUT NOISE = 21µVRMS (1kHz – 40kHz)
OUTPUT OFFSET = 150µV MAXIMUM
BANDWIDTH = 40kHz (–3dB)
OUTPUT SWING = 0V TO 12V
6090 TA10
Related Parts
PART NUMBER
DESCRIPTION
COMMENTS
LT1990
±250V Input Range G = 1, 10, Micropower,
Difference Amplifier
Pin Selectable Gain of 1 or 10
LT1991
Precision, 100µA Gain Selectable Amplifier
Pin Configurable as a Difference Amplifier, Inverting and Noninverting Amplifier
Quad Matched Resistor Network
Excellent Matching Specifications Over the Entire Temperature Range
Amplifiers
Matched Resistors
LT5400
Digital to Analog Converters
LTC2641/LTC2462 16-Bit VOUT DACs in 3mm × 3mm DFN
LTC2756
Serial 18-Bit SoftSpan IOUT DAC
Guaranteed Monotonic Over Temperature
18-Bit Settling Time: 2.1µs
Maximum 18-Bit INL Error: ±1 LSB Over Temperature
Flyback Controllers
LT3511
Monolithic High Voltage Isolated Flyback Converter 4.5V to 100V Input Voltage Range, No Optocoupler Required
LT8300
100VIN Micropower Isolated Flyback Converter
with 150V/260mA Switch
6V to 100V Input Voltage Range. VOUT Set with a Single External Resistor
6090fa
24 Linear Technology Corporation
LT 1112 REV A • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
 LINEAR TECHNOLOGY CORPORATION 2012