CYSTEKEC MTE2D0N04H8 N-channel enhancement mode power mosfet Datasheet

CYStech Electronics Corp.
Spec. No. : C072H8
Issued Date : 2016.03.02
Revised Date : 2016.03.04
Page No. : 1/ 10
N-Channel Enhancement Mode Power MOSFET
MTE2D0N04H8
Features
BVDSS
ID@VGS=10V, TC=25°C
ID@VGS=10V, TC=25°C
ID@VGS=10V, TA=25°C
RDS(ON)@VGS=10V, ID=20A
40V
145A(silicon limit)
84A(package limit)
23A
1.65mΩ(typ)
• Low On Resistance
• Simple Drive Requirement
• Low Gate Charge
• Fast Switching Characteristic
• Pb-free lead plating and Halogen-free package
Symbol
Outline
DFN5×6
MTE2D0N04H8
Pin 1
G:Gate D:Drain S:Source
Ordering Information
Device
MTE2D0N04H8-0-T6-G
Package
DFN 5 ×6
(Pb-free lead plating and halogen-free package)
Shipping
3000 pcs / tape & reel
Environment friendly grade : S for RoHS compliant products, G for RoHS compliant
and green compound products
Packing spec, T6 : 3000 pcs / tape & reel,13” reel
Product rank, zero for no rank products
Product name
MTE2D0N04H8
CYStek Product Specification
Spec. No. : C072H8
Issued Date : 2016.03.02
Revised Date : 2016.03.04
Page No. : 2/ 10
CYStech Electronics Corp.
Absolute Maximum Ratings (TC=25°C, unless otherwise noted)
Parameter
Symbol
Limits
Drain-Source Voltage
(Note 1)
Gate-Source Voltage
Continuous Drain Current @TC=25°C, VGS=10V (silicon limit) (Note 5)
Continuous Drain Current @TC=100°C, VGS=10V(silicon limit) (Note 5)
Continuous Drain Current @TC=25°C, VGS=10V (package limit) (Note 1)
Continuous Drain Current @TA=25°C, VGS=10V
(Note 2)
Continuous Drain Current @TA=70°C, VGS=10V
(Note 2)
Pulsed Drain Current @ VGS=10V
(Note 3)
Avalanche Current
(Note 3)
Single Pulse Avalanche Energy @ L=1mH, ID=44Amps, VDD=30V
VDS
VGS
IDM
IAS
40
±30
145
103
84
23
18.4
350
44
EAS
968
12.5
125
62.5
2.5
1.6
-55~+175
(Note 4)
ID
IDSM
Repetitive Avalanche Energy
(Note 3)
EAR
TC=25°C
TC=100°C
Power Dissipation
TA=25°C
TA=70°C
Operating Junction and Storage Temperature
(Note 1)
PD
(Note 1)
(Note 2)
(Note 2)
PDSM
Tj, Tstg
Unit
V
A
mJ
W
°C
*Drain current limited by maximum junction temperature
Thermal Data
Parameter
Thermal Resistance, Junction-to-case, max
Thermal Resistance, Junction-to-ambient, max
(Note 2)
Symbol
RθJC
RθJA
Value
1.2
50
Unit
°C/W
Note : 1.The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful
in setting the upper dissipation limit for cases where additional heatsinking is used.
2. The value of RθJA is measured with the device mounted on 1 in² FR-4 board with 2 oz. copper, in a still air
environment with TA=25°C. The value in any given application depends on the user’s specific board design. The
power dissipation PDSM is based on RθJA and the maximum allowed junction temperature of 150°C, and the maximum
temperature of 175°C may be used if the PCB allows it.
3. Pulse width limited by junction temperature TJ(MAX)=175°C.
4. Ratings are based on low frequency and low duty cycles to keep initial TJ=25°C. 100% tested by conditions of VDD=30V,
ID=20A, L=1mH, VGS=10V.
5. Calculated continuous drain current based on maximum allowable junction temperature.
6. The static characteristics are obtained using <300μs pulses, duty cycle 0.5% maximum.
7. The RθJA is the sum of thermal resistance from junction to case RθJC and case to ambient.
.
MTE2D0N04H8
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C072H8
Issued Date : 2016.03.02
Revised Date : 2016.03.04
Page No. : 3/ 10
Characteristics (Tj=25°C, unless otherwise specified)
Symbol
Static
BVDSS
∆BVDSS/∆Tj
VGS(th)
*GFS
IGSS
IDSS
*RDS(ON)
Dynamic
*Qg
*Qgs
*Qgd
*td(ON)
*tr
*td(OFF)
*tf
Ciss
Coss
Crss
Rg
Source-Drain Diode
*IS
*ISM
*VSD
*trr
*Qrr
Min.
Typ.
Max.
Unit
Test Conditions
40
2
-
0.03
32
1.65
4
±100
1
5
2.2
V
V/°C
V
S
nA
mΩ
VGS=0V, ID=250μA
Reference to 25°C, ID=250μA
VDS = VGS, ID=250μA
VDS =10V, ID=20A
VGS=±30V
VDS =40V, VGS =0V
VDS =32V, VGS =0V, Tj=55°C
VGS =10V, ID=20A
-
112
35
35
43.2
31.6
74.4
24.2
5957
828
405
1.0
-
nC
VDS=20V, ID=84A, VGS=10V
ns
VDS=20V, ID=20A, VGS=10V, RG=2.7Ω
pF
VGS=0V, VDS=20V, f=1MHz
Ω
f=1MHz
-
0.73
34
33
84
350
1.1
-
μA
A
V
ns
nC
IS=5A, VGS=0V
VGS=0, IF=25A, dIF/dt=100A/μs
*Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2%
MTE2D0N04H8
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C072H8
Issued Date : 2016.03.02
Revised Date : 2016.03.04
Page No. : 4/ 10
Recommended Soldering Footprint
unit : mm
MTE2D0N04H8
CYStek Product Specification
Spec. No. : C072H8
Issued Date : 2016.03.02
Revised Date : 2016.03.04
Page No. : 5/ 10
CYStech Electronics Corp.
Typical Characteristics
Brekdown Voltage vs Ambient Temperature
Typical Output Characteristics
1.4
80
10V, 9V, 8V, 7V
BVDSS, Normalized Drain-Source
Breakdown Voltage
ID, Drain Current(A)
70
60
50
40
VGS=6V
30
20
VGS=5.5V
10
1.2
1
0.8
ID=250μA,
VGS=0V
0.6
0
0.4
0
1
2
3
4
VDS, Drain-Source Voltage(V)
5
-75 -50 -25
Static Drain-Source On-State resistance vs Drain Current
Reverse Drain Current vs Source-Drain Voltage
1.2
VSD, Source-Drain Voltage(V)
R DS(ON) , Static Drain-Source On-State
Resistance(mΩ)
100
10
VGS=4.5V
1
VGS=10V
1
Tj=25°C
0.8
0.6
Tj=150°C
0.4
0.2
0.1
0.01
0.1
1
10
ID, Drain Current(A)
100
0
4
8
12
16
IDR , Reverse Drain Current(A)
20
Drain-Source On-State Resistance vs Junction Tempearture
Static Drain-Source On-State Resistance vs Gate-Source
Voltage
50
2.4
R DS(ON) , Normalized Static DrainSource On-State Resistance
R DS(ON) , Static Drain-Source OnState Resistance(mΩ)
0 25 50 75 100 125 150 175 200
Tj, Junction Temperature(°C)
ID=20A
40
30
20
10
2
VGS=10V, ID=20A
1.6
1.2
0.8
0.4
RDS(ON) @Tj=25°C :1.65mΩ typ.
0
0
0
MTE2D0N04H8
2
4
6
8
VGS, Gate-Source Voltage(V)
10
-75 -50 -25
0 25 50 75 100 125 150 175 200
Tj, Junction Temperature(°C)
CYStek Product Specification
Spec. No. : C072H8
Issued Date : 2016.03.02
Revised Date : 2016.03.04
Page No. : 6/ 10
CYStech Electronics Corp.
Typical Characteristics(Cont.)
Threshold Voltage vs Junction Tempearture
Capacitance vs Drain-to-Source Voltage
1.4
VGS(th), NormalizedThreshold Voltage
10000
Capacitance---(pF)
Ciss
C oss
1000
Crss
1.2
1
ID=1mA
0.8
0.6
ID=250μA
0.4
0.2
100
0
5
10
15
20
25
VDS, Drain-Source Voltage(V)
-75 -50 -25
30
Forward Transfer Admittance vs Drain Current
Gate Charge Characteristics
10
VGS, Gate-Source Voltage(V)
GFS , Forward Transfer Admittance(S)
100
10
1
VDS=10V
Pulsed
Ta=25°C
0.1
0.01
0.001
VDS=20V
8
6
VDS=32V
4
2
ID=84A
0
0.01
0.1
1
ID, Drain Current(A)
10
0
100
20
40
60
80
100
Total Gate Charge---Qg(nC)
120
140
Maximum Drain Current vs Case Temperature
Maximum Safe Operating Area
180
1000
RDS(ON)
Limited
100
100μs
1ms
10
10ms
DC
TC=25°C, Tj=175°C,
VGS=10V, RθJC=1.2°C/W
Single Pulse
1
Silicon Limit
160
ID, Maximum Drain Current(A)
ID, Drain Current(A)
0 25 50 75 100 125 150 175 200
Tj, Junction Temperature(°C)
140
120
100
80
Package Limit
60
40
20
VGS=10V, RθJC=1.2°C/W
0
0.1
0.1
MTE2D0N04H8
1
10
VDS, Drain-Source Voltage(V)
100
25
50
75
100 125 150
TC , Case Temperature(°C)
175
200
CYStek Product Specification
Spec. No. : C072H8
Issued Date : 2016.03.02
Revised Date : 2016.03.04
Page No. : 7/ 10
CYStech Electronics Corp.
Typical Characteristics(Cont.)
Typical Transfer Characteristics
Single Pulse Maximum Power Dissipation
80
3000
VDS=10V
2500
TJ(MAX) =175°C
TC=25°C
RθJC=1.2°C/W
60
Power (W)
ID, Drain Current (A)
70
50
40
30
2000
1500
1000
20
500
10
0
0
2
4
6
VGS, Gate-Source Voltage(V)
8
0
0.0001
0.001
0.01
0.1
Pulse Width(s)
1
10
Transient Thermal Response Curves
1
r(t), Normalized Effective Transient Thermal
Resistance
D=0.5
1.RθJC(t)=r(t)*RθJC
2.Duty Factor, D=t1/t2
3.TJM-TC=PDM*RθJC(t)
4.RθJC=1.2 °C/W
0.2
0.1
0.1
0.05
0.01
1.E-04
MTE2D0N04H8
0.02
Single Pulse
1.E-03
1.E-02
1.E-01
t1, Square Wave Pulse Duration(s)
1.E+00
1.E+01
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C072H8
Issued Date : 2016.03.02
Revised Date : 2016.03.04
Page No. : 8/ 10
Reel Dimension
Carrier Tape Dimension
Pin #1
MTE2D0N04H8
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C072H8
Issued Date : 2016.03.02
Revised Date : 2016.03.04
Page No. : 9/ 10
Recommended wave soldering condition
Product
Pb-free devices
Peak Temperature
260 +0/-5 °C
Soldering Time
5 +1/-1 seconds
Recommended temperature profile for IR reflow
Profile feature
Average ramp-up rate
(Tsmax to Tp)
Preheat
−Temperature Min(TS min)
−Temperature Max(TS max)
−Time(ts min to ts max)
Time maintained above:
−Temperature (TL)
− Time (tL)
Peak Temperature(TP)
Time within 5°C of actual peak
temperature(tp)
Ramp down rate
Time 25 °C to peak temperature
Sn-Pb eutectic Assembly
Pb-free Assembly
3°C/second max.
3°C/second max.
100°C
150°C
60-120 seconds
150°C
200°C
60-180 seconds
183°C
60-150 seconds
240 +0/-5 °C
217°C
60-150 seconds
260 +0/-5 °C
10-30 seconds
20-40 seconds
6°C/second max.
6 minutes max.
6°C/second max.
8 minutes max.
Note : All temperatures refer to topside of the package, measured on the package body surface.
MTE2D0N04H8
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C072H8
Issued Date : 2016.03.02
Revised Date : 2016.03.04
Page No. : 10/ 10
DFN5×6 Dimension
Marking:
E2D0
Device Name
N04
Date Code
8-Lead DFN5×6 Plastic Package
CYS Package Code : H8
Millimeters
Min.
Max.
1.00
1.20
0.35
0.45
0.21
0.34
5.10
4.80
5.00
3.82
4.11
1.17
1.37
5.90
6.10
5.70
5.80
DIM
A
b
c
D
D1
D2
e
E
E1
Inches
Min.
Max.
0.039
0.047
0.014
0.018
0.008
0.013
0.201
0.189
0.197
0.150
0.162
0.046
0.054
0.232
0.240
0.224
0.228
DIM
E2
H
K
L
L1
L2
p
θ
Millimeters
Min.
Max.
3.18
3.54
0.51
0.71
1.10
0.51
0.71
0.06
0.20
0.10
1.00
1.20
8°
12°
Inches
Min.
Max.
0.125
0.139
0.020
0.028
0.043
0.020
0.028
0.002
0.008
0.004
0.039
0.047
8°
12°
Notes: 1.Controlling dimension: millimeters.
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.
3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.
Material:
• Lead: Pure tin plated.
• Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0.
Important Notice:
• All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
• CYStek reserves the right to make changes to its products without notice.
• CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
• CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.
MTE2D0N04H8
CYStek Product Specification
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