AT27C800 Features • • • • Read Access Time - 100 ns Word-wide or Byte-wide Configurable 8-Megabit Flash and Mask ROM Compatable Low Power CMOS Operation - 100 µA Maximum Standby - 50 mA Maximum Active at 5 MHz Wide Selection of JEDEC Standard Packages - 42-Lead 600 mil Cerdip and PDIP - 44-Lead SOIC (SOP) - 48-Lead TSOP (12 mm x 20 mm) 5V ± 10% Power Supply High Reliability CMOS Technology - 2,000 ESD Protection - 200 mA Latchup Immunity RapidTM Programming Algorithm - 50 µs/word (typical) CMOS and TTL Compatible Inputs and Outputs Integrated Product Identification Code Commercial and Industrial Temperature Ranges • • • • • • • 8-Megabit (512K x 16 or 1024K x 8) UV Erasable EPROM Description The AT27C800 is a low-power, high performance 8,388,608-bit UV erasable programmable read only memory (EPROM) organized as either 512K by 16 or 1024K by 8 bits. It requires a single 5V power supply in normal read mode operation. Any word can be accessed in less than 100 ns, eliminating the need for speed-reducing WAIT states. The x16 organization makes this part ideal for high-performance 16- and 32-bit (continued) microprocessor systems. AT27C800 Preliminary Pin Configurations Pin Name Function A0 - A18 Addresses O0 - O15 Outputs O15/A-1 Output/Address BYTE/VPP Byte Mode/ Program Supply CE Chip Enable OE Output Enable NC No Connect CDIP, PDIP Top View TSOP Type 1 A15 A14 A13 A12 A11 A10 A9 A8 NC NC NC NC NC NC NC A18 A17 A7 A6 A5 A4 A3 A2 A1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 A16 BYTE/VPP GND O15/A-1 O7 O14 O6 O13 O5 O12 O4 VCC O11 O3 O10 O2 O9 O1 O8 O0 OE GND CE A0 A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE GND OE O0 O8 O1 O9 O2 O10 O3 O11 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 NC A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTE/VPP GND O15/A-1 O7 O14 O6 O13 O5 O12 O4 VCC SOIC (SOP) NC A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE GND OE O0 O8 O1 O9 O2 O10 O3 O11 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 NC NC A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTE/VPP GND O15/A-1 O7 O14 O6 O13 O5 O12 O4 VCC 0801A-A 1 The AT27C800 can be organized as either word-wide or byte-wide. The organization is selected via the BYTE/VPP pin. When BYTE/VPP is asserted high (VIH), the word-wide organization is selected and the O15/A-1 pin is used for O15 data output. When BYTE/VPP is asserted low (VIL),the byte wide organization is selected and the O15/A-1 pin is used for the address pin A-1. When the AT27C800 is logically regarded as x16 (word-wide), but read in the bytewide mode, then with A-1=VIL the lower eight bits of the 16 bit word are selected with A-1 =VIH the upper 8 bits of the 16-bit word are selected. In read mode, the AT27C800 typically consumes 15 mA. Standby mode supply current is typically less than 10 µA. The AT27C800 is available in industry standard JEDECapproved one-time programmable (OTP)PDIP, SOIC (SOP), and TSOP as well as UV erasable windowed Cerdip packages. The device features two-line control(CE,OE) to eliminate bus contention in high-speed systems. With high density 512K word or 1024K-bit storage capability, the AT27C800 allows firmware to be to be stored reliably and to be accessed by the system without the delays of mass storage media. Atmel’s AT27C800 has additional features that ensure high quality and efficient production use. The RapidTM Programming Algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 50µs/word. The Integrated Product Identification Code electronically identifies the device and manufacturer. This feature is used by industry standard programming equipment to select the proper programming equipment and voltages. Block Diagram 2 AT27C800 Erasure Characteristics The entire memory array of the AT27C800 is erased (all outputs read as VOH) after exposure to ultraviolet light at a wavelength of 2,537Å. Complete erasure is assured after a minimum of 20 minutes of exposure using 12,000 µW/cm2 intensity lamps spaced one inch away from the chip. Minimum erase time for lamps at other intensity ratings can be calculated from the minimum integrated erasure dose of 15 W.sec/cm2. To prevent unintentional erasure, an opaque label is recommended to cover the clear window on any UV erasable EPROM that will be subjected to continuous flourescent indoor lighting or sunlight. System Considerations Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may exceed data sheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the VCC and Ground terminals of the device, as close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again connected between the VCC and Ground terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to the array. AT27C800 Absolute Maximum Ratings* Temperature Under Bias ...................-55°C to +125°C *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: Minimum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is Vcc + 0.75V DC which may overshoot to + 7.0V for pulses of less than 20 ns. Storage Temperature ........................-65°C to +150°C Voltage on Any Pin with with Respect to Ground.....................-2.0V to +7.0V(1) Voltage on A9 with Respect to Ground .........................-2.0V to +14.0V(1) VPP Supply Voltage with Respect to Ground ..........................-2.0V to +14.0V(1) 1. Integrated UV Erase Dose............... 7258 W •sec/cm2 Operating Modes Outputs Mode\Pin CE OE BYTE/VPP O0-O7 O8-O14 O15/A-1 (1) VIH DOUT DOUT DOUT Ai Read Word-wide VIL VIL X Read Byte-wide Upper VIL VIL X(1) VIL DOUT High Z VIH (1) VIL DOUT High Z VIL Read Byte-wide Lower VIL VIL X Output Disable X(1) VIH X(1) Standby VIH X (1) (1) Rapid Program(2) VIL VIH Ai VPP DIN PGM Verify X VIL Ai VPP DOUT PGM Inhibit VIH VIH X(1) VPP High Z VIH Identification Code Product Identification Notes: (4) VIL VIL X X High Z (5) X (3) A9 = VH A0 = VIH or VIL A1 - A18 = VIL High Z 1. X can be VIL or VIH. 2. Refer to the programming characteristics tables in this data sheet. 3. VH = 12.0 ± 0.5V. 4. Two identifier words may be selected. All Ai inputs are held low (VIL) except A9,which is set to VH , and A0, which is toggled low (VIL) to select the Manufacturer’s Identification word and high (VIH) to select the Device Code word. 5. Standby VCC current (ISB) is specified with VPP = VCC . VCC > VPP will cause a slight increase in ISB . 3 DC and AC Operating Conditions for Read Operation AT27C800 Operating Temperature (Case) Com. Ind. -10 -12 -15 0°C - 70°C 0°C - 70°C 0°C - 70°C -40°C - 85°C -40°C - 85°C -40°C - 85°C 5V ± 10% 5V ± 10% 5V ± 10% VCC Power Supply DC and Operating Characteristics for Read Operation Symbol Parameter Condition ILI Input Load Current ILO Output Leakage Current IPP1(2) VPP (1) Read/Standby Current VCC(1) Standby Current ISB VCC Active Current Min Max Units VIN = 0V to VCC ±1.0 µA VOUT = 0V to VCC ±5.0 µA VPP= VCC ±10 µA 100 µA 1.0 mA 50 mA ISB1 (CMOS) CE = VCC ± 0.3V ISB2 (TTL) CE = 2.0 to VCC + 0.5V f = 5MHz, IOUT = 0 mA, CE = VIL VIL Input Low Voltage -0.6 0.8 V VIH Input High Voltage 2.0 VCC + 0.5 V VOL Output Low Voltage IOL= 2.1 mA 0.4 V VOH Output High Voltage IOH = -400 mA Notes: 2.4 V 1. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP. 2. VPP may be connected directly to VCC except during programming. The supply current would then be the sum of ICC and IPP. AC Characteristics for Read Operation AT27C800 -10 Symbol tACC (3) tCE(2) tOE (2,3) Parameter Condition Max Address to Output Delay CE = OE = VIL 100 CE to Output Delay OE = VIL OE to Output Delay CE = VIL Min -15 Max Min Max Units 120 150 ns 100 120 150 ns 40 40 50 ns 30 35 40 ns tDF(4,5) OE or CE High to Output Float, whichever occured first tOH(4) Output Hold from Address CE or OE, whichever occured first tST BYTE High to Output Valid 100 120 150 ns tSTD BYTE Low to Output Transition 40 50 60 ns Notes: 4 Min -12 2,3,4,5. See the AC Waveforms for Read Operation diagram. AT27C800 5.0 5.0 5.0 ns AT27C800 Byte-Wide Read Mode AC Waveforms(1) Note: 1. BYTE/VPP = VIL Byte-Wide Read Mode AC Waveforms(1) Note: 1. BYTE/VPP = VIH BYTE Transition AC Waveforms A0 - A18 VALID A-1 VALID tOH tACC BYTE/VPP tST O 0 - O7 DATA OUT tOH O8 - O15 DATA OUT HI-Z DATA OUT tSTD Notes: 1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified. 2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE. 3. OE may be delayed up to tACC - tOE after the address is valid without impact on tACC. 4. This parameter is only sampled and is not 100% tested. 5. Output float is defined as the point when data is no longer driven. 5 Input Test Waveforms and Measurement Levels Output Test Load tR, tF < 20 ns (10% to 90%) Note: 1. CL = 100 pF including jig capacitance. Pin Capaticance (f = 1 MHz, T = 25°V)(1) Typ Max Units Conditions CIN 4 10 pF VIN = 0V COUT 8 12 pF VOUT = 0V Note: 6 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested. AT27C800 AT27C800 Programming Waveforms(1) Notes: 1. The Input Timing reference is 0.8V for VIL and 2.0V for VIH. 2. tOE and tDFP are characteristics of the device but must be accommodated by the programmer. 3. When programming the AT27C800, a 0.1 µF capacitor is required across VPP and ground to suppress voltage transients. DC Programming Characteristics TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V Limits Symbol Parameter Test Conditions ILI Input Load Current VIN = VIL, VIH VIL Input Low Level VIH Input High Level VOL Output Low Voltage IOL = 2.1 mA VOH Output High Voltage IOH = -400 µA ICC2 VCC Supply Current (Program and Verify) IPP2 VPP Supply Current VID A9 Product Identification Voltage Min Max Units ±10 µA -0.6 0.8 V 2.0 VCC + 0.5 V 0.4 V 2.4 CE = VIL 11.5 V 50 mA 30 mA 12.5 V 7 AC Programming Characteristics TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V Limits Test Conditions(1) Symbol Parameter tAS Address Setup Time tOES OE Setup Time tDS Data Setup Time tAH Address Hold Time tDH Data Hold Time tDFP OE High to Output Float Delay(2) tVPS VPP Setup Time tVCS VCC Setup Time Input Rise and Fall Times: (10% to 90%) 20 ns. Input Pulse Levels: 45V to 2.4V Input Pulse Levels: Input Timing Reference Level: 0.8V to 2.0V (3) CE Program Pulse Width tOE Data Valid from OE tPRT BYTE /VPP Pulse Rise Time During Programming Max Output Timing Reference Level: 0.8V to 2.0V Units 2 µs 2 µs 2 µs 0 µs 2 µs 0 0.8V to 2.0V tPW Notes: Min 130 ns 2 µs 2 µs 47.5 50 52.5 µs 150 ns ns 1. Vcc must be applied simultaneously or before VPP and removed simultaneously or after VPP. 2. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven— see timing diagram. 3. Program Pulse width tolerance is 50 µs ± 5%. Atmel’s 27C800 Integrated Product Identification Code Pins A0 Codes 8 015 014 013 012 011 010 09 08 07 06 05 04 03 02 01 00 Hex Data Manufacturer 0 0 0 0 1 1 1 1 0 1E1E Device Type 1 1 1 1 1 1 0 0 0 F8F8 AT27C800 AT27C800 Rapid Programming Algorithm A 50 µs CE pulse width is used to program. The address is set to the first location. VCC is raised to 6.5V and BYTE/VPP is raised to 13.0V. Each address is first programmed with one 50 µs CE pulse without verification. Then a verification/ reprogramming loop is executed for each address. In the event a word fails to pass verification, up to 10 successive 50 µs pulses are applied with a verification after each pulse. If the word fails to verify after 10 pulses have been applied, the part is considered failed. After the word verifies properly, the next address is selected until all have been checked. VPP is then lowered to 5.0V and VCC to 5.0V. All words are read again and compared with the original data to determine if the device passes or fails. 9 Ordering Information tACC (ns) 100 120 150 ICC (mA) Active Standby Ordering Code Package 50 0.1 AT27C800-10DC AT27C800-10PC AT27C800-10RC AT27C800-10TC 42DW6 42P6 44R 48T Commercial (0°C to 70°C) 50 0.1 AT27C800-10DI AT27C800-10PI AT27C800-10RI AT27C800-10TI 42DW6 42P6 44R 48T Industrial (-40°C to 85°C) 50 0.1 AT27C800-12DC AT27C800-12PC AT27C800-12RC AT27C800-12TC 42DW6 42P6 44R 48T Commercial (0°C to 70°C) 50 0.1 AT27C800-12DI AT27C800-12PI AT27C800-12RI AT27C800-12TI 42DW6 42P6 44R 48T Industrial (-40°C to 85°C) 50 0.1 AT27C800-15DC AT27C800-15PC AT27C800-15RC AT27C800-15TC 42DW6 42P6 44R 48T Commercial (0°C to 70°C) 50 0.1 AT27C800-15DI AT27C800-15PI AT27C800-15RI AT27C800-15TI 42DW6 42P6 44R 48T Industrial (-40°C to 85°C) Package Type 42DW6 42 Lead, 0.600" Wide, Ceramic Dual Inline Package (CDIP) 42P6 42 Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP) 44R 44 Lead, 0.525" Wide, Plastic Gull Wing Small Outline Package (SOIC/SOP) 48T 48 Lead, Plastic Thin Small Outline Package (TSOP) 12 x 20 mm 10 AT27C800 Operation Range