ADVANCED LINEAR DEVICES, INC. ALD4704A/ALD4704B ALD4704 QUAD RAIL-TO-RAIL CMOS OPERATIONAL AMPLIFIER GENERAL DESCRIPTION FEATURES The ALD4704A/ALD4704B/ALD4704 is a dual monolithic operational amplifier with MOSFET input that has rail-to-rail input and output voltage ranges. The input voltage range and output voltage range are very close to the positive and negative power supply voltages. Typically the input voltage can be beyond positive power supply voltage V+ or the negative power supply voltage V- by up to 300mV. The output voltage swings to within 60mV of either positive or negative power supply voltages at rated load. • • • • • • • • With high impedance load, the output voltage of the ALD4704A/ ALD4704B/ALD4704 approaches within 1mV of the power supply rails. This device is designed as an alternative to the popular J-FET input operational amplifier in applications where lower operating voltages, such as 9V battery or ±3.25V to ±5V power supplies are being used. The ALD4704A/ALD4704B/ALD4704 offers high slew rate of 5V/µs. It is designed and manufactured with Advanced Linear Devices' standard enhanced ACMOS silicon gate CMOS process, and it offers low unit cost and exceptional reliability. The rail-to-rail input and output feature of the ALD4704A/ALD4704B/ ALD4704 expands signal voltage range for a given operating supply voltage and allows numerous analog serial stages to be implemented without losing operating voltage margin. The output stage is designed to drive up to 10mA into 400pF capacitive and 1.5KΩ resistive loads at unity gain and up to 4000pF at a gain of 5. Short circuit protection to either ground or the power supply rails is at approximately 15mA clamp current. Due to complementary output stage design, the output can source and sink 10mA into a load with symmetrical drive and is ideally suited for applications where push-pull voltage drive is desired. For each of the operational amplifier, the offset voltage is trimmed onchip to eliminate the need for external nulling in many applications. For precision applications, the output is designed to settle to 0.1% in 2µs. In large signal buffer applications, the operational amplifier can function as an ultrahigh input impedance voltage follower /buffer that allows input and output voltage swings from positive to negative supply voltages. This feature is intended to greatly simplify systems design and eliminate higher voltage power supplies in many applications. Additionally, robust design and rigorous screening make this device especially suitable for operation in temperature-extreme environments and rugged conditions. ORDERING INFORMATION (“L” suffix denotes lead-free (RoHS)) Operating Temperature Range 0°C to +70°C 0°C to +70°C -55°C to 125°C 14-Pin Small Outline Package (SOIC) 14-Pin Plastic Dip Package 14-Pin CERDIP Package ALD4704ASBL ALD4704BSBL ALD4704SBL ALD4704APBL ALD4704BPBL ALD4704PBL ALD4704ADB ALD4704BDB ALD4704DB * Contact factory for leaded (non-RoHS) or high temperature versions. • • • • • Rail-to-rail input and output voltage ranges 5.0V/µs slew rate Symmetrical push-pull output drive Inputs can extend beyond supply rails by 300mV Outputs settle to 2mV of supply rails High capacitive load capability -- up to 4000pF No frequency compensation required -- unity gain stable Extremely low input bias currents -- 1.0pA typical (20pA max.) Ideal for high source impedance applications High voltage gain -- 100V/mV typical Output short circuit protected Unity gain bandwidth of 2.1MHz Suitable for rugged, temperature-extreme environments APPLICATIONS • • • • • • • • • • • • • • • Voltage amplifier Voltage follower/buffer Charge integrator Photodiode amplifier Data acquisition systems High performance portable instruments Signal conditioning circuits Low leakage amplifiers Active filters Sample/Hold amplifier Picoammeter Current to voltage converter Coaxial cable driver Capacitive sensor amplifier Piezoelectric transducer amplifier PIN CONFIGURATION OUT A 1 14 OUT D -IN A 2 13 -IN D +IN A 3 12 +IN D V+ 4 11 V- +IN B 5 10 +IN C -IN B 6 9 -IN C OUT B 7 8 OUT C TOP VIEW SBL, PBL, DB PACKAGES Rev 2.0 ©2010 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, CA 94089-1706 Tel: (408) 747-1155 Fax: (408) 747-1286 www.aldinc.com ABSOLUTE MAXIMUM RATINGS Supply voltage, V+ referenced to VSupply voltage, VS referenced to VDifferential input voltage range Power dissipation Operating tempurature range SBL, PBL packages DB package Storage tempurature range Lead tempurature, 10 seconds CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment. -0.3V to V++10.6V ±5.3V -0.3V to V+ +0.3V 600 mW 0°C to +70°C -55°C to +125°C -65°C to +150°C +260°C OPERATING ELECTRICAL CHARACTERISTICS TA = 25°C VS = ±5.0V unless otherwise specified VS V+ Input Offset Voltage VOS Input Offset Current IOS 1.0 15 240 1.0 15 240 Input Bias Current IB 1.0 20 300 1.0 20 300 Input Voltage Range VIR Input Resistance RIN Input Offset Voltage Drift TCVOS Power Supply Rejection Ratio PSRR 65 80 65 80 60 Common Mode Rejection Ratio CMRR 65 83 65 83 Large Signal Voltage Gain AV 15 28 100 15 28 100 Output Voltage Range VO low VO high VO low VO high Output Short Circuit Current ISC 15 Supply Current IS 10 Power Dissipation PD Input Capacitance CIN 1 1 1 Bandwidth BW 2.1 2.1 2.1 MHz Slew Rate SR 5.0 5.0 5.0 V/µs AV = +1 RL = 2.0KΩ Rise time tr 0.1 0.1 0.1 µs RL = 10KΩ 15 15 15 % RL = 10KΩ CL = 100pF ALD4704A/ALD4704B ALD4704 Min ±5.0 ±3.25 10.0 6.5 5.3 Unit Test Conditions V V Dual Supply Single Supply 5.0 6.0 mV mV RS ≤ 100KΩ 0°C ≤ TA ≤ +70°C 1.0 15 240 pA pA TA = 25°C 0°C ≤ TA ≤ +70°C 1.0 20 300 pA pA TA = 25°C 0°C ≤ TA ≤ +70°C 5.3 V ±5.0 ±3.25 10.0 6.5 1.0 1.5 -5.3 Min 4704 Typ Supply Voltage ±3.25 6.5 Max 4704B Typ Max Symbol Overshoot Factor Min 4704A Typ Parameter ±5.0 10.0 2.0 3.0 -5.3 5.3 -5.3 1012 1012 1012 5 5 5 -4.96 4.95 -4.998 4.99 4.998 -4.90 4.90 -4.96 -4.90 4.95 -4.998 -4.99 4.99 4.998 4.90 -4.99 10 130 Ω µV/°C RS ≤ 100KΩ 80 dB RS ≤ 100KΩ 0°C ≤ TA ≤ +70°C 60 83 dB RS ≤ 100KΩ 0°C ≤ TA ≤ +70°C 10 28 100 V/mV V/mV V/mV RL = 100KΩ RL ≥ 1MΩ RL = 10KΩ V V V V RL = 10KΩ 0°C ≤ TA ≤ +70°C RL ≥ 1MΩ 0°C ≤ TA ≤ +70°C -4.96 4.95 -4.998 4.99 4.998 -4.90 4.90 15 13 Max -4.99 15 13 10 130 Advanced Linear Devices mA 13 mA VIN = -5.0V No Load 130 mW All amplifiers, No Load VS = ±5.0V pF 2 of 9 OPERATING ELECTRICAL CHARACTERISTICS (cont'd) TA = 25°C VS = ±5.0V unless otherwise specified 4704A Typ Max Min Typ 4704 Symbol Maximum Load Capacitance CL 400 4000 400 4000 400 4000 Input Noise Voltage en 26 26 Input Current Noise in 0.6 ts 5.0 2.0 Settling Time Min 4704B Parameter Max Min Typ Max Unit Test Conditions pF pF Gain = 1 Gain = 5 26 nV/√Hz f =1KHz 0.6 0.6 fA/√Hz f =10Hz 5.0 2.0 5.0 2.0 µs µs 0.01% 0.1% AV = -1 RL = 5KΩ CL= 50pF VS = ±5.0V -55°C ≤ TA ≤ +125°C unless otherwise specified Min 4704ADB Typ Max 4704DB Typ Max Unit 4.0 7.0 mV 8.0 8.0 8.0 nA 10.0 10.0 10.0 nA Parameter Symbol Input Offset Voltage VOS 2.0 Input Offset IOS Min 4704BDB Typ Max Min Test Conditions RS ≤ 100KΩ Current Input Bias Current IB Power Supply Rejection Ratio PSRR 60 75 60 75 60 75 dB RS ≤ 100KΩ Common Mode Rejection Ratio CMRR 60 83 60 83 60 83 dB RS ≤ 100KΩ Large Signal Voltage Gain AV 10 25 10 25 10 25 V/mV RL =10KΩ Output Voltage VO low Range VO high ALD4704A/ALD4704B ALD4704 -4.9 4.8 4.9 -4.8 -4.9 4.8 4.9 -4.8 -4.9 4.8 Advanced Linear Devices 4.9 -4.8 V RL =10KΩ V RL =10KΩ 3 of 9 Design & Operating Notes: 1. The ALD4704A/ALD4704B/ALD4704 CMOS operational amplifier uses a 3 gain stage architecture and an improved frequency compensation scheme to achieve large voltage gain, high output driving capability, and better frequency stability. The ALD4704A/ALD4704B/ ALD4704 is internally compensated for unity gain stability using a novel scheme. This design produces a clean single pole roll off in the gain characteristics while providing for more than 70 degrees of phase margin at the unity gain frequency. A unity gain buffer using the ALD4704A/ALD4704B/ALD4704 will typically drive 400pF of external load capacitance without stability problems. In the inverting unity gain configuration, it can drive up to 800pF of load capacitance. Compared to other CMOS operational amplifiers, the ALD4704A/ALD4704B/ ALD4704 is much more resistant to parasitic oscillations. 2. The ALD4704A/ALD4704B/ALD4704 has complementary p-channel and n-channel input differential stages connected in parallel to accomplish rail to rail input common mode voltage range. With the common mode input voltage close to the power supplies, one of the two differential stages is switched off internally. To maintain compatibility with other operational amplifiers, this switching point has been selected to be about 1.5V above the negative supply voltage. As offset voltage trimming on the ALD4704A/ALD4704B/ALD4704 is made when the input voltage is symmetrical to the supply voltages, this internal switching does not affect a large variety of applications such as an inverting amplifier or non-inverting amplifier with a gain greater than 2.5 (5V operation), where the common mode voltage does not make excursions below this switching point. 3. The input bias and offset currents are essentially input protection diode reverse bias leakage currents, and are typically less than 1pA at room Temperature. This low input bias current assures that the analog signal from the source will not be distorted by input bias currents. For applications where source impedance is very high, it may be necessary to limit noise and hum pickup through proper shielding. 4. The output stage consists of class AB complementary output drivers, capable of driving a low resistance load. The output voltage swing is limited by the drain to source on-resistance of the output transistors as determined by the bias circuitry, and the value of the load resistor when connected. In the voltage follower configuration, the oscillation resistant feature, combined with the rail to rail input and output feature, makes the ALD4704A/ALD4704B/ALD4704 an effective analog signal buffer for medium to high source impedance sensors, transducers, and other circuit networks. 5. The ALD4704A/ALD4704B/ALD4704 operational amplifier has been designed with static discharge protection and to minimize latch up. However, care must be exercised when handling the device to avoid strong static fields. In using the operational amplifier, the user is advised to power up the circuit before, or simultaneously with, any input voltages applied and to limit input voltages to not exceed 0.3V of the power supply voltage levels. Alternatively, a 100KΩ or higher value resistor at the input terminals will limit input currents to acceptable levels while causing very small or negligible accuracy effects. TYPICAL PERFORMANCE CHARACTERISTICS OPEN LOOP VOLTAGE GAIN AS A FUNCTION OF SUPPLY VOLTAGE AND TEMPERATURE COMMON MODE INPUT VOLTAGE RANGE AS A FUNCTION OF SUPPLY VOLTAGE 1000 ±7 OPEN LOOP VOLTAGE GAIN (V/mV) ±6 ±5 ±4 } -55°C } +25°C 100 } +125°C 10 ±3 RL= 10KΩ RL= 5KΩ 1 ±2 ±3 ±2 ±5 ±4 ±6 0 ±7 ±2 INPUT BIAS CURRENT AS A FUNCTION OF AMBIENT TEMPERATURE ±8 ±6 SUPPLY CURRENT AS A FUNCTION OF SUPPLY VOLTAGE 10000 8 SUPPLY CURRENT (mA) INPUT BIAS CURRENT (pA) ±4 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) VS = ±5.0V 1000 100 10 1.0 INPUTS GROUNDED OUTPUT UNLOADED 7 6 5 TA = -55°C 4 -25°C +25°C +80°C +125°C 3 2 1 0 0.1 -50 -25 0 25 50 75 100 125 AMBIENT TEMPERATURE (°C) ALD4704A/ALD4704B ALD4704 0 ±1 ±2 ±3 ±4 ±5 ±6 ±7 SUPPLY VOLTAGE (V) Advanced Linear Devices 4 of 9 ±7 INPUT E (V) COMMON MODE INPUT VOLTAGE RANGE (V) TA = 25°C ±6 ±5 TYPICAL PERFORMANCE CHARACTERISTICS (cont'd) OPEN LOOP VOLTAGE AS A FUNCTION OF FREQUENCY OUTPUT VOLTAGE SWING AS A FUNCTION OF SUPPLY VOLTAGE 120 100 OPEN LOOP VOLTAGE GAIN (dB) -55°C ≤ TA ≤ 125°C ±6 RL = 10KΩ ±5 RL = 10KΩ ±4 RL = 2KΩ ±3 ±2 VS = ±5.0V TA = 25°C 80 60 0 40 45 20 90 0 135 180 -20 0 ±1 ±2 ±3 ±4 ±5 ±6 ±7 1 10 100 SUPPLY VOLTAGE (V) 1M 10M 15 INPUT OFFSET VOLTAGE (mV) INPUT OFFSET VOLTAGE (mV) 100K INPUT OFFSET VOLTAGE AS A FUNCTION OF COMMON MODE INPUT VOLTAGE VS = ±5.0V +3 +2 +1 0 -1 -2 -3 -4 VS = ±5.0V TA = 25ºC 10 5 0 -5 -10 -15 -5 -50 -25 0 +25 +50 +75 -4 +100 +125 -2 0 +2 +4 +6 COMMON MODE INPUT VOLTAGE (V) AMBIENT TEMPERATURE (°C) VOLTAGE NOISE DENSITY AS A FUNCTION OF FREQUENCY OPEN LOOP VOLTAGE GAIN AS A FUNCTION OF LOAD RESISTANCE 150 VOLTAGE NOISE DENSITY (nV/ √ Hz) 1000 OPEN LOOP VOLTAGE GAIN (V/mV) 10K FREQUENCY (Hz) INPUT OFFSET VOLTAGE AS A FUNCTION OF AMBIENT TEMPERATURE REPRESENTATIVE UNITS +5 +4 1K PHASE SHIFT IN DEGREES OUTPUT VOLTAGE SWING (V) ±7 100 VS = ±5.0V TA = 25°C 10 125 VS = ±5.0V TA = 25°C 100 75 50 25 0 1 1K 10K 100K 1000K 10 100 LOAD RESISTANCE (Ω) LARGE - SIGNAL TRANSIENT RESPONSE 10K 100K 1000K SMALL - SIGNAL TRANSIENT RESPONSE 5V/div VS = ±5.0V TA = 25°C RL = 1KΩ CL = 50pF 5V/div 2µs/div ALD4704A/ALD4704B ALD4704 1K FREQUENCY (Hz) Advanced Linear Devices 100mV/div 50mV/div VS = ± 5.0V TA = 25°C RL = 1.0KΩ CL = 50pF 1µs/div 5 of 9 TYPICAL APPLICATIONS RAIL-TO-RAIL VOLTAGE FOLLOWER/BUFFER RAIL-TO-RAIL VOLTAGE COMPARATOR +12V +10V = 1012Ω ZIN ~ 0.1µF VIN CL + 400pF VIN VOUT +12V VOUT RL ≥ 1.5KΩ 0 ≤ VIN ≤ 10V 0.1µF + 50K 10M PHOTO DETECTOR CURRENT TO VOLTAGE CONVERTER LOW OFFSET SUMMING AMPLIFIER 10K 50K +5V INPUT 1 RF = 5M 0.1µF I - INPUT 2 10K VOUT GAIN = 5 + CL = 4000pF * Circuit Drives Large Load Capacitance ≤ 4000pF + -5V 0.1µF WIEN BRIDGE OSCILLATOR (RAIL-TO -RAIL) SINE WAVE GENERATOR ~ f= VIN 10K -5V .01µF R = 10K C = .01µF V OUT + -5V 10K 1 ~ 1.6K Hz = 2πRC RF VIN 5K R1 R1 C1 +5V 1 MΩ 10K BANDPASS NETWORK LOW PASS FILTER (RFI FILTER) 5K 100K C2 +9V R2 - 0.02µF C1 VOUT + VIN R1 - 1 = 3.2kHz π R1C1 Gain = 10 Frequency roll-off 20dB/decade ALD4704A/ALD4704B ALD4704 +5V VOUT + Cutoff frequency = RL ≥ 1.5K -5V 1000 pF VOUT + VOUT = 1 X RF PRECISION CHARGE INTEGRATOR +5V - +5V PHOTODIODE Low Frequency Breakpoint ƒL = High Frequency Cutoff ƒH = Advanced Linear Devices 1 = 160Hz 2π R1C1 1 = 32KHz 2π R2C2 -5V R1 = 10K C1 = 100nF R2 = 10K C2 = 500pF 6 of 9 SOIC-14 PACKAGE DRAWING 14 Pin Plastic SOIC Package Millimeters E S (45°) Dim Min A 1.35 Max 1.75 Min 0.053 Max 0.069 A1 0.10 0.25 0.004 0.010 b 0.35 0.45 0.014 0.018 C 0.18 0.25 0.007 0.010 D-14 8.55 8.75 0.336 0.345 E 3.50 4.05 0.140 0.160 1.27 BSC e D A Inches 0.050 BSC H 5.70 6.30 0.224 0.248 L 0.60 0.937 0.024 0.037 ø 0° 8° 0° 8° S 0.25 0.50 0.010 0.020 A1 e b S (45°) H L ALD4704A/ALD4704B ALD4704 C ø Advanced Linear Devices 7 of 9 PDIP-14 PACKAGE DRAWING 14 Pin Plastic DIP Package Millimeters E E1 D S A2 A1 A L Dim A Min Inches 3.81 Max 5.08 Min 0.105 Max 0.200 A1 0.38 1.27 0.015 0.050 A2 1.27 2.03 0.050 0.080 b 0.89 1.65 0.035 0.065 b1 0.38 0.51 0.015 0.020 c 0.20 0.30 0.008 0.012 D-14 17.27 19.30 0.680 0.760 E 5.59 7.11 0.220 0.280 E1 7.62 8.26 0.300 0.325 e 2.29 2.79 0.090 0.110 e1 7.37 7.87 0.290 0.310 L 2.79 3.81 0.110 0.150 S-14 1.02 2.03 0.040 0.080 ø 0° 15° 0° 15° e b b1 c e1 ALD4704A/ALD4704B ALD4704 ø Advanced Linear Devices 8 of 9 CERDIP-14 PACKAGE DRAWING 14 Pin CERDIP Package Millimeters E E1 D A1 s A L L1 L2 b b1 e Inches Dim A Min Max Min 3.55 5.08 0.140 Max 0.200 A1 1.27 2.16 0.050 0.085 b 0.97 1.65 0.038 0.065 b1 0.36 0.58 0.014 0.023 C 0.20 0.38 0.008 0.015 D-14 -- 19.94 -- 0.785 E 5.59 7.87 0.220 0.310 E1 7.73 8.26 0.290 0.325 e 2.54 BSC 0.100 BSC e1 7.62 BSC 0.300 BSC L 3.81 5.08 0.150 0.200 L1 3.18 -- 0.125 -- L2 0.38 1.78 0.015 0.070 S -- 2.49 -- 0.098 Ø 0° 15° 0° 15° C e1 ALD4704A/ALD4704B ALD4704 ø Advanced Linear Devices 9 of 9