Renesas HD26LS31P Quadruple differential line drivers with 3 state output Datasheet

HD26LS31
Quadruple Differential Line Drivers With 3 State Outputs
REJ03D0294–0200Z
(Previous ADE-205-576 (Z))
Rev.2.00
Jul.16.2004
Description
The HD26LS31 features quadruple differential line drivers which satisfy the requirements of EIA standard RS-422A.
This device is designed to provide differential signals with high current capability on bus lines. The circuit provides
enable input to control all four drivers. The output circuit has active pull up and pull down and is capable of sinking or
sourcing 40 mA.
Features
• Ordering Information
Part Name
HD26LS31P
Package Type
DILP-16 pin
Package Code
DP-16E, -16FV
Package
Abbreviation
P
—
Logic Diagram
1A
1Y
1Z
2A
2Y
2Z
3A
3Y
3Z
4A
4Y
4Z
Enable G
Enable G
Rev.2.00, Jul.16.2004, page 1 of 11
Taping Abbreviation
(Quantity)
HD26LS31
Pin Arrangement
1A 1
16 VCC
1Y 2
15 4A
1Z 3
14 4Y
Enable G 4
13 4Z
2Z 5
12 Enable G
2Y 6
11 3Z
2A 7
10 3Y
GND 8
9 3A
(Top view)
Function Table
Input
A
Enables
G
Outputs
Y
G
Z
H
L
H
H
X
X
H
L
L
H
H
L
X
X
L
L
H
L
L
H
X
H
L
X
Z
L
H
Z
Z
:
:
:
:
High level
Low level
Irrelevant
High impedance (Off)
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Supply Voltage
VCC
7.0
V
Input Voltage
Output Voltage
VIN
VOUT
7.0
5.5
V
V
Power Dissipation
Storage Temperature Range
PT
Topr
1
0 to +70
W
°C
Lead Temperature Range
Tstg
–65 to +150
°C
Note: 1. The absolute maximum ratings are values which must not individually be exceeded, and furthermore, no two
of which may be realized at the same time.
Recommended Operating Conditions
Item
Supply Voltage
Symbol
VCC
Min
4.75
Typ
5.0
Max
5.25
V
VCC
Output Current
Output Current
IOH
IOL
—
—
—
—
–40
40
mA
mA
All Output
All Output
Operating Temperature
Topr
0
25
70
—
—
Rev.2.00, Jul.16.2004, page 2 of 11
Unit
Application Terminal
HD26LS31
Electrical Characteristics (Ta = 0 to +70°C)
Item
Input Voltage
Symbol
VIH
VIL
Min Typ*1 Max
Unit
2.0
—
—
—
—
0.8
—
2.5
—
—
–1.5
—
VOH
VOL
—
—
—
—
2.4
0.5
Output Current
IOZL
IOZH
—
—
—
—
–20
20
mA
Input Current
II
IIH
—
—
—
—
0.1
20
mA
µA
IIL
Short Circuit Output IOS*2
Current
—
–30
—
—
Supply Current
—
32
Input Clamp Voltage VIK
Output Voltage
VOH
ICC
V
Application
Terminal
Conditions
All Inputs
VCC = 4.75 V, II = –18 mA
VCC = 4.75 V
IOH = –20 mA
All Outputs
IOH = –40 mA
IOL = 40 mA
VCC = 5.25 V
VCC = 5.25 V
VO = 0.5 V
VO = 2.5 V
All Inputs
VCC = 5.25 V
VI = 7 V
VI = 2.7 V
–0.36 mA
–150
All Outputs
VCC = 5.25 V
80
VCC
VCC = 5.25 V
VI = 0.4 V
Notes: 1. All typical values are at VCC = 5 V, Ta = 25°C
2. Not more than one output should be shorted at a time and duration of the short circuit should not exceed one
second.
Switching Characteristics (VCC = 5 V, Ta = 25°C)
Item
Symbol Min Typ Max Unit
Propagation Delay Time
tPLH
tPHL
—
—
14
14
20
20
ns
ns
Output Enable Time
tZH
tZL
—
—
25
37
40
45
Output Disable Time
tHZ
tLZ
—
—
21
23
Complementary Output To
Output
Skew
—
1
Rev.2.00, Jul.16.2004, page 3 of 11
Application
terminal
All Outputs
Test
circuit
Conditions
1
CL = 30 pF
ns
ns
2
3
CL = 30 pF, RLΩ= 75
CL = 30 pF, RLΩ= 180
30
35
ns
ns
2
3
CL = 10 pF
CL = 10 pF
6
ns
1
CL = 30 pF
HD26LS31
Test Circuit 1
4.5 V
G
Input
Output
G
Pulse Generator
PRR = 1MHz
Duty Cycle 50%
Zout = 50Ω
A
Z
CL =
30 pF
Y
CL =
30 pF
Output
Note:
1. CL includes probe and jig capacitance.
Waveforms
tr
tf
2.7 V
1.3 V
Input
3V
2.7 V
1.3 V
0.3 V
0.3 V
t PLH
0V
t PHL
VOH
Output Y
1.5 V
1.5 V
Skew
t PHL
Skew
VOL
t PLH
VOH
Output Z
1.5 V
1.5 V
VOL
Rev.2.00, Jul.16.2004, page 4 of 11
HD26LS31
Test Circuit 2
VCC
4.5 V
Output
180 Ω
A
Y
Input
Pulse Generator
PRR = 1 MHz
Duty Cycle 50%
Zout = 50Ω
CL
Z
Output
180 Ω
G
G
CL
Note:
S1
75 Ω
S1
75 Ω
1. CL includes probe and jig capacitance.
Waveforms
tr
Enable G
Enable G
tf
2.7 V
1.5 V
0.3 V
0.3 V
S1 : Open
t ZH
Output
1.5 V
S1 Open
Rev.2.00, Jul.16.2004, page 5 of 11
3V
2.7 V
1.5 V
0V
S1 : Closed
t HZ
0.5 V
VOH
1.5 V
0V
HD26LS31
Test Circuit 3
4.5 V
VCC
Output
180 Ω
A
Y
Input
CL
75 Ω
S2
Z
Pulse Generator
PRR = 1 MHz
Duty Cycle 50%
Zout = 50Ω
Output
G
180 Ω
G
CL
75 Ω
S2
Note:
1. CL includes probe and jig capacitance.
Waveforms
tf
tr
Enable G
Enable G
2.7 V
1.5 V
0.3 V
0.3 V
S2 : Open
t ZL
Output
3V
2.7 V
1.5 V
0V
S2 : Closed
t LZ
4.5 V
1.5 V
1.5 V
0.5 V
Rev.2.00, Jul.16.2004, page 6 of 11
VOL
HD26LS31
HD26LS31 Line Driver Applications
The HD26LS31 is a line driver that meets the EIA RS-422A conditions, and has been designed to supply a high current
for differential signals to a bus line. Its features are listed below.
•
•
•
•
•
Operates on a single 5 V power supply.
High output impedance when power is off
Three-state output
On-chip current limiter circuit
Sink current and source current both 40 mA
A block diagram is shown in figure 1. The enable function is common to all four drivers, and either active-high or
active-low can be selected.
The output section consists of two output stages (the Y side and Z side), each of which has the same sink current and
source current capacity.
Input is TTL compatible, and an output current limiter circuit is built into the output stage as shown in figure 2.
1A
1Y
1Z
2A
2Y
2Z
3A
3Y
3Z
4A
4Y
4Z
Enable G
Enable G
Figure 1 HD26LS31 Block Diagram
The output current limiter circuit consists of transistor Q1 and resistance R1, and operates when the voltage drop on both
sides of R1 reaches approximately 0.7 V. At this time the current, i, is as follows:
i = 0.7 (V) / 9 (Ω)≈ 78 (mA)
When a current greater than this flows, Q1 is turned on, the Q2 base current flows to the output side, and the flow of an
excessively large output current is prevented.
However, since this type of current limiter circuit has the characteristics shown in figure 3, the output stage power
dissipation is large.
Therefore, when the output is shorted, this should be limited to a maximum of one second for one pin only.
The IOL vs. VOL characteristic for low-level output is shown in figure 4.
An example of termination resistance connection when the HD26LS31 is used as a balanced differential type driver is
shown.
VCC
Q2
Q3
Q1
R1
9Ω
Output
Q4
Figure 2 Output Stage Circuit Configuration
Rev.2.00, Jul.16.2004, page 7 of 11
HD26LS31
When termination resistance RT is connected between the two transmission lines, as shown in figure 7 the current path
situation is that current IOH on the side outputting a high level (in this case, the Y output) flows to the side outputting a
low level (in this case, the Z output) via RT, with the result that the low level rise is large.
If termination resistance RT is dropped to GND on both transmit lines, as shown in figure 5 the current path situation is
that the current that flows into the side outputting a low level (in this case, the Z output) is only the input bias current
from the receiver. As this input bias current is small compared with the signal current, it has almost no effect on the
differential input signal at the receiver end.
Figure 6 shows the output voltage characteristics when termination resistance RT is varied.
Also, when used in a party line system, etc., the low level rises further due to the receiver input bias current, so that it is
probably advisable to drop the termination resistance to GND.
However, the fact that it is possible to make the value of RT equal to the characteristic impedance of the transmission
line offers the advantage of being able to hold the power dissipation on the side outputting a high level to a lower level
than in the above case.
Consequently, the appropriate use must be decided according to the actual operating conditions (transmission line
characteristics, transmission distance, whether a party line is used, etc.).
Figure 8 shows the output voltage characteristics when termination resistance RT is varied.
Output Voltage VOH (V)
5.0
VCC = 5.0 V
4.0
Ta = 25°C
VC =
C
5.25
3.0
V
VC =
C
4.75 V
2.0
1.0
0
–20
–40
–60
–80
–100
Output Current IOH (mA)
Figure 3 IOH vs. VOH Characteristics
Output Voltage VOL (V)
0.5
Ta = 25°C
0.4
VCC = 4.75 V
0.3
VCC = 5.0 V
VCC = 5.25 V
0.2
0.1
0
10
20
30
40
50
Output Current IOL (mA)
Figure 4 IOL vs. VOL Characteristics
Rev.2.00, Jul.16.2004, page 8 of 11
HD26LS31
Y
"H"
IOH
RT
RT
"L"
Z
IIN (Receiver)
Z
RT = O
2
ZO is the transmission line characteristic
impedance
Output Voltage VOH (Y), VOL (Z) (V)
Figure 5 Example of Driver Use-1
5
VOH (Y)
2
1.0
VCC = 5 V
Ta = 25°C
Y
RT
0.5
"H"
VOL (Z)
Z
0.1
0.05
10
VOH
RT
0.2
GND
20
50 100 200 500 1 k 2 k
5 k 10 k 20 k 50 k
Termination Resistance RT (Ω)
Figure 6 Termination Resistance vs. Output Voltage Characteristics
Y
"H"
IOH
RT
"L"
Z
IOL
IIN (Receiver)
RT = ZO
ZO is the transmission line characteristic
impedance
Figure 7 Example of Driver Use-2
Rev.2.00, Jul.16.2004, page 9 of 11
VOL
HD26LS31
A feature of termination implemented as shown in figure 9 is that power dissipation is low when the duty of the
transmitted signal is high.
However, care is required, since if RT is sufficiently small, when the output on the pulled-up side goes low, since the
inverter transistor (Q4 in figure 2) has no protection circuit, and so a large current will flow and the output low level will
rise.
Figure 10 shows the output voltage characteristics when termination resistance RT is varied.
Output Voltage VOH (Y), VOL (Z) (V)
With the method of using the driver described above, if termination resistance RT becomes sufficiently small, the region
within which the output current limiter circuit operates will be entered, as can be seen from the IOH vs. VOH
characteristics shown in figure 3. In this region, the output stage power dissipation is large and the output voltage
changes abruptly. A measure such as insertion of a capacitor in series with the termination resistance is therefore
necessary. Consequently, when selecting the transmission line, the circuit termination resistance to be used requires
careful consideration.
5
VOH (Y)
2
1.0
0.5
VCC = 5 V
Ta = 25°C
Y
0.2
VOL (Z)
RT
"H"
VOH
0.1
Z
0.05
10
20
50 100 200 500 1 k 2 k
5 k 10 k 20 k
Termination Resistance RT (Ω)
GND
50 k
VOL
Figure 8 Termination Resistance vs. Output Voltage Characteristics
VCC
Y
RT
Data input
Z
RT
Output Voltage VOH (Y), VOL (Z) (V)
Figure 9 Example of Driver Use-3
5
VOH (Z)
2
1.0
Y
RT
VCC VCC = 5 V
Ta = 25°C
0.5
"L"
VOL
VOL (Y)
0.2
Z
0.1
0.05
10
20
50 100 200 500 1 k 2 k
5 k 10 k 20 k
Termination Resistance RT (Ω)
RT
GND
50 k
Figure 10 Termination Resistance vs. Output Voltage Characteristic
Rev.2.00, Jul.16.2004, page 10 of 11
VOH
HD26LS31
Package Dimensions
As of January, 2003
Unit: mm
19.2
20.32 Max
9
6.3
7.4 Max
16
1
8
0.48 ± 0.1
2.54 ± 0.25
2.54 Min 5.06 Max
0.51 Min
1.3
0.89
7.62
+ 0.1
0.25 – 0.05
0˚ – 15˚
Package Code
JEDEC
JEITA
Mass (reference value)
DP-16E
Conforms
Conforms
1.05 g
Unit: mm
19.2
20.32 Max
9
6.3
7.4 Max
16
1
8
*0.48 ± 0.08
2.54 Min 5.06 Max
2.54 ± 0.25
1.3
0.51 Min
0.89
7.62
*0.25 ± 0.06
0˚ – 15˚
*NI/Pd/AU Plating
Rev.2.00, Jul.16.2004, page 11 of 11
Package Code
JEDEC
JEITA
Mass (reference value)
DP-16FV
Conforms
Conforms
1.05 g
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