CYSTEKEC MTB1KA20KQ8-0-T3-G Dual n-channel enhancement mode power mosfet Datasheet

Spec. No. : C043Q8
Issued Date : 2017.08.17
Revised Date :
Page No. : 1/9
CYStech Electronics Corp.
Dual N-Channel Enhancement Mode Power MOSFET
MTB1K0A20KQ8
Features
• Simple drive requirement
• Low on-resistance
• Fast switching speed
• Dual N-ch MOSFET package
• ESD protected gate
• Pb-free lead plating & Halogen-free package
Equivalent Circuit
BVDSS
ID@VGS=10V, TA=25°C
ID@VGS=10V, TA=70°C
RDSON@VGS=10V, ID=1A
RDSON@VGS=4.5V, ID=1A
200V
0.9A
0.72A
755mΩ(typ)
785mΩ(typ)
Outline
SOP-8
MTB1K0A20KQ8
D2
D2
D1
D1
G:Gate D:Drain S:Source
Pin 1
S1
G1
S2
G2
Ordering Information
Device
MTB1KA20KQ8-0-T3-G
Package
SOP-8
(Pb-free lead plating and halogen-free package)
Shipping
2500 pcs / tape & reel
Environment friendly grade : S for RoHS compliant products, G for RoHS
compliant and green compound products
Packing spec, T3 : 2500 pcs / tape & reel, 13” reel
Product rank, zero for no rank products
Product name
MTB1K0A20KQ8
Preliminary
CYStek Product Specification
Spec. No. : C043Q8
Issued Date : 2017.08.17
Revised Date :
Page No. : 2/9
CYStech Electronics Corp.
Absolute Maximum Ratings (Ta=25°C)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current @ VGS=10V, TC=25°C
Continuous Drain Current @ VGS=10V, TC=100°C
Continuous Drain Current @ VGS=10V, TA=25°C
Continuous Drain Current @ VGS=10V, TA=70°C
Pulsed Drain Current
Avalanche Current @ L=0.1mH
Avalanche Energy @ L=1mH, ID=2A, VDD=50V
Symbol
Limits
VDS
VGS
200
±20
1.4
0.89
0.9
0.72
6
2
2
2
ID
IDM
IAS
EAS
Power Dissipation for Dual Operation
PD
Power Dissipation for Single Operation
Operating Junction and Storage Temperature Range
Tj, Tstg
Unit
V
(Note 2)
(Note 2)
A
(Note 1)
(Note 4)
mJ
1.6 (Note 2)
0.9 (Note 3)
W
-55~+150
°C
Thermal Data
Parameter
Thermal Resistance, Junction-to-case, max
Thermal Resistance, Junction-to-ambient, max, dual
Symbol
RθJC
Thermal Resistance, Junction-to-ambient, max , single operation
RθJA
Value
Unit
25
62.5
°C/W
78 (Note 2)
135 (Note 3)
Note : 1. Pulse width limited by maximum junction temperature
2. Surface mounted on 1 in² copper pad of FR-4 board, pulse width≤10s.
3. Surface mounted on minimum copper pad, pulse width≤10s.
Characteristics (Tj=25°C, unless otherwise specified)
Symbol
Min.
Typ.
Max.
BVDSS
VGS(th)
GFS
IGSS
200
1
-
3
0.755
0.785
2.5
±10
1
25
2
3
-
8.5
1.1
2.9
12.8
-
Unit
Test Conditions
Static
*1
IDSS
RDS(ON)
*1
V
S
μA
Ω
VGS=0V, ID=250μA
VDS =VGS, ID=250μA
VDS =10V, ID=1A
VGS=±16V, VDS=0V
VDS =160V, VGS =0V
VDS =160V, VGS =0V, Tj=70°C
VGS =10V, ID=1A
VGS =4.5V, ID=1A
Dynamic
Qg
Qgs
Qgd
*1, 2
*1, 2
*1, 2
MTB1K0A20KQ8
nC
VDS=160V, ID=1A, VGS=10V
Preliminary
CYStek Product Specification
CYStech Electronics Corp.
td(ON) *1, 2
tr
*1, 2
td(OFF) *1, 2
tf *1, 2
Ciss
Coss
Crss
Source-Drain Diode
IS *1
ISM *3
VSD *1
trr *1
Qrr *1
-
16.4
27
101
72
277
15
8.7
24.6
40.5
152
108
415
22.5
13.1
-
0.79
32
35
0.9
6
1
-
Spec. No. : C043Q8
Issued Date : 2017.08.17
Revised Date :
Page No. : 3/9
ns
VDS=100V, ID=2A, VGS=10V,
RG=1Ω
pF
VGS=0V, VDS=100V, f=1MHz
A
V
ns
nC
IS=1A, VGS=0V
IF=1A, dIF/dt=100A/μs
Note : *1.Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2%
*2.Independent of operating temperature
*3.Pulse width limited by maximum junction temperature.
Recommended Soldering Footprint
MTB1K0A20KQ8
Preliminary
CYStek Product Specification
Spec. No. : C043Q8
Issued Date : 2017.08.17
Revised Date :
Page No. : 4/9
CYStech Electronics Corp.
Typical Characteristics
Brekdown Voltage vs Ambient Temperature
Typical Output Characteristics
1.4
6
ID, Drain Current(A)
4
3
BVDSS, Normalized Drain-Source
Breakdown Voltage
10V
9V
8V
7V
6V
5V
4V
5
3.5V
2
VGS=3V
1
1.2
1
0.8
ID=250μA,
VGS=0V
0.6
0.4
0
0
2
4
6
8
10 12 14 16
VDS, Drain-Source Voltage(V)
18
-75 -50 -25
20
Reverse Drain Current vs Source-Drain Voltage
Static Drain-Source On-State resistance vs Drain Current
10000
VSD, Source-Drain Voltage(V)
R DS(ON) , Static Drain-Source On-State
Resistance(mΩ)
1.2
VGS=4.5V
1000
VGS=10V
1
Tj=25°C
0.8
0.6
Tj=150°C
0.4
0.2
100
0.01
0.1
1
ID, Drain Current(A)
0
10
1
2
3
4
IDR , Reverse Drain Current(A)
5
6
Drain-Source On-State Resistance vs Junction Tempearture
Static Drain-Source On-State Resistance vs Gate-Source
Voltage
2000
2.5
1800
R DS(ON) , Normalized Static DrainSource On-State Resistance
R DS(ON) , Static Drain-Source OnState Resistance(mΩ)
0 25 50 75 100 125 150 175
Tj, Junction Temperature(°C)
ID=1A
1600
1400
1200
1000
800
600
400
200
VGS=10V, ID=1A
2
1.5
1
0.5
RDS(ON) @Tj=25°C : 755mΩ typ
0
0
0
MTB1K0A20KQ8
2
4
6
8
VGS, Gate-Source Voltage(V)
10
-75 -50 -25 0 25 50 75 100 125 150 175
Tj, Junction Temperature(°C)
Preliminary
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C043Q8
Issued Date : 2017.08.17
Revised Date :
Page No. : 5/9
Typical Characteristics(Cont.)
NormalizedThreshold Voltage vs Junction Tempearture
Capacitance vs Drain-to-Source Voltage
VGS(th), Normalized Threshold Voltage
1000
Capacitance---(pF)
Ciss
100
C oss
10
Crss
1.4
1.2
ID=1mA
1
0.8
ID=250μA
0.6
0.4
1
0
10
20
30 40 50 60 70 80
VDS, Drain-Source Voltage(V)
-75 -50 -25
90 100
Forward Transfer Admittance vs Drain Current
Gate Charge Characteristics
10
VDS=5V
VGS, Gate-Source Voltage(V)
GFS , Forward Transfer Admittance(S)
10
1
VDS=10V
0.1
Pulsed
Ta=25°C
8
VDS=100V
6
VDS=40V
4
VDS=160V
2
ID=2A
0
0.01
0.001
0.01
0.1
1
ID, Drain Current(A)
0
10
2
10
4
6
8
Total Gate Charge---Qg(nC)
Maximum Drain Current vs Junction Temperature
Maximum Safe Operating Area
1
100μs
RDS(ON)
Limited
1
1ms
10ms
100ms
0.1
1s
10s
0.01
TA=25°C, Tj=150°, VGS=10V
RθJA=78°C/W, Single Pulse
DC
ID, Maximum Drain Current(A)
10
ID, Drain Current(A)
0 25 50 75 100 125 150 175
Tj, Junction Temperature(°C)
0.8
0.6
0.4
0.2
VGS=10V, RθJA=78°C/W
0
0.001
0.01
MTB1K0A20KQ8
0.1
1
10
100
VDS, Drain-Source Voltage(V)
1000
25
50
Preliminary
75
100
125
150
Tj, Junction Temperature(°C)
175
CYStek Product Specification
Spec. No. : C043Q8
Issued Date : 2017.08.17
Revised Date :
Page No. : 6/9
CYStech Electronics Corp.
Typical Characteristics(Cont.)
Typical Transfer Characteristics
Single Pulse Maximum Power Dissipation
(Please see Note on page 2)
6
500
VDS=10V
450
400
4
TJ(MAX) =150°C
TA=25°C
RθJA=78°C/W
350
Power (W)
ID, Drain Current (A)
5
3
2
300
250
200
150
1
100
50
0
0
2
4
6
VGS, Gate-Source Voltage(V)
8
10
0
0.0001
0.001
0.01
0.1
Pulse Width(s)
1
10
Transient Thermal Response Curves
1
r(t), Normalized Effective Transient
Thermal Resistance
D=0.5
0.2
0.1
1.RθJA(t)=r(t)*RθJA
2.Duty Factor, D=t1/t2
3.TJM-TA=PDM*RθJA(t)
4.RθJA=78 ° C/W
0.1
0.05
0.02
0.01
0.01
Single Pulse
0.001
1.E-04
MTB1K0A20KQ8
1.E-03
1.E-02
1.E-01
1.E+00
t1, Square Wave Pulse Duration(s)
1.E+01
Preliminary
1.E+02
1.E+03
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C043Q8
Issued Date : 2017.08.17
Revised Date :
Page No. : 7/9
Reel Dimension
Carrier Tape Dimension
MTB1K0A20KQ8
Preliminary
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C043Q8
Issued Date : 2017.08.17
Revised Date :
Page No. : 8/9
Recommended wave soldering condition
Product
Pb-free devices
Peak Temperature
260 +0/-5 °C
Soldering Time
5 +1/-1 seconds
Recommended temperature profile for IR reflow
Profile feature
Average ramp-up rate
(Tsmax to Tp)
Preheat
−Temperature Min(TS min)
−Temperature Max(TS max)
−Time(ts min to ts max)
Time maintained above:
−Temperature (TL)
− Time (tL)
Peak Temperature(TP)
Time within 5°C of actual peak
temperature(tp)
Ramp down rate
Time 25 °C to peak temperature
Sn-Pb eutectic Assembly
Pb-free Assembly
3°C/second max.
3°C/second max.
100°C
150°C
60-120 seconds
150°C
200°C
60-180 seconds
183°C
60-150 seconds
240 +0/-5 °C
217°C
60-150 seconds
260 +0/-5 °C
10-30 seconds
20-40 seconds
6°C/second max.
6 minutes max.
6°C/second max.
8 minutes max.
Note :1. All temperatures refer to topside of the package, measured on the package body surface.
2.For devices mounted on FR-4 PCB of 1.6mm or equivalent grade PCB. If other grade PCB is used, care
should be taken to match the coefficients of thermal expansion between components and PCB. If they are
not matched well, the solder joints may crack or the bodies of the parts may crack or shatter as the assembly
cools.
MTB1K0A20KQ8
Preliminary
CYStek Product Specification
Spec. No. : C043Q8
Issued Date : 2017.08.17
Revised Date :
Page No. : 9/9
CYStech Electronics Corp.
SOP-8 Dimension
Marking:
Device Name
B1K0
A20K
Date Code
8-Lead SOP-8 Plastic Package
CYStek Package Code: Q8
Millimeters
Min.
Max.
1.350
1.750
0.100
0.250
1.350
1.550
0.330
0.510
0.170
0.250
4.700
5.100
DIM
A
A1
A2
b
c
D
Inches
Min.
Max.
0.053
0.069
0.004
0.010
0.053
0.061
0.013
0.020
0.006
0.010
0.185
0.200
DIM
E
E1
e
L
θ
Millimeters
Min.
Max.
3.800
4.200
5.800
6.200
1.270 (BSC)
0.300
1.270
8°
0
Inches
Min.
Max.
0.150
0.165
0.228
0.244
0.050 (BSC)
0.012
0.050
8°
0
Notes: 1.Controlling dimension: millimeters.
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.
3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.
Material:
• Lead: Pure tin plated.
• Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0.
Important Notice:
• All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
• CYStek reserves the right to make changes to its products without notice.
• CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
• CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.
MTB1K0A20KQ8
Preliminary
CYStek Product Specification
Similar pages