LINER LTC3246 Wide vin range buck-boost charge pump with watchdog timer Datasheet

LTC3246
Wide VIN Range
Buck-Boost Charge Pump
with Watchdog Timer
DESCRIPTION
FEATURES
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2.7V – 38V Operating Range (42V Abs Max)
IQ = 20µA Operating, 1.5µA in Shutdown
Multimode Buck-Boost Charge Pump (2:1, 1:1, 1:2)
with Automatic Mode Switching
12V to 5V Efficiency = 81%
IOUT Up to 500mA
VOUT: Fixed 3.3V, 5V or Adjustable (2.5V to 5V)
Ultralow EMI Emissions
Engineered for Diagnostic Coverage in ISO 26262
Systems
Overtemperature, Overvoltage and Short-Circuit
Protection
Operating Junction Temperature: 150°C Max
POR/Watchdog Controller w/External Timing Control
Thermally Enhanced 16-Lead MSOP Package
The LTC®3246 is a switched capacitor buck-boost DC/DC
converter with integrated watchdog timer. The device
produces a regulated output (3.3V, 5V or adjustable) from
a 2.7V to 38V input. Switched capacitor fractional conversion is used to maintain regulation over a wide range of
input voltage. Internal circuitry automatically selects the
conversion ratio to optimize efficiency as input voltage and
load conditions vary. No inductors are required.
The LTC3246’s reset time and watchdog timeout may
be set without external components, or adjusted using
external capacitors. A windowed watchdog function is
used for high reliability applications. The reset input can
be used for additional supply monitoring or be configured
as a pushbutton reset.
Low operating current (20µA without load, 1.5µA in shutdown) and low external parts count make the LTC3246
ideally suited for low power, space constrained automotive/industrial applications. The device is short-circuit and
overtemperature protected and is available in a thermally
enhanced 16-lead MSOP package.
APPLICATIONS
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Automotive ECU/CAN Transceiver Supplies
Industrial/Telecom Housekeeping Supplies
Low Power 12V to 5V Conversion
All registered trademarks and trademarks are the property of their respective owners.
TYPICAL APPLICATION
Regulated 5V Output with Pushbutton Reset
Output Voltage vs Input Voltage
2.2µF
VIN
1µF
SEL2
SEL1
BIAS
10µF
C–
VOUT
OUTS/ADJ
LTC3246
RST
WDI
5.15
VOUT = 5V
IOUT UP TO 500mA
500k
10µF
5.10
500k
µC
5.05
VOUT (V)
VIN = 2.7V TO 38V
C+
5.20
4.95
4.90
RT
WT
5.00
GND
RSTI
3246 TA01a
4.85
RESET
4.80
IOUT = 50mA
IOUT = 500mA
0
2
4
6
8
10
12
14
16
VIN (V)
3246 TA01b
For more information www.linear.com/LTC3246
3246fa
1
LTC3246
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Notes 1, 2)
VIN, SEL1, SEL2, WDI ................................. –0.3V to 42V
VOUT, OUTS/ADJ, RSTI, WT, RT, BIAS, RST . –0.3V to 6V
IRST ........................................................................10mA
VOUT Short Circuit Duration ............................. Indefinite
Lead Temperature (Soldering, 10 sec)................... 300°C
Operating Junction Temperature Range (Notes 3, 4)
(E-Grade/I-Grade) .................................. –40 to 125°C
(H-Grade) ............................................... –40 to 150°C
(MP-Grade) ............................................ –55 to 150°C
Storage Temperature Range ......................–65 to 150°C
ORDER INFORMATION
TOP VIEW
WT
RT
RSTI
BIAS
SEL2
VIN
SEL1
BIAS
1
2
3
4
5
6
7
8
17
16
15
14
13
12
11
10
9
OUTS/ADJ
GND
RST
C–
VOUT
C+
WDI
VIN
MSE PACKAGE
16-LEAD PLASTIC MSOP
TJMAX = 150°C, JA = 40°C/W
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
http://www.linear.com/product/LTC3246#orderinfo
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3246EMSE#PBF
LTC3246EMSE#TRPBF
3246
16-Lead Plastic MSOP
–40°C to 125°C
LTC3246IMSE#PBF
LTC3246IMSE#TRPBF
3246
16-Lead Plastic MSOP
–40°C to 125°C
LTC3246HMSE#PBF
LTC3246HMSE#TRPBF
3246
16-Lead Plastic MSOP
–40°C to 150°C
LTC3246MPMSE#PBF
LTC3246MPMSE#TRPBF
3246
16-Lead Plastic MSOP
–55°C to 150°C
Consult ADI Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult ADI Marketing for information on nonstandard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, CFLY = 2.2µF, COUT = 10µF, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
(Note 5)
MIN
VIN
Operating Input Voltage Range
VUVLO
VIN Undervoltage Lockout Threshold
IVIN
VIN Quiescent Current
Shutdown
CP Enabled, Output in Regulation
VHIGH
SEL1, SEL2 Input Voltage
l
VLOW
SEL1, SEL2 Input Voltage
l
ILOW
SEL1, SEL2 Input Current
IHIGH
SEL1, SEL2 Input Current
l
TYP
MAX
38
V
2.35
2.7
V
1.5
20
3
30
µA
µA
1.1
1.6
V
2.7
l
SEL1 = SEL2 = 0V
SEL1 = VIN and/or SEL2 = VIN, RSTI = 5V
UNITS
0.4
0.8
VPIN = 0V
l
V
–1
0
1
µA
VPIN = 38V
l
0.5
1
2
µA
4.8
5.2
3.17
3.43
Charge Pump Operation
VOUTS_5
VOUTS/ADJ Regulation Voltage
SEL1 = 0V, SEL2 = VIN
2.7V < VIN < 38V (Notes 5, 6)
l
VOUTS_3
VOUTS/ADJ Regulation Voltage
SEL1 = VIN, SEL2 = VIN
2.7V < VIN < 38V (Notes 5, 6)
l
VADJ
VOUTS/ADJ Regulation Voltage
SEL1 = VIN, SEL2 = 0V
2.7V < VIN < 38V (Notes 5, 6)
l
2
1.08
1.11
1.14
V
V
V
3246fa
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LTC3246
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, CFLY = 2.2µF, COUT = 10µF, unless otherwise noted.
SYMBOL
PARAMETER
IADJ
VOUTS/ADJ Input Current
SEL1 = SEL2 = VIN
IOUT_SCKT
IVOUT Short Circuit Foldback Current
VOUT = 0V
250
mA
ROUT
Charge Pump Output Impedance
2:1 Step-Down Mode
1:1 Step-Down Mode, VIN = 5.5V
1:2 Step-Up Mode, VIN = 3V, VOUT ≥ 3.3V (Note 6)
l
1
1.2
4
Ω
Ω
Ω
% of Final Regulation Voltage at Which
VOUT Rising Makes RST Go Low
VOUT Falling Makes RST Go Hi-Z
l
l
106
109
108.5
111.5
%
%
% of Final Regulation Voltage at Which
VOUT Rising Makes RST Go Hi-Z
VOUT Falling Makes RST Go Low
l
l
93
97.5
95
99
%
%
VOUT_OV_RST
VOUT_UV_RST
VOUT Overvoltage Reset
VOUT Undervoltage Reset
CONDITIONS
l
MIN
TYP
MAX
UNITS
–50
0
+50
nA
8
VOUT_PD
VOUT Pull-Down in Shut Down
SEL1 = SEL2 = 0V
100
kΩ
VOUT_RIPPLE
VOUT Ripple Voltage
COUT = 10µF
COUT = 22µF
50
25
mV
mV
Reset Timer Control Pin (RT)
IRT(UP)
RT Pull-Up Current
VRT = 0.3V
l
–2
–3.1
–4.2
µA
IRT(DOWN)
RT Pull-Down Current
VRT = 1.3V
l
2
3.1
4.2
µA
IRT(INT)
Internal RT Detect Current
VRT = VBIAS
l
0.4
1
µA
VRT(INT)
RT Internal Timer Threshold
VRT Rising
l
2.4
2.65
V
1.22
1.27
2.0
Reset Timer Input (RSTI)
VRSTI_H
RSTI Input High Voltage
l
VRSTI_L
RSTI Input Low Voltage
l
1.04
1.2
V
IRSTI_H
RSTI Input High Current
RSTI = 5V
l
–1
0
1
µA
IRSTI_L
RSTI Input Low Current
RSTI = 0V
l
–1
0
1
µA
V
Reset Timing
tRST(INT)
Internal Reset Timeout Period
VRT = VBIAS
tRST(EXT)
Adjustable Reset Timeout Period
CRT = 2.2nF
tRSTIL
RSTI Low to RST Asserted
150
200
270
ms
l
14
21
28
ms
l
5
20
40
µs
0.1
0.4
V
Reset Output (RST)
VOL(RST)
Output Voltage Low RST
IRST = 2mA
l
IOH(RST)
RST Output Voltage High Leakage
VRST = 5V
l
–1
0
1
µA
1.6
2.2
s
Watchdog Timing
tWDU(INT)
Internal Watchdog Upper Boundary
VWT = VBIAS
l
1.2
37.5
50
68
ms
100
160
220
ms
tWDL(INT)
Internal Watchdog Lower Boundary
VWT = VBIAS
l
tWDR(EXT)
External Watchdog Timeout Period
CWT = 2.2nF
l
tWDU(EXT)
External Watchdog Upper Boundary
l
tWDR(EXT) • (128/129)
ms
tWDL(EXT)
External Watchdog Lower Boundary
l
tWDR(EXT) • (5/129)
ms
Watchdog Timer Input (WDI)
VIH
WDI Input High Voltage
l
VOL
WDI Input Low Voltage
l
0.4
1.1
0.8
1.6
V
IIH
WDI Input High Current
VWDI = 38V
l
–1
0
1
µA
IIL
WDI Input Low Current
VWDI = 0V
l
–1
0
1
µA
tPW(WDI)
Input Pulsewidth
l
400
V
ns
3246fa
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3
LTC3246
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, CFLY = 2.2µF, COUT = 10µF, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
–3.1
–4.2
µA
Watchdog Timer Control Pin (WT)
IWT(UP)
WT Pull-Up Current
VWT = 0.3V
l
–2
IWT(DOWN)
WT Pull-Down Current
VWT = 1.3V
l
2
IWT(INT)
Internal WT Detect Current
VWT = VBIAS
l
VWT(INT)
WT Internal Timer Threshold
VWT Rising
l
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltages are referenced to GND unless otherwise specified.
Note 3: The LTC3246E is guaranteed to meet performance specifications
from 0°C to 85°C operating junction temperature. Specifications over
the –40°C to 125°C operating junction temperature range are assured by
design, characterization and correlation with statistical process controls.
The LTC3246I is guaranteed over the –40°C to 125°C operating junction
temperature range. The LTC3246H is guaranteed over the –40°C to 150°C
operating junction temperature range. The LTC3246MP is guaranteed and
tested over the –55°C to 150°C operating junction temperature range.
High junction temperatures degrade operating lifetimes; operating lifetime
is derated for junction temperatures greater than 125°C. Note that the
maximum ambient temperature consistent with these specifications is
determined by specific operating conditions in conjunction with board
layout, the rated package thermal resistance and other environmental
factors.
10
9
1000
µA
1
µA
2.2
2.65
V
TA = 25°C, unless otherwise noted.
Input Operating Current
vs Input Voltage
TA = 125°C
TA = 25°C
4.2
The junction temperature (TJ, in °C) is calculated from the ambient
temperature (TA, in °C) and power dissipation (PD, in watts) according to
the formula:
TJ = TA + (PD • JA), where JA (in °C/W) is the package thermal
impedance.
Note 4: This IC has overtemperature protection that is intended to protect
the device during momentary overload conditions. Junction temperatures
will exceed 150°C when overtemperature protection is active. Continuous
operation above the specified maximum operating junction temperature
may impair device reliability.
Note 5: The maximum operating junction temperature of 150°C must
be followed. Certain combinations of input voltage, output current and
ambient temperature will cause the junction temperature to exceed 150°C
and must be avoided. See Thermal Management section for information on
calculating maximum operating conditions.
Note 6: The LTC3246 will attempt to regulate the output voltage under
all load conditions, but like any regulator, the output will drop out if
inadequate supply voltage exists for the load. See VOUT Regulation section
for calculating available load current at low input operating voltages. Also
see “Boost Output Impedance at Dropout vs Temperature” for typical
impedance values at output voltages less than 3.3V.
TYPICAL PERFORMANCE CHARACTERISTICS
Input Shutdown Current
vs Input Voltage
2
3.1
0.4
Input Operating Current
vs Input Voltage
NO LOAD
60
125°C
25°C
–55°C
8
TA = 125°C
TA = 25°C
TA = –55°C
50
7
40
5
4
IIN (µA)
IIN (µA)
IIN (µA)
6
100
30
20
3
2
10
1
0
0
4
8
12 16 20 24 28 32 36 40
VIN (V)
0
5
10
15
20
25
30
35
40
VIN (V)
3246 G01
4
10
0
NO LOAD
4
6
8
10
12
14
16
VIN (V)
3246 G02
3246 G03
3246fa
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LTC3246
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
3.3V Fixed Output Voltage vs
Input Voltage
3.3V Fixed Output Voltage
vs Input Voltage
3.45
3.45
3.40
3.40
3.3V Efficiency and Power Loss
vs Input Voltage
100
90
EFFICIENCY (%)
VOUT (V)
VOUT (V)
3.25
3.30
3.25
IOUT = 0mA
IOUT = 50mA
IOUT = 500mA
3.20
0
2
4
6
8
10
12
14
3.15
16
0
4
8
0.5
40
0.4
0
5.15
5.15
90
5.05
VOUT (V)
5.05
5.00
4.95
4.90
EFFICIENCY (%)
100
5.00
IOUT = 0mA
IOUT = 50mA
IOUT = 500mA
4.85
6
8
4.95
10
12
14
4.80
16
0
4
8
10
100
70
7
70
60
6
50
5
40
4
30
3
LOSS
EFFICIENCY (%)
80
0.8
0.7
0.5
0.4
30
0.3
LOSS
20
0.2
10
0
0.1
0
2
4
6
8
10
12
14
16
0.0
3246 G09
8
EFFICIENCY
7
4
30
0
0
0
16
9
5
10
14
10
IOUT = 500mA
40
20
12
0.6
EFFICIENCY
50
1
10
0.9
70
6
2
8
1.0
80
60
10
6
0.0
3
LOSS
POWER LOSS (W)
90
8
POWER LOSS (W)
9
4
16
3.3V Efficiency and Power Loss
vs Input Voltage
EFFICIENCY
20
14
VIN (V)
80
2
12
3246 G08
IOUT = 500mA
0
10
IOUT = 50mA
VIN (V)
5V Efficiency and Power Loss
vs Input Voltage
90
8
40
12 16 20 24 28 32 36 40
3246 G07
100
6
50
IOUT = 0mA
IOUT = 50mA
IOUT = 500mA
4.85
VIN (V)
EFFICIENCY (%)
4
4
60
4.90
2
2
5V Efficiency and Power Loss
vs Input Voltage
5.20
0
0
3246 G06
5.20
4.80
0.1
VIN (V)
5V Fixed Output Voltage vs
Input Voltage
5.10
0.2
10
3246 G05
5.10
0.3
LOSS
POWER LOSS (W)
VOUT (V)
50
VIN (V)
3246 G04
5V Fixed Output Voltage
vs Input Voltage
0.7
0.6
20
12 16 20 24 28 32 36 40
VIN (V)
0.8
60
30
IOUT = 0mA
IOUT = 50mA
IOUT = 500mA
3.20
0.9
EFFICIENCY
70
3.35
3.30
3.15
80
POWER LOSS (W)
3.35
1.0
IOUT = 50mA
2
1
0
2
4
VIN (V)
6
8
10
12
14
16
0
VIN (V)
3246 G10
3246 G11
3246fa
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5
LTC3246
TYPICAL PERFORMANCE CHARACTERISTICS
Boost Output Impedance at
Dropout vs Temperature
7.0
1.18
6.5
1.16
6.0
1.14
5.5
1.12
5.0
1.10
1.08
Internal Reset Timeout Period
vs Temperature
300
IOUT = 500mA
275
250
TIME (ms)
1.20
RO (Ω)
VADJ (V)
ADJ Regulation Voltage
vs Temperature
4.5
4.0
1.06
3.5
1.04
3.0
1.02
2.5
1.00
−60 −40 −20 0
TA = 25°C, unless otherwise noted.
2.0
−60 −45 −30 −15 0
20 40 60 80 100 120 140
TEMPERATURE (°C)
200
175
150
VOUT = 2.5V
VOUT = 3.0V
VOUT = 3.3V
VOUT = 5.0V
125
100
−60 −40 −20 0
15 30 45 60 75 90
TEMPERATURE (°C)
3246 G13
Internal Watchdog Timeout
Period vs Temperature
3246 G14
RT/WT Timer Control Current
vs Temperature
2.0
3.5
1.9
3.4
VIN = 12V
VIN = 2.7V
3.3
1.8
3.2
|IRT/WT| (µA)
1.7
1.6
1.5
3.1
3.0
2.9
2.8
1.4
2.7
1.3
2.6
1.2
−60 −40 −20 0
2.5
−60 −40 −20 0
20 40 60 80 100 120 140
TEMPERATURE (°C)
20 40 60 80 100 120 140
TEMPERATURE (°C)
3246 G15
10000
20 40 60 80 100 120 140
TEMPERATURE (°C)
3246 G12
TIME (s)
225
Reset Timeout Period
vs CRT Capacitance
100000
1000
10000
100
1000
3246 G16
BIAS Output Voltage vs
Input Voltage
Watchdog Timeout Period
vs CWT Capacitance
6.0
5.5
10
VBIAS (V)
TIME (ms)
TIME (ms)
5.0
100
4.5
4.0
1
0.1
0.001
10
0.01
0.1
1
10
100
1000
CRT (nF)
0.01
0.1
1
10
100
1000
CWT (nF)
3246 G17
6
1
0.001
3.5
3.0
VOUTSD
VOUTEN
0
5
10
15
20
25
30
35
40
VIN (V)
3246 G18
3246 G19
3246fa
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LTC3246
TYPICAL PERFORMANCE CHARACTERISTICS
Output Transient Response
TA = 25°C, unless otherwise noted.
Output Voltage Ripple
2:1 MODE
50mV/DIV
VOUT
50mV/DIV
1:1 MODE
50mV/DIV
1:2 MODE
50mV/DIV
440mA
IOUT
25mA
5µs/DIV
VIN = 14V
VOUT = 5V
COUT = 10µF
1µs/DIV
IOUT = 400mA
COUT = 10µF
3246 G20
3246 G21
TIMING DIAGRAMS
Charge Pump Output Reset Timing
RSTI
tRSTIL
tRST
RST
3246 TD01
Watchdog Timing
WDI
RST
t < tWDL
tRST
tWDL < t < tWDU
tWDR
tRST
3246 TD02
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7
LTC3246
PIN FUNCTIONS
WT (Pin 1): Watchdog Timer Control Pin. Attach an external capacitor (CWT) to GND to set a watchdog upper
boundary timeout time (See “Watchdog Timeout Period
vs WT Capacitance” graph on page 6). Tie WT to BIAS to
generate a timeout of about 1.6s. Tie WT and WDI to GND
to disable the watchdog timer.
RT (Pin 2): Reset Timeout Control Pin. Attach an external
capacitor (CRT) to GND to set a reset timeout time (See
“Reset Timeout Period vs RT Capacitance” graph on
page 6). Tie RT to BIAS to generate a reset timeout of
about 200ms.
RSTI (Pin 3): Reset Logic Comparator Pin. The RSTI input
is compared to a reference threshold (1.2V typical). If RSTI
is below the reference voltage, the part will enter the reset
state and the RST pin will be low. Once RSTI exceeds the
reference voltage and VOUT in regulation, the reset timer
is started. RST pin will be low until the reset period times
out. RSTI is a high impedance pin and must be driven to
a valid level. Do not float.
BIAS (Pin 4, 8): Internal BIAS Voltage. The bias pin is for
internal operation only and should not be loaded or driven
externally. Bypass BIAS with a 10µF or greater ceramic
capacitor.
SEL2 (Pin 5): Logic Input Pin. See Table 1 for SEL1/SEL2
operating logic. SEL2 enables and disables the charge
pump along with the SEL1 pin. The SEL2 pin has a 1µA
(typical) pull down current to ground and can tolerate 38V
inputs allowing it to be pin-strapped to VIN.
VIN (Pin 6, 9): Power Input Pin. Input voltage for both charge
pump and IC control circuitry. The VIN pin operates from
2.7V to 38V. All VIN pins should be connected together at
pins and bypassed with a 1µF or greater ceramic capacitor.
SEL1 (Pin 7): Logic Input Pin. See Table 1 for SEL1/SEL2
operating logic. SEL1 enables and disables the charge
pump along with the SEL2 pin. The SEL1 pin has a 1µA
(typical) pull down current to ground and can tolerate 38V
inputs allowing it to be pin-strapped to VIN.
8
Table 1. VOUT Operating Modes
SEL2
SEL1
MODE
LOW
LOW
Shutdown
LOW
HIGH
Adjustable VOUT
HIGH
LOW
Fixed 5V
HIGH
HIGH
Fixed 3.3V
WDI (Pin 10): Watchdog Logic Input Pin. If the watchdog
timer is not disabled then WDI must be driven such that a
falling edge occurs within a time less than the watchdog
upper boundary time, or RST will be asserted low. The
WDI period must also be greater than the watchdog lower
boundary time, and only falling edges are considered. Tie
WT and WDI to GND to disable the watchdog timer. WDI
is a high impedance pin and must be driven to a valid
level. Do not float.
C+ (Pin 11): Connect to positive flying capacitor terminal
only. Do not load or drive externally.
VOUT (Pin 12): Charge Pump Output Voltage. The charge
pump output is enabled if either SEL1 or SEL2 are logic high.
C- (Pin 13): Connect to negative flying capacitor terminal
only. Do not load or drive externally.
RST (Pin 14): Reset Open Drain Logic Output. The RST pin
is low impedance during the reset period, and goes high
impedance during the watchdog period. RST is intended
to be pulled up to low voltage supply (such as VOUT) with
an external resistor.
GND (Pin 15, Exposed Pad): Ground. The exposed package pad is ground and must be soldered to the PC board
ground plane for proper functionality and for rated thermal
performance.
OUTS/ADJ (Pin 16): VOUT Sense/Adjust Input Pin. This pin
acts as VOUT sense (OUTS) for 5V or 3.3V fixed outputs
and adjust (ADJ) for adjustable output through external
feedback. The ADJ pin servos to 1.1V when the device is
enabled in adjustable mode. (OUTS/ADJ are selected by
SEL1 and SEL2 pins; See Table 1). Connect OUTS/ADJ to
VOUT or external divider as appropriate.
3246fa
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LTC3246
SIMPLIFIED BLOCK DIAGRAM
2.2µF
11
13
C+
VIN
2.7V TO 38V
6
VIN
ILIM
C–
17
CHARGE PUMP
GND
1µF
9
4
VIN
5V
LDO
BIAS
VOUT
10µF
8
15
BIAS
MODE
2
VIN
VOUT
CLK
10µF
OUT
MODE
COMP
OSC
EN
12
+
ADJ
OUTS/
ADJ
VOUT
3.5V/5V/ADJ
500mA
16
1.1V
3.3V
MUX
–
5V
PGOOD
+9%/–5%
SEL1
UP TO 38V
7
SEL2
UP TO 38V
5
SEL2
1.2V
RSTI
0V TO 5V
3
WDI
UP TO 38V
10
SD
SEL1
RSTI
WDI
–
RST
+
14
RESET
TIMER
WATCHDOG
TIMER
WT
1
RT
2
CWT
3246 BD
CRT
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9
LTC3246
APPLICATIONS INFORMATION
General Operation
The LTC3246 uses switched capacitor based DC/DC
conversion to provide the efficiency advantages associated with inductor based circuits as well as the cost and
simplicity advantages of a linear regulator. The LTC3246
uses an internal switch network and fractional conversion
ratios to achieve high efficiency and regulation over widely
varying VIN and output load conditions.
Internal control circuitry selects the appropriate conversion
ratio based on VIN and load conditions. The device has
three possible conversion modes: 2:1 step-down mode, 1:1
step-down mode and 1:2 step-up mode. Only one external
flying capacitor is needed to operate in all three modes.
2:1 mode is chosen when VIN is greater than two times the
desired VOUT. 1:1 mode is chosen when VIN falls between
two times VOUT and VOUT. 1:2 mode is chosen when VIN
falls below the desired VOUT. The internal mode control
logic maintains output regulation over all load conditions.
Regulation is achieved by sensing the output voltage
and enabling charge transfer when the output falls below
regulation. When the charge pump is enabled, it controls
the current into the flying capacitor to limit the output
ripple beyond that of conventional switched capacitor
charge pumps. The part has two SEL pins that select the
output regulation (fixed 5V, fixed 3.3V or adjustable) as
well as shutdown.
The charge pump operates at a nominal frequency of about
450kHz, though actual output ripple frequency will vary
with output load, operating mode and output capacitance.
The LTC3246 is designed for applications requiring high
system reliability. The part includes output supply monitoring and watchdog timing circuitry as well as overvoltage,
short-circuit and overtemperature protection.
VOUT Regulation and Mode Selection
Regulation is achieved by sensing the output voltage and
enabling charge transfer when the output falls below the
programmed regulation voltage. The amount of charge
transferred per cycle is controlled over the full input range
to minimize output ripple. The regulation voltage (fixed
5V, fixed 3.3V or adjustable) is selected through the SEL1
and SEL2 pins per Table 1 in the Pin Function section.
10
The optimal conversion ratio is chosen based on VIN, VOUT
and output conditions. Two internal comparators are used
to select the default conversion ratio. The conversion ratio
switch point is optimized to provide peak efficiency over all
supply and load conditions while maintaining regulation.
Each comparator also has built-in hysteresis to reduce the
tendency of oscillating between modes when a transition
point is reached.
The LTC3246 will attempt to regulate its output over the
full operating range (2.7V to 38V), but like any regulator
the output will drop out of regulation if inadequate supply
voltage exists to the operating load. As the input voltage
drops, the LTC3246 will eventually end up in the 1:2 step
up mode. As the input voltage drops further, the output
will eventually drop out of regulation. At this point, the 1:2
step-up charge pump impedance can be calculated as:
R OUT =
2 • VIN – VOUT
IOUT
This equation can be rewritten to determine the output
current at which the output will drop out for a given input
voltage as:
IOUT =
2 • VIN – VOUT
R OUT
IOUT
500mA
For a typical 1:2 step-up charge pump impedance of 4Ω
with 5V output voltage and 3V input voltage, the output
current at dropout will be about:
IOUT =
2 • 3 – 4.8
4
mA = 300mA
Thus, typically the part should be able to output 300mA
without dropping out. To be conservative, the max 1:2
step-up charge pump impedance of 8Ω should be used
which gives a more conservative output current of 150mA.
Any supply impedance in series with the LTC3246 must
be doubled and added to the 1:2 step-up charge pump
impedance. It is also important to have the specified COUT
and CFLY capacitance to achieve the specified output impedance. Observing dropout will allow the user to calculate
the output impedance for their specific application.
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LTC3246
APPLICATIONS INFORMATION
Short-Circuit/Thermal Protection
The LTC3246 has built-in short-circuit current limiting
on both the VOUT and BIAS outputs to protect the part in
the event of a short. During short-circuit conditions, the
device will automatically limit the output current from
both outputs.
The LTC3246 has thermal protection that will shut
down the device if the junction temperature exceeds the
overtemperature threshold (typically 175°C). Thermal
shutdown is included to protect the IC in cases of excessively high ambient temperatures, or in cases of excessive
power dissipation inside the IC. The charge transfer will
reactivate once the junction temperature drops back to
approximately 165°C.
When the thermal protection is active, the junction temperature is beyond the specified operating range. The thermal
and short-circuit protection are intended for momentary
overload conditions outside normal operation. Continuous operation above the specified maximum operating
conditions may impair device reliability.
Programming the Output Voltage (OUTS/ADJ Pin)
The LTC3246 output voltage programming is very flexible
offering a fixed 3.3V output, fixed 5V output as well as
adjustable output that is programmed through an external
resistor divider. The desired output regulation method is
selected through the SEL pins.
For a fixed output simply short OUTS (OUTS/ADJ pin) to
VOUT as shown in Figure 1. Fixed 3.3V operation is enabled
by driving both SEL1 and SEL2 pins high, while fixed 5V
operating is selected by driving SEL2 high with SEL1 low.
Driving both SEL1 and SEL2 low shuts down the device
causing VOUT to be pulled low by an internal impedance
of about 80kΩ.
VOUT
FIXED 3.3V OR
FIXED 5.0V
VOUT
LTC3246
OUTS/ADJ
COUT
Adjustable output programming is accomplished by connecting ADJ (OUTS/ADJ pin) to a resistor divider between
VOUT and GND as shown in Figure 2. Adjustable operation
is enabled by driving SEL1 high and SEL2 low. Driving both
SEL1 and SEL2 low shuts down the device, causing VOUT
to be pulled low by an internal impedance of about 80kΩ.
VOUT
VOUT
LTC3246
RA
COUT
OUTS/ADJ
1.1V 1
RA
RB
RB
GND
3246 F02
Figure 2. Adjustable Output Operation
Using adjustable operation, the output (VOUT) can be
programmed to regulate from 2.5V to 5V. The limited
programming range provides the required VOUT operating
voltage without overstressing the VOUT pin.
The desired adjustable output voltage is programmed by
solving the following equation for RA and RB:
V
= OUT – 1
RB 1.11V
RA
Select a value for RB in the range of 1k to 1M and solve
for RA. Note that the resistor divider current adds to the
total no load operating current. Thus, a larger value for
RB will result in lower operating current.
2:1 Step-Down Charge Pump Operation
When the input supply is greater than about two times
the output voltage, the LTC3246 will operate in 2:1 stepdown mode. Charge transfer happens in two phases. On
the first phase, the flying capacitor (CFLY) is connected
between VIN and VOUT. On this phase, CFLY is charged up
and current is delivered to VOUT. On the second phase,
the flying capacitor (CFLY) is connected between VOUT and
GND. The charge stored on CFLY during the first phase is
transferred to VOUT on the second phase. When in 2:1
step-down mode, the input current will be approximately
GND
3246 F01
Figure 1. Fixed Output Operation
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11
LTC3246
APPLICATIONS INFORMATION
half of the total output current. The efficiency ( ) and chip
power dissipation (PD) in 2:1 are approximately:
POUT
V
•I
2V
= OUT OUT = OUT
1
PIN
VIN
VIN • IOUT
2
PD =
VIN
2
– VOUT IOUT
VOUT Ripple and Capacitor Selection
The type and value of capacitors used with the LTC3246
determine output ripple and charge pump strength. The
value of COUT directly controls the amount of output ripple
for a given load current. Output ripple decreases with
output capacitance until about 20µF, at which point output
peak to peak ripple remains more or less constant. See
Figure 3 for graph of output ripple vs output capacitance.
200
1:1 Step-Down Charge Pump Operation
•I
V
V
= OUT OUT = OUT
PIN
VIN • IOUT
VIN
POUT
150
125
100
75
50
25
0
0
5
10 15 20 25 30
COUT CAPACITANCE (µF)
35
40
3246 TA01b
Figure 3. Typical VOUT Ripple Voltage vs COUT Capacitance
PD = VIN – VOUT IOUT
1:2 Step-Up Charge Pump Operation
When the input supply is less than the output voltage,
the LTC3246 will operate in 1:2 step-up mode. Charge
transfer happens in two phases. On the first phase, the
flying capacitor (CFLY) is connected between VIN and GND.
On this phase, CFLY is charged up. On the second phase,
the flying capacitor (CFLY) is connected between VIN and
VOUT and the charge stored on CFLY during the first phase
is transferred to VOUT. When in 1:2 step-up mode, the
input current will be approximately twice the total output
current. Thus, efficiency ( ) and chip power dissipation
(PD) in 1:2 are approximately:
V
•I
V
= OUT OUT = OUT
PIN
VIN • 2IOUT
2VIN
VOUT RIPPLE (mVP-P)
When the input supply is less than about two times the
output voltage, but more than the programmed output
voltage, the LTC3246 will operate in 1:1 step-down mode.
This method of regulation is very similar to a linear regulator. Charge is delivered directly from VIN to VOUT through
most of the oscillator period. The charge transfer is briefly
interrupted at the end of the period. When in 1:1 step-down
mode, the input current will be approximately equal to the
total output current. Thus, efficiency ( ) and chip power
dissipation (PD) in 1:1 are approximately:
POUT
BOOST, 500mA
BOOST, 50mA
BUCK, 500mA
BUCK, 50mA
LDO, 500mA
LDO, 50mA
175
To reduce output noise and ripple, it is suggested that a
low ESR (equivalent series resistance < 0.1Ω) ceramic
capacitor (10µF or greater) be used for COUT. For optimal
performance, it is best to increase COUT for low VOUT as
the ripple becomes a larger percentage of the regulation
voltage degrading performance. Tantalum and aluminum
capacitors can be used in parallel with a ceramic capacitor
to increase the total capacitance but are not recommended
to be used alone because of their high ESR.
VOUT Overvoltage Protection
An internal comparator monitors the voltage at VOUT and
will prevent charge transfer in the event that VOUT exceeds
the overvoltage threshold (5.9V typ.). Overvoltage protection is added as a safety feature to prevent damage to the
part in the event of a fault such as VOUTS/ADJ pin shorted
to ground or not connected to VOUT. Charge transfer will
start once the output falls to about 5.75V.
PD = 2VIN – VOUT IOUT
12
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LTC3246
APPLICATIONS INFORMATION
VIN Capacitor Selection
The finite charge transfer architecture used by the LTC3246
makes input noise filtering much less demanding than the
sharp current spikes of conventional regulated charge
pumps. Depending on the mode of operation, the input
current of the LTC3246 can step from about 1A to 0A on
a cycle-by-cycle basis. Low ESR will reduce the voltage
steps caused by changing input current, while the absolute capacitor value will determine the level of ripple.
The total amount and type of capacitance necessary for
input bypassing is very dependent on the applied source
impedance as well as existing bypassing already on the
VIN node. For optimal input noise and ripple reduction, it
is recommended that a low ESR ceramic capacitor be used
for CIN bypassing. An electrolytic or tantalum capacitor
may be used in parallel with the ceramic capacitor on CIN
to increase the total capacitance, but, due to the higher
ESR, it is not recommended that an electrolytic or tantalum capacitor be used alone for input bypassing. The
LTC3246 will operate with capacitors less than 1µF, but,
depending on the source impedance, input noise can feed
through to the output causing degraded performance.
For best performance 1µF or greater total capacitance is
suggested for CIN.
material will retain most of its capacitance from –40°C
to 85°C, whereas a Z5U or Y5V style capacitor will lose
considerable capacitance over that range (60% to 80%
loss typical). Z5U and Y5V capacitors may also have a
very strong voltage coefficient, causing them to lose an
additional 60% or more of their capacitance when the rated
voltage is applied. Therefore, when comparing different
capacitors, it is often more appropriate to compare the
amount of achievable capacitance for a given case size
rather than discussing the specified capacitance value. For
example, over rated voltage and temperature conditions,
a 4.7µF, 10V, Y5V ceramic capacitor in an 0805 case may
not provide any more capacitance than a 1µF, 10V, X5R
or X7R available in the same 0805 case. In fact, over bias
and temperature range, the 1µF, 10V, X5R or X7R will
provide more capacitance than the 4.7µF, 10V, Y5V. The
capacitor manufacturer’s data sheet should be consulted
to determine what value of capacitor is needed to ensure
minimum capacitance values are met over operating
temperature and bias voltage. Below is a list of ceramic
capacitor manufacturers and how to contact them:
MANUFACTURER
WEBSITE
AVX
www.avxcorp.com
Kemet
www.kemet.com
Flying Capacitor Selection
Murata
www.murata
Ceramic capacitors should always be used for the flying
capacitor. The flying capacitor controls the strength of
the charge pump. In order to achieve the rated output
current, it is necessary for the flying capacitor to have
at least 1µF of capacitance over operating temperature
with a bias voltage equal to the programmed VOUT (see
Ceramic Capacitor Selection Guidelines). If only 100mA
or less of output current is required for the application,
the flying capacitor minimum can be reduced to 0.2µF.
The voltage rating of the ceramic capacitor should be
VOUT + 1V or greater.
Taiyo Yuden
www.t-yuden.com
TDK
www.tdk.com
Wurth Elektronik
www.we-online.com
Ceramic Capacitor Selection Guidelines
Capacitors of different materials lose their capacitance
with higher temperature and voltage at different rates.
For example, a ceramic capacitor made of X5R or X7R
BIAS Pin and Capacitor Selection
The BIAS pin of the LTC3246 is a 5V output that is generated
by an internal Low Drop-Out (LDO) regulator supplied by
VIN. The BIAS voltage is used as a supply for the internal
low voltage circuitry. A capacitor on the BIAS pin is necessary to stabilize the LDO output and minimize ripple during
transient conditions. A low ESR ceramic capacitor with a
minimum capacitance of 2µF over temperature with 5V
bias should be used. Since the BIAS voltage comes from
an LDO, the BIAS voltage will drop with VIN as VIN goes
below 5V. This is normal and expected operation. The
BIAS pin voltage is for internal circuitry only and should
not be loaded externally.
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13
LTC3246
APPLICATIONS INFORMATION
The LTC3246 pulls the RST open-drain output low whenever RSTI is below threshold (typically 1.2V) or VOUT is
greater than the overvoltage threshold or less than the
undervoltage threshold. RST remains asserted low for
a reset timeout period (tRST) once RSTI goes above the
threshold and VOUT is in regulation (within the overvoltage
and undervoltage thresholds). RST de-asserts by going
high impedance at the end of the reset timeout period.
The reset timeout can be configured to use an internal
timer without external components or an adjustable timer
programmed by connecting an external capacitor from
the RT pin to GND. Glitch filtering ensures reliable reset
operation without false triggering.
During initial power up, the RST output asserts low while
VIN is below the VIN undervoltage lockout threshold. The
state of VOUT and RSTI have no effect on RST while VIN
is below the undervoltage lockout threshold. The reset
timeout period cannot start until VIN exceeds the undervoltage lockout threshold.
VOUT Undervoltage/Overvoltage Reset
A built-in VOUT supply monitor ensures the VOUT is in regulation before RST is allowed to go high impedance. The
monitor detects both overvoltage and undervoltage faults.
If VOUT is greater than the overvoltage threshold or less
than the undervoltage threshold, the part registers a fault
and pulls RST low. The fault condition is removed when
VOUT is within the overvoltage and undervoltage thresholds.
Load transients within the operating range of the part will
not registering as a fault by design.
Selecting the Reset Timing Capacitor
The reset timeout period can be set to a fixed internal
timer or programmed with a capacitor in order to accommodate a variety of applications. Connecting a capacitor,
CRT, between the RT pin and GND sets the reset timeout
period, tRST.
Figure 4 shows the desired reset timeout period as a
function of the value of the timer capacitor. Leaving RT
14
open without external capacitor generates a reset timeout
of approximately 0.5ms. Shorting RT to BIAS generates a
reset timeout of approximately 0.2s.
10000
1000
TIME (ms)
Reset Generation (RSTI input, RST output)
100
10
1
0.1
0.001
0.01
0.1
1
10
100
1000
CRT (nF)
3246 F04
Figure 4. Reset Timeout Period vs CRT Capacitance
RST Output Characteristics
RST is an open-drain pin and, thus, requires an external
pull-up resistor to a logic supply. RST may be pulled up to
any valid logic level (such as VOUT) providing the voltage
limits of the pin are observed (See Absolute Maximum
Ratings section).
Watchdog Timer (WDI input, RST output)
The LTC3246 includes a windowed watchdog function
that can continuously monitor the application’s logic or
microprocessor and issue automatic resets to aid recovery
from unintended lockups or crashes. With the RSTI input
held above threshold, the application must periodically
toggle the logic state of the watchdog input (WDI pin) in
order to clear the watchdog timer. Specifically, successive
falling edges on the WDI pin must be spaced by more than
the watchdog lower boundary but less than the watchdog
upper boundary. As long as this condition holds, RST
remains high impedance.
If a falling edge arrives before the watchdog lower boundary, or if the watchdog timer reaches the upper boundary without seeing a falling edge on WDI, the watchdog
timer immediately enters its reset state and asserts RST
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LTC3246
APPLICATIONS INFORMATION
low for the reset timeout period. Once the reset timeout
completes, RST is released to go high and the watchdog
timer starts again.
During power-up, the watchdog timer remains cleared while
RST is asserted low. As soon as the reset timer times out,
RST goes high and the watchdog timer is started.
128
129
The external watchdog lower boundary (tWDL(EXT)) occurs five clock cycles into the watchdog timeout period
(tWDR(EXT)). Thus the external watchdog lower boundary
can be calculated from the external watchdog timeout
period as:
5
129
The internal watchdog lower boundary can be calculated from the internal watchdog timeout period by the
following:
t WDL(INT) =
t WDR(INT)
TIME (ms)
The watchdog upper boundary (tWDU) and lower boundary (tWDL) are not observable outside the part; only the
watchdog timeout period (tWDR) of the part is observable
via the RST pin. The watchdog upper boundary (tWDU)
occurs one watchdog clock cycle before the watchdog
timeout period (tWDR). The internal watchdog timeout
period consists of 8193 clock cycles, so the internal
watchdog upper boundary time is essentially the same
as the internal watchdog timeout period. Conversely, the
external watchdog timeout period consists of only 129
clock cycles, so the external watchdog upper boundary
should be more accurately calculated as:
t WDL EXT = t WDR(EXT) •
100000
10000
Setting the Watchdog Timeout Period
t WDU(EXT) = t WDR(EXT) •
Figure 5 shows the approximate external watchdog
timeout period as a function of the watchdog capacitor.
Shorting WT to BIAS sets an upper and lower watchdog
timeout period of about 50ms and 1.6s respectively.
1000
100
10
1
0.001
0.01
0.1
1
10
100
1000
CWT (nF)
3246 F05
Figure 5. External Watchdog Timeout Period vs CWT Capacitance
Layout Considerations
Due to the high switching frequency and transient currents produced by the LTC3246, careful board layout is
necessary for optimal performance. A true ground plane
and short connections to all capacitors will optimize
performance, reduce noise and ensure proper regulation
over all conditions.
When using the LTC3246 with an external resistor divider it
is important to minimize any stray capacitance to the ADJ
(OUTS/ADJ pin) node. Stray capacitance from ADJ to C+
or C– can degrade performance significantly and should
be minimized and/or shielded if necessary. Minimize stray
capacitance from WT and RT to C+ and C– when using
external timing capacitors to minimize timing variation.
Thermal Management/Thermal Shutdown
32
The watchdog upper boundary is adjustable and can be
optimized for software execution. The watchdog upper
boundary is adjusted by connecting a capacitor, CWT,
between the WT and GND pins.
The on-chip power dissipation in the LTC3246 will cause the
junction to ambient temperature to rise at rate of typically
40°C/W in still air with a good thermal connection to the
PC board. Connecting the die pad (Pin 17) with multiple
vias to a large gro und plane under the device can reduce
the thermal resistance of the package and PC board con3246fa
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15
LTC3246
APPLICATIONS INFORMATION
siderably. Poor board layout and failure to connect the die
pad (Pin 17) to a large ground plane can result in thermal
junction to ambient impedance well in excess of 40°C/W.
It is also possible to get thermal rates less than 40°C/W
with good airflow over the part and PC board.
Thus, the ambient temperature under this condition cannot exceed 102°C if the junction temperature is to remain
below 150°C, and, if the ambient temperature exceeds
about 127°C, the device will cycle in and out of the thermal
shutdown.
Because of the wide input operating range, it is possible
to exceed the specified operating junction temperature
and even reach thermal shutdown (175°C typ). Figure 6
and Figure 7 show the available output current vs ambient temperature to ensure the 150°C operating junction
temperature is not exceeded.
Every application will have a slightly different thermal rise
than the specified 40°C/W, especially applications with
good airflow. Calculating the actual thermal rate for a
specific application circuit is too complex to be presented
here, but the thermal rate can be measured in application.
This is done by first taking the final application circuit and
enabling the LTC3246 under a known power dissipation
(PD) and raising the ambient temperature slowly until
the LTC3246 shuts down. Note this temperature as T1.
Now, remove the load from the part and raise the ambient temperature slowly until the LTC3246 shuts down
again. Note this temperature as T2. The thermal rate can
be calculated as:
The figures assume worst-case operating conditions and a
thermal impedance of 40°C/W. It is always safe to operate
under the line shown on the graph. Operation above the
line is conditional and is the responsibility of the user to
calculate worst-case operating conditions (temperature
and power) to make sure the part does not exceed the
150°C operating junction temperature for extended periods of time.
The 2:1 Step-Down Charge Pump Operation, 1:1 StepDown Charge Pump Operation, and 1:2 Step-Up Charge
Pump Operation sections provide equations for calculating
power dissipation (PD) in each mode.
For example, if it is determined that the maximum power
dissipation (PD) is 1.2W under normal operation, then the
junction to ambient temperature rise will be:
TJA = 1.2W • 40°C/W = 48°C
JA = PD/(T2 – T1)
Another method for determining maximum safe operating
temperature in application is to configure the LTC3246 to
operate under the worst case operating power dissipation. Then slowly raise the ambient temperature until the
LTC3246 shuts down. At this point the LTC3246 junction
temperature will be about 175°C, so simply subtract
25°C from the shutdown temperature and this is the safe
operating temperature for the application.
0.5
0.5
0.3
SAFE OPERATION
0.2
0.1
0.0
25
50
100
75
125
AMBIENT TEMPERATURE (°C)
0.3
SAFE OPERATION
0.2
0.1
2.7V < VIN < 22V
θJA = 40°C/W
0
150
0.0
3246 F06
Figure 6. 5V Output Operation vs Ambient Temperature
16
CONDITIONAL
OPERATION
0.4
CONDITIONAL
OPERATION
IOUT (A)
IOUT (A)
0.4
2.7V < VIN < 15V
θJA = 40°C/W
0
25
50
100
75
125
AMBIENT TEMPERATURE (°C)
150
3246 F07
Figure 7. 3.3V Output Operation vs Ambient Temperature
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LTC3246
TYPICAL APPLICATIONS
Regulated 2.5V Output with Externally Programmed Watchdog Timing
2.2µF
VIN = 2.7V TO 38V
VIN
1µF
C–
VOUT = 2.5V
IOUT UP TO 500mA
VOUT
SEL1
SEL2
BIAS
10µF
C+
500k
LTC3246
RSTI
RT
RST
47µF
µC
WDI
1270k
OUTS/ADJ
GND
10nF
WT
3246 TA02
1000k
22nF
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17
LTC3246
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LTC3246#packaging for the most recent package drawings.
MSE Package
16-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1667 Rev F)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102
(.112 ±.004)
5.10
(.201)
MIN
2.845 ±0.102
(.112 ±.004)
0.889 ±0.127
(.035 ±.005)
8
1
1.651 ±0.102
(.065 ±.004)
1.651 ±0.102 3.20 – 3.45
(.065 ±.004) (.126 – .136)
0.305 ±0.038
(.0120 ±.0015)
TYP
16
0.50
(.0197)
BSC
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
0.35
REF
0.12 REF
DETAIL “B”
CORNER TAIL IS PART OF
DETAIL “B” THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
9
NO MEASUREMENT PURPOSE
0.280 ±0.076
(.011 ±.003)
REF
16151413121110 9
DETAIL “A”
0° – 6° TYP
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
4.90 ±0.152
(.193 ±.006)
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
DETAIL “A”
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
1234567 8
0.17 – 0.27
(.007 – .011)
TYP
0.50
NOTE:
(.0197)
1. DIMENSIONS IN MILLIMETER/(INCH)
BSC
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
18
0.86
(.034)
REF
0.1016 ±0.0508
(.004 ±.002)
MSOP (MSE16) 0213 REV F
3246fa
For more information www.linear.com/LTC3246
LTC3246
REVISION HISTORY
REV
DATE
DESCRIPTION
A
12/17
Changed ROUT VIN condition
PAGE NUMBER
3
Changed VRSTI_L lower limit
3
Changed IOUT equation resultant to 300mA and text to 150mA
10
Changed circuit pin names
17
3246fa
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license
is granted
by implication
or otherwise under any patent or patent rights of Analog Devices.
For more
information
www.linear.com/LTC3246
19
LTC3246
TYPICAL APPLICATION
Reduced Ripple 3.3V Output with Watchdog Timing Disabled
2.2µF
VIN = 2.7V TO 38V
VIN
C+
SEL2
1µF
C–
10µF
VOUT
OUTS/ADJ
SEL1
BIAS
VOUT = 3.3V
IOUT UP TO 500mA
500k
RST
RST
LTC3246
22µF
RSTI
RT
WT
WDI
GND
3246 TA03
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC3204-3.3/
LTC3204B-3.3/
LTC3204-5/
LTC3204B-5
Low Noise, Regulated Charge Pumps
in (2mm × 2mm) DFN Package
VIN: 1.8V to 4.5V (LTC3204B-3.3), 2.7V to 5.5V (LTC3204B-5), IQ = 48µA, B Version without
Burst Mode Operation, 6-Lead (2mm × 2mm) DFN Package
LTC3440
600mA (IOUT) 2MHz Synchronous
Buck-Boost DC/DC Converter
95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 2.5V, IQ = 25µA, ISD ≤ 1µA, 10-Lead MS
Package
LTC3441
High Current Micropower 1MHz
Synchronous Buck-Boost DC/DC
Converter
95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 2.5V, IQ = 25µA, ISD ≤ 1µA, DFN Package
LTC3443
High Current Micropower 600kHz
Synchronous Buck-Boost DC/DC
Converter
96% Efficiency, VIN: 2.4V to 5.5V, VOUT(MIN) = 2.4V, IQ = 28µA, ISD < 1µA, DFN Package
LTC3240-3.3/
LTC3240-2.5
3.3V/2.5V Step-Up/Step-Down Charge
Pump DC/DC Converter
VIN: 1.8V to 5.5V, VOUT(MAX) = 3.3V/2.5V, IQ = 65µA, ISD < 1µA, 2mm × 2mm DFN Package
LTC3260
Low Noise Dual Supply Inverting
Charge Pump
VIN Range: 4.5V to 32V, IQ = 100µA, 100mA Charge Pump, 50mA Positive LDO, 50mA
Negative LDO
LTC3261
High Voltage Low IQ Inverting Charge
Pump
VIN Range: 4.5V to 32V, IQ = 60µA, 100mA Charge Pump
LTC3245
High Voltage, Low Noise 250mA
Buck-Boost Charge Pump
VIN Range: 2.7V to 38V, VOUT Range: 2.5V to 5V, IQ = 18µA, ISD = 4µA, 3mm × 4mm DFN and
12-Pin MSE Packages
LTC3255
Wide VIN Range Fault Protected 50mA
Step-Down Charge Pump
VIN Range: 4V to 48V, VOUT Range: 2.4V to 15V, IQ = 20µA, 10-Pin 3mm × 3mm DFN and
MSE Packages
LTC3256
Wide VIN Range Dual Output 350mA
Step-Down Charge Pump with WDT
VIN Range: 5.5V to 38V, VOUT Range: 5V/3.3V, IQ = 18µA, 16-Pin MSE Package
20
3246fa
LT 1217 REV A • PRINTED IN USA
www.linear.com/LTC3246
For more information www.linear.com/LTC3246
ANALOG DEVICES, INC. 2016