APL78L05/12 Three-Terminal Low Current Positive Voltage Regulator Features • • • • • • • • • • General Description These series of fixed-voltage monolithic integrated-circuit voltage regulators are designed for a wide range of Three-Terminal Regulators Maximum Input Voltage : 30V applications. These applications include on-card regulation for elimination of noise and distribution problems Output Voltages of 5V, 12V associated with single-point regulation. In addition, they can be used with power-pass elements to make high- Output Current Up to 100mA No External Components current voltage regulators. Each of these regulators can deliver up to 100mA of output current. The internal limit- Internal Thermal Overload Protection ing and thermal shutdown features of these regulators make them essentially immune to overload. When used Internal Short-Circuit Limiting Output Voltage Offered in 4% Tolerance SOP-8, SOT-89, and TO-92/TO-92A Packages as a replacement for a Zener diode-resistor combination, an effective improvement in output impedance can be Lead Free and Green Devices Available obtained together with lower-bias current. (RoHS Compliant) Pin Configuration Applications • • Battery-Powered Circuitry Post Regulator for Switching Power Supply VOUT 1 8 VIN GND 2 7 GND GND 3 6 GND NC 4 5 NC SOP-8 (Top View) 1 2 3 VOUT GND VIN SOT-89 (Front View) VIN VIN GND GND VOUT VOUT TO-92A (Top View) TO-92 (Top View) ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev. A.11 - Jun., 2011 1 www.anpec.com.tw APL78L05/12 Ordering and Marking Information Package Code E : TO-92/TO-92A K : SOP-8 D : SOT-89 Operating Ambient Temperature Range o C : 0 to 70 C Handling Code TR : Tape & Reel TB : Tape & Box (only for TO-92A Bent Legs) PB : Plastic & Box Assembly Material G : Halogen and Lead Free Device APL78L05/12 Assembly Material Handling Code Temperature Range Package Code APL78L05/12 E : APL 78L05/12 XXXXX XXXXX - Date Code APL78L05/12 D : APL78L05/12 XXXXX XXXXX - Date Code APL78L05/12 K : APL78L05/12 XXXXX XXXXX - Date Code Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight). Absolute Maximum Ratings Symbol VIN (Note 1) Parameter Input Voltage Rating Unit 30 VDC 0 to 125 0 to 150 °C -65 to +150 °C Operating Junction Temperature Range TJ TSTG Control Section Power Transistor Storage Temperature Range Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Thermal Characteristics Symbol Parameter Typical Value Unit SOP-8 SOT-89/TO-92/TO-92A 160 180 °C/W SOP-8 SOT-89/TO-92/TO-92A 30 80 °C/W Thermal Resistance from Junction to Ambient in Free Air θJA (Note 2) Thermal Resistance from Junction to Case θJC Note 2: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. Copyright ANPEC Electronics Corp. Rev. A.11 - Jun., 2011 2 www.anpec.com.tw APL78L05/12 Electrical Characteristics VIN = 10V, IOUT = 40mA, TA = 25°C, CIN = 0.33µF, COUT = 0.1µF, unless otherwise specified. Symbol Parameter Unit Min. Typ. Max. 4.8 5.0 5.2 4.75 5 5.25 7.0Vdc≤VIN≤20Vdc - 29 150 8.0Vdc≤VIN≤20Vdc - 26 100 1.0mA≤IOUT≤100mA - 9 60 1.0mA≤IOUT≤40mA - 5 30 - 2.8 6.0 Output Voltage VO APL78L05 Test Conditions 1.0mA≤IOUT≤40mA Output Voltage (0° to +125°C) 7.0Vdc≤VIN≤20Vdc Vdc VIN = 10V, 1.0mA≤IOUT≤40mA Regline Line Regulation Regload Load Regulation IB Symbol ∆ IB Quiescent Current Parameter Quiescent Current Change VIN-VO Dropout Voltage VO Output Voltage VO Output Voltage (0° to +125°C) Test Conditions APL78L12 Min. Typ. Max. 8.0Vdc≤VIN≤20Vdc - 0.15 1.5 1.0mA≤IOUT≤40mA - 0.08 0.1 IOUT = 100mA - 1.9 - 11.5 12 12.5 11.4 12 12.6 14.5Vdc≤VIN≤27Vdc - - 250 1.0mA≤IOUT≤100mA - - 100 1.0mA≤IOUT≤40mA - - 50 - - 6.5 16Vdc≤VIN≤27Vdc - - 1.5 1.0mA ≤IOUT≤40mA - - - IOUT = 100mA - 1.9 - 1.0mA≤IOUT≤40mA 14Vdc≤VIN≤27Vdc mV mV mA Unit mA Vdc VIN = 19V, 1.0mA≤IOUT≤40mA Regline Regload IB ∆ IB VIN-VO Line Regulation Load Regulation Quiescent Current Quiescent Current Change Dropout Voltage Copyright ANPEC Electronics Corp. Rev. A.11 - Jun., 2011 3 mV mA Vdc www.anpec.com.tw APL78L05/12 Typical Operating Characteristics Output Voltage vs. Input Voltage Dropout Voltage vs. Junction Temperature 2.25 8 7 2 Dropout Voltage (V) Output Voltage (V) 6 5 IO=1mA 4 IO=40mA 3 IO=100mA 2 IO=70mA 1.75 IO=40mA 1.5 IO=1mA Dropout of Regulation is defined as when ∆Vo=1% of Vo 1.25 1 1 0 0 2 4 6 8 10 0 25 Input Voltage (V) 75 100 125 Junction Temperature (°C) Quiescent Current vs. Input Voltage Quiescent Current vs. Ambient Temperature 3 .5 3.0 No Load VIN=10V IO=40mA 3 2.8 Quiescent Current (mA) Quiescent Current (mA) 50 2.6 2.4 2 .5 2 1 .5 1 0 .5 2.2 0 0 25 50 75 100 125 0 10 15 20 25 30 35 Input Voltage (V) Ambient Temperature (°C) Copyright ANPEC Electronics Corp. Rev. A.11 - Jun., 2011 5 4 www.anpec.com.tw APL78L05/12 Typical Operating Characteristics (Cont.) Quiescent Current vs. Output Current Dropout Voltage vs. Output Current 1.9 3 VIN=10V 1.85 Dropout Voltage (V) Quiescent Current (mA) 2.5 2 1.5 1 1.8 1.75 1.7 Dropout of Regulation is defined as when ∆Vo=1% of Vo 1.65 0.5 1.6 0 0 20 40 60 80 100 0 20 40 60 80 100 Output Current (mA) Output Current (mA) PSRR vs. Frequency Load-Transient Response +0 COUT=0.1µF COUT=0.1µF VIN=10V -10 IOUT=10mA -20 PSRR (dB) V (100mv/div) VOUT OUT -30 -40 -50 -60 OUT=10mA~80mA = IOUT 10mA~80mA -70 -80 10 100 1k 10k 100k Frequency (Hz) Copyright ANPEC Electronics Corp. Rev. A.11 - Jun., 2011 Time (20µs/div) 5 www.anpec.com.tw APL78L05/12 Typical Operating Characteristics (Cont.) Maximum Power Dissipation vs. Line Transient Response Ambient Temperature TO-92 Type Package No Heat Sink Maximum Power Dissipation (mW) 1300 VIN=9.5V~10.5V COUT=0.1µF IOUT=10mA VOUT=10(mV/div) 1100 900 700 500 300 100 25 75 100 125 Time (100µs/div) Ambient Temperature (°C) Output Voltage vs. Region of Stable ESR vs. Output Current Ambient Temperature 5.02 50 150 10 VIN=10V IO=40mA COUT=0.1µF COUTESR (Ω) Output Voltage (V) 5.015 5.01 5.005 1 Stable Region 0.1 5 Untested 0.01 4.995 0 25 50 75 100 0 125 Ambient Temperature (°C) Copyright ANPEC Electronics Corp. Rev. A.11 - Jun., 2011 20 40 60 80 100 Output Current (mA) 6 www.anpec.com.tw APL78L05/12 Pin Description PIN FUNCTION NO. SOP-8 NAME TO-92 SOT-89 1 1 1 VOUT Output Voltage Output Pin. 2,3,6,7 2 2 GND Ground. A common ground is required between the input and the output voltage. 4,5 - - NC No Internal Connection 8 3 3 VIN Power input pin of the device. The maximum Input Voltage can be 30V. It should be bypassed with a 0.33µF (minimum) capacitor to the GND. Typical Application Circuit VIN APL78L05/12 VOUT COUT= 0.1µF CIN= 0.33µF Note a : A common ground is required between the input and the output voltage. The input voltage must remain typically 2V above the output voltage even during the low point on the input ripple voltage. b : CIN is required if regulator is located an appreciable distance from power supply filter. c : COUT is not needed for stability; however, it improves transient response. Copyright ANPEC Electronics Corp. Rev. A.11 - Jun., 2011 7 www.anpec.com.tw APL78L05/12 Application Information The APL78L05/12, series of fixed voltage regulators, are designed with thermal overload protection that shuts down For example, a 100mA current source would require R to be a 50Ω, 1/2W resistor and the output voltage compli- the circuit when subjected to an excessive power overload condition. In addition, the APL78L05/12 have the func- ance would be the input voltage less 7V. tion of internal short circuit protection to limit the maximum current the circuit will pass. +20V +VO APL78L05 In many low current applications, compensation capacitors are not required. However, it is recommended that 10K 0.33µF 2 7 6 the regulator input will be bypassed with a capacitor if the regulator connects to the power supply filter with long MC1741 3 4 wire lengths, or if the output load capacitance is large. The input bypass capacitor should be selected to provide 0.33µF good high-frequency characteristics to insure stable operation under all load conditions. If the value of the 20V 10K MPSA70 6.5 -VO MPSU55 Figure 2. ±15V Tracking Voltage Regulator capacitor is greater than 0.33µF, the capacitor with tantalum or mylar, or other capacitor having low internal impedance at high frequencies should be chosen. The bypass capacitor should be mounted with the shortest pos- +VI sible leads directly across the regulators input terminals. Good construction techniques should be used to mini- +VO APL78LXX 0.1µF 0.33µF mize ground loops and lead resistance drops since the regulator has no external sense lead. Bypassing the output is also recommended. -VI 0.33µF Input APL79LXX 0.1µF -VO APL78L05 R 0.33µF lO Constant Current to Grounded Load Figure 3. Positive and Negative Regulator Figure 1. Current Regulator The APL78L05 regulators can also be used as a current source when connected as above. In order to minimize dissipation, the APL78L05 is chosen in this application. Resistor R determines the current as below : IO = 5.0V + IB R IB =3.8mA over line and load changes Copyright ANPEC Electronics Corp. Rev. A.11 - Jun., 2011 8 www.anpec.com.tw APL78L05/12 Package Information SOP-8 D E E1 SEE VIEW A h X 45 ° c A 0.25 b GAUGE PLANE SEATING PLANE A1 A2 e L VIEW A S Y M B O L SOP-8 INCHES MILLIMETERS MIN. MAX. MIN. MAX. 1.75 A 0.069 0.010 0.004 0.25 A1 0.10 A2 1.25 b 0.31 0.51 0.012 0.020 c 0.17 0.25 0.007 0.010 D 4.80 5.00 0.189 0.197 E 5.80 6.20 0.228 0.244 E1 3.80 4.00 0.150 0.157 e 0.049 1.27 BSC 0.050 BSC h 0.25 0.50 0.010 0.020 L 0.40 1.27 0.016 0.050 0 0° 8° 0° 8° Note: 1. Follow JEDEC MS-012 AA. 2. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil per side. 3. Dimension “E” does not include inter-lead flash or protrusions. Inter-lead flash and protrusions shall not exceed 10 mil per side. Copyright ANPEC Electronics Corp. Rev. A.11 - Jun., 2011 9 www.anpec.com.tw APL78L05/12 Package Information SOT-89 A D1 C L H E E1 D e e1 B B1 SOT-89 S Y M B O L A MIN. MAX. MIN. MAX. 1.40 1.60 0.055 0.063 B 0.44 0.56 0.017 0.022 B1 0.36 0.48 0.014 0.019 C 0.35 0.44 0.014 0.017 D 4.40 4.60 0.173 0.181 0.072 MILLIMETERS INCHES D1 1.62 1.83 0.064 E 2.29 2.60 0.090 0.102 E1 2.13 2.29 0.084 0.090 e 1.50 BSC e1 H L 0.059 BSC 3.00 BSC 3.94 0.89 0.118 BSC 4.25 0.155 0.167 1.20 0.035 0.047 Note : Follow JEDEC TO-243 AA. Copyright ANPEC Electronics Corp. Rev. A.11 - Jun., 2011 10 www.anpec.com.tw APL78L05/12 Package Information A TO-92 E S D L j e1 b e TO-92 S Y M B O L MIN. MAX. MIN. MAX. A 4.32 5.33 0.170 0.210 b 0.41 0.53 0.016 0.021 D 4.45 5.20 0.175 0.205 E 3.18 4.19 0.125 0.165 e 2.42 2.66 0.095 0.105 e1 1.15 1.39 0.045 0.055 j 3.43 4.00 0.135 0.157 L 12.70 15.00 0.500 0.591 S 2.03 2.66 0.080 0.105 MILLIMETERS INCHES Note : Follow JEDEC TO-92. Copyright ANPEC Electronics Corp. Rev. A.11 - Jun., 2011 11 www.anpec.com.tw APL78L05/12 Package Information TO-92A E S A D L1 e1 e L J b F TO-92A S Y M B O L MIN. MAX. MIN. MAX. A 4.32 5.33 0.170 0.210 b 0.41 0.53 0.016 0.021 D 4.45 5.20 0.175 0.205 E 3.18 4.19 0.125 0.165 F 2.50 2.80 0.098 0.110 e 2.42 2.66 0.095 0.105 e1 1.15 1.39 0.045 0.055 J 3.34 4.00 0.135 0.157 L 12.70 L1 1.70 3.30 0.067 0.130 S 2.03 2.66 0.080 0.105 MILLIMETERS INCHES 0.500 Note : Follow JEDEC TO-92A Copyright ANPEC Electronics Corp. Rev. A.11 - Jun., 2011 12 www.anpec.com.tw APL78L05/12 Carrier Tape & Reel Dimensions P0 P2 P1 A B0 W F E1 OD0 K0 A0 OD1 B A B T SECTION A-A SECTION B-B H A d T1 Application SOP-8 Application SOT-89 A H 330.0±2.00 50 MIN. P0 P1 T1 12.4+2.00 -0.00 P2 4.0±0.10 8.0±0.10 2.0±0.05 A H 178.0±2.00 50 MIN. P0 P1 T1 12.4+2.00 -0.00 P2 4.0±0.10 8.0±0.10 2.0±0.05 C 13.0+0.50 -0.20 D0 1.5+0.10 -0.00 C 13.0+0.50 -0.20 D0 1.5+0.10 -0.00 d D W E1 F 1.5 MIN. 20.2 MIN. 12.0±0.30 1.75±0.10 5.5±0.05 D1 A0 B0 K0 6.40±0.20 5.20±0.20 2.10±0.20 d T 0.6+0.00 -0.40 D W E1 F 1.5 MIN. 20.2 MIN. 12.0±0.30 1.75±0.10 5.50±0.05 D1 T 0.6+0.00 -0.40 A0 B0 K0 4.80±0.20 4.50±0.20 1.80±0.20 1.5 MIN. 1.5 MIN. (mm) Copyright ANPEC Electronics Corp. Rev. A.11 - Jun., 2011 13 www.anpec.com.tw APL78L05/12 Carrier Tape & Box Dimensions Application TO-92A A0 D D1 D2 F1=F2 F1-F2 M H H1 ±0.3 1.7~3.3 16±0.5 9±0.5 4.32~5.33 4.0±0.2 0.36~0.53 4.45~5.20 2.5+0.2 -0.1 H2 H2A H3 H4 H5=H0+M L L1 P P1 0.5 MAX 0.5 MAX 27.0 MAX 20.0 MAX 18.5±0.5 11.0 MAX 2.5 MIN 12.7±0.3 6.35±0.4 P2 T T1 T2 W W1 W2 W W1 50.8±0.5 0.55 MAX 1.42 MAX 0.36~0.68 18.0±0.2 6.0±0.2 ≦1 18.0±0.2 6.0±0.2 (mm) Devices Per Unit Package Type Unit Quantity SOP-8 Tape & Reel 2500 SOT-89 Tape & Reel 1000 TO-92A Tape & Box 2000 TO-92 Plastic & Box 1000 Copyright ANPEC Electronics Corp. Rev. A.11 - Jun., 2011 14 www.anpec.com.tw APL78L05/12 Taping Direction Information SOP-8 USER DIRECTION OF FEED SOT-89 USER DIRECTION OF FEED Copyright ANPEC Electronics Corp. Rev. A.11 - Jun., 2011 15 www.anpec.com.tw APL78L05/12 Classification Profile Classification Reflow Profiles Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly 100 °C 150 °C 60-120 seconds 150 °C 200 °C 60-120 seconds 3 °C/second max. 3°C/second max. 183 °C 60-150 seconds 217 °C 60-150 seconds See Classification Temp in table 1 See Classification Temp in table 2 Time (tP)** within 5°C of the specified classification temperature (Tc) 20** seconds 30** seconds Average ramp-down rate (Tp to Tsmax) 6 °C/second max. 6 °C/second max. 6 minutes max. 8 minutes max. Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) Average ramp-up rate (Tsmax to TP) Liquidous temperature (TL) Time at liquidous (tL) Peak package body Temperature (Tp)* Time 25°C to peak temperature * Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum. ** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum. Copyright ANPEC Electronics Corp. Rev. A.11 - Jun., 2011 16 www.anpec.com.tw APL78L05/12 Classification Reflow Profiles (Cont.) Table 1. SnPb Eutectic Process – Classification Temperatures (Tc) Package Thickness <2.5 mm ≥2.5 mm Volume mm <350 235 °C 220 °C 3 Volume mm ≥350 220 °C 220 °C 3 Table 2. Pb-free Process – Classification Temperatures (Tc) Package Thickness <1.6 mm 1.6 mm – 2.5 mm ≥2.5 mm Volume mm <350 260 °C 260 °C 250 °C 3 Volume mm 350-2000 260 °C 250 °C 245 °C 3 Volume mm >2000 260 °C 245 °C 245 °C 3 Reliability Test Program Test item SOLDERABILITY HOLT PCT TCT HBM MM Latch-Up Method JESD-22, B102 JESD-22, A108 JESD-22, A102 JESD-22, A104 MIL-STD-883-3015.7 JESD-22, A115 JESD 78 Description 5 Sec, 245°C 1000 Hrs, Bias @ Tj=125°C 168 Hrs, 100%RH, 2atm, 121°C 500 Cycles, -65°C~150°C VHBM≧2KV VMM≧200V 10ms, 1tr≧100mA Customer Service Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 2F, No. 11, Lane 218, Sec 2 Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan Tel : 886-2-2910-3838 Fax : 886-2-2917-3838 Copyright ANPEC Electronics Corp. Rev. A.11 - Jun., 2011 17 www.anpec.com.tw