DG417B, DG418B, DG419B Vishay Siliconix Precision Monolithic Quad SPST CMOS Analog Switches DESCRIPTION FEATURES The DG417B, DG418B, DG419B monolithic CMOS analog switches were designed to provide high performance switching of analog signals. Combining low power, low leakages, high speed, low on-resistance and small physical size, the DG417B series is ideally suited for portable and battery powered industrial and military applications requiring high performance and efficient use of board space. • • • • • • To achieve high-voltage ratings and superior switching performance, the DG417B series is built on Vishay Siliconix’s high voltage silicon gate (HVSG) process. Breakbefore-make is guaranteed for the DG419B, which is an SPDT configuration. An epitaxial layer prevents latchup. BENEFITS Each switch conducts equally well in both directions when on, and blocks up to the power supply level when off. The DG417B and DG418B respond to opposite control logic levels as shown in the Truth Table. • • • • • • ± 15 V analog signal range On-resistance - RDS(on): 15 Ω Fast switching action - tON: 110 ns TTL and CMOS compatible MSOP-8 and SOIC-8 package Compliant to RoHS directive 2002/95/EC Widest dynamic range Low signal errors and distortion Break-before-make switching action Simple interfacing Reduced board space Improved reliability APPLICATIONS • • • • • • • Precision test equipment Precision instrumentation Battery powered systems Sample-and-hold circuits Military radios Guidance and control systems Hard disk drivers FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION DG417B Dual-In-Line, SOIC-8 and MSOP-8 S 1 8 D No connect 2 7 V- GND 3 6 IN V+ 4 5 VL Top View TRUTH TABLE Logic 0 1 Logic "0" ≤ 0.8 V Logic "1" ≥ 2.4 V DG417B ON OFF DG418B OFF ON DG419B Dual-In-Line, SOIC-8 and MSOP-8 TRUTH TABLE - DG419B D 1 8 S2 S1 2 7 V- Logic SW1 SW2 GND 3 6 IN 0 ON OFF 1 OFF ON V+ 5 4 Top View VL Logic "0" ≤ 0.8 V Logic "1" ≥ 2.4 V * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 72107 S09-1261-Rev. D, 13-Jul-09 www.vishay.com 1 DG417B, DG418B, DG419B Vishay Siliconix ORDERING INFORMATION Temp Range DG417B, DG418B Package 8-Pin Plastic MiniDIP - 40 °C to 85 °C 8-Pin Narrow SOIC 8-Pin MSOP Part Number DG417BDJ DG417BDJ-E3 DG418BDJ DG418BDJ-E3 DG417BDY DG417BDY-E3 DG417BDY-T1 DG417BDY-T1-E3 DG418BDY DG418BDY-E3 DG418BDY-T1 DG418BDY-T1-E3 DG417BDQ-T1-E3 DG418BDQ-T1-E3 DG419B 8-Pin Plastic MiniDIP DG419BDJ DG419BDJ-E3 8-Pin Narrow SOIC DG419BDY DG419BDY-E3 DG419BDY-T1 DG419BDY-T1-E3 8-Pin MSOP DG419BDQ-T1-E3 - 40 °C to 85 °C ABSOLUTE MAXIMUM RATINGS Parameter Limit V- - 20 V+ 20 GND VL 25 Digital Inputsa, VS, VD Current, (Any Terminal) Continuous Current (S or D) Pulsed at 1 ms, 10 % Duty Cycle Storage Temperature Power Dissipation (Package)b Unit V (GND - 0.3) to (V+) + 0.3 (V-) - 2 V to (V+) + 2 or 30 mA, whichever occurs first 30 100 - 65 to 150 8-Pin Plastic MiniDIPc 400 8-Pin Narrow SOICc 400 8-Pin MSOPd 400 8-Pin CerDIPe 600 mA °C mW Notes: a. Signals on SX, DX, or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. All leads welded or soldered to PC board. c. Derate 5.3 mW/°C above 75 °C. d. Derate 4 mW/°C above 70 °C. e. Derate 8 mW/°C above 75 °C. www.vishay.com 2 Document Number: 72107 S09-1261-Rev. D, 13-Jul-09 DG417B, DG418B, DG419B Vishay Siliconix SCHEMATIC DIAGRAM Typical Channel V+ S VL VLevel Shift/ Drive VIN V+ GND D V- Figure 1. SPECIFICATIONSa Parameter Analog Switch Symbol Analog Signal Rangee Drain-Source On-Resistance VANALOG RDS(on) Test Conditions Unless Otherwise Specified V+ = 15 V, V- = - 15 V VL = 5 V, VIN = 2.4 V, 0.8 Vf IS = - 10 mA, VD = ± 12.5 V V+ = 13.5 V, V- = - 13.5 V IS(off) Switch Off Leakage Current ID(off) V+ = 16.5, V- = - 16.5 V DG417B VD = ± 15.5 V, VS = ± 15.5 V DG418B DG419B Channel On Leakage Current ID(on) V+ = 16.5 V, V- = - 16.5 V VS = VD = ± 15.5 V DG417B DG418B DG419B A Suffix D Suffix - 55 °C to 125 °C - 40 °C to 85 °C Temp.b Full Room Full Room Full Room Full Room Full Room Full Room Full Typ.c Min.d Max.d Min.d Max.d Unit - 15 - 15 - 0.25 -5 - 0.25 -5 - 0.75 - 12 - 0.4 - 10 - 0.75 - 12 15 25 29 0.25 5 0.25 5 0.75 12 0.4 10 0.75 12 V - 0.25 - 20 - 0.25 - 20 - 0.75 - 60 - 0.4 - 40 - 0.75 - 60 15 25 34 0.25 20 0.25 20 0.75 60 0.4 40 0.75 60 15 - 0.1 - 0.1 - 0.1 - 0.4 - 0.4 Ω nA Digital Control Input Current, VIN Low IIL Full - 0.5 0.5 - 0.5 0.5 Input Current, VIN High IIH Full - 0.5 0.5 - 0.5 0.5 µA Dynamic Characteristics Turn-On Time tON Turn-Off Time tOFF Transition Time tTRANS Break-Before-Make Time Delay tD Charge Injection Q Off Isolatione OIRR Channel-to-Channel Crosstalke XTALK Document Number: 72107 S09-1261-Rev. D, 13-Jul-09 RL = 300 Ω, CL = 35 pF VS = ± 10 V, See Switching Time Test Circuit DG417B DG418B DG417B DG418B RL = 300 Ω, CL = 35 pF DG419B VS1 = ± 10 V, VS2 = ± 10 V RL = 300 Ω, CL = 35 pF DG419B VS1 = VS2 = ± 10 V CL = 10 nF Vgen = 0 V, Rgen = 0 Ω RL = 50 Ω, CL = 5 pF, f = 1 MHz DG419B Room Full Room Full Room Full 53 Room 16 Room 38 Room - 82 Room - 88 89 106 80 88 87 96 62 60 3 89 99 80 86 87 93 ns 3 pC dB www.vishay.com 3 DG417B, DG418B, DG419B Vishay Siliconix SPECIFICATIONSa Parameter Dynamic Characteristics Source Off Capacitancee Drain Off Capacitancee Channel On Capacitancee Symbol Test Conditions Unless Otherwise Specified V+ = 15 V, V- = - 15 V VL = 5 V, VIN = 2.4 V, 0.8 Vf CS(off) CD(off) CD(on) f = 1 MHz, VS = 0 V f = 1 MHz, VS = 0 V DG417B DG418B DG417B DG418B DG419B A Suffix D Suffix - 55 °C to 125 °C - 40 °C to 85 °C Temp.b Typ.c Room 12 Room 12 Room 50 Room 57 Room Full Room Full Room Full Room Full 0.001 Min.d Max.d Min.d Maxd. Unit pF Power Supplies Positive Supply Current I+ Negative Supply Current I- Logic Supply Current IL Ground Current V+ = 16.5 V, V- = - 16.5 V VIN = 0 or 5 V IGND - 0.001 1 5 -1 -5 0.001 - 0.001 1 5 -1 -5 1 5 -1 -5 1 5 µA -1 -5 SPECIFICATIONSa Parameter Analog Switch Symbol Analog Signal Rangee Drain-Source On-Resistance Dynamic Characteristics VANALOG RDS(on) Turn-On Time tON Turn-Off Time tOFF Break-Before-Make Time Delay tD Transition Time tTRANS Charge Injection Q Test Conditions Unless Otherwise Specified V+ = 12 V, V- = 0 V VL = 5 V, VIN = 2.4 V, 0.8 Vf Temp.b IS = - 10 mA, VD = 3.8 V V+ = 10.8 V Full Room Full Room Full Room Full RL = 300 Ω, CL = 35 pF VS = 8 V, See Switching Time Test Circuit RL = 300 Ω, CL = 35 pF A Suffix D Suffix - 55 °C to 125 °C - 40 °C to 85 °C DG419B Room RL = 300 Ω, CL = 35 pF VS1 = 0 V, 8 V, VS2 = 8 V, 0 V CL = 10 nF, Vgen = 0 V, Rgen = 0 Ω Room Full Room Typ.c Min.d Max.d Min.d Max.d Unit 0 12 35 52 0 12 35 45 V 26 125 155 66 73 100 38 62 25 125 143 66 69 ns 25 119 153 95 Ω 119 141 18 pC Power Supplies Positive Supply Current I+ Negative Supply Current I- Logic Supply Current IL Ground Current IGND V+ = 13.2 V, VL = 5.25 V VIN = 0 or 5 V Room Full 0.001 Room - 0.001 Room 0.001 Room - 0.001 1 5 -1 -5 1 5 -1 -5 1 5 -1 -5 1 5 µA -1 -5 Notes: a. Refer to PROCESS OPTION FLOWCHART. b. Room = 25 °C, full = as determined by the operating temperature suffix. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this datasheet. e. Guaranteed by design, not subject to production test. f. VIN = input voltage to perform proper function. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. www.vishay.com 4 Document Number: 72107 S09-1261-Rev. D, 13-Jul-09 DG417B, DG418B, DG419B Vishay Siliconix TYPICAL CHARACTERISTICS TA = 25 °C, unless otherwise noted 40 TA = 25 °C VL = 5 V RDS(on) - Drain-Source On-Resistance (Ω) RDS(on) - Drain-Source On-Resistance (Ω) 300 250 200 V+ = 3 V VL = 3 V 150 100 V+ = 12 V V+ = 5 V 50 V+ = 15 V V+ = 8 V V+ = 20 V 0 0 4 8 12 16 TA = 25 °C 35 30 ±5V 25 ±8V 20 ± 10 V ± 12 V 15 ± 15 V 10 ± 20 V 5 - 20 20 - 15 - 10 VD - Drain Voltage (V) On-Resistance vs. VD and Unipolar Power Supply Voltage RDS(on) - Drain-Source On-Resistance (Ω) RDS(on) - Drain-Source On-Resistance (Ω) 25 125 °C 20 85 °C 15 25 °C - 55 °C 10 20 35 85 °C 30 25 °C 25 - 55 °C 20 15 V+ = 12 V V- = 0 V VL = 5 V 10 5 - 10 -5 0 5 10 15 0 2 4 6 8 10 12 VD - Drain Voltage (V) On-Resistance vs. VD and Temperature 100 m 100 V ± = ± 15 V VL = 5 V TA = 25 °C I+ - Supply Current (nA) 10 m 40 ID, IS (pA) 15 125 °C 40 VD - Drain Voltage (V) ID(on) ID(off) 20 0 IS(off) - 20 100 µ I+, I- 10 µ IL 1µ 100 n - 60 10 n - 80 V ± = ± 15 V VL = 5 V 1m - 40 - 100 -15 10 45 On-Resistance vs. VD and Temperature 60 5 50 V ± = ± 15 V VL = 5 V 80 0 On-Resistance vs. VD and Dual Supply Voltage 30 5 - 15 -5 VD - Drain Voltage (V) 1n - 10 -5 0 5 10 15 100 p 10 100 1K 10 K 100 K 1M 10 M VD or VS - Drain or Source Voltage (V) Input Switching Frequency (Hz) Leakage vs. Analog Voltage Supply Current vs. Input Switching Frequency Document Number: 72107 S09-1261-Rev. D, 13-Jul-09 www.vishay.com 5 DG417B, DG418B, DG419B Vishay Siliconix TYPICAL CHARACTERISTICS TA = 25 °C, unless otherwise noted 100 140 VL = 5 V 90 120 80 tON V = 12 V 80 tON V = ± 15 V 60 tOFF V = ± 15 V t ON , t OFF (ns) 100 t ON , t OFF (ns) V ± = ± 15 V VL = 5 V 70 tTRANS- 60 tTRANS+ 50 40 tOFF V = 12 V 40 30 20 - 55 - 35 - 15 5 25 45 65 85 105 20 - 55 125 - 35 - 15 25 45 85 105 125 10 140 Loss, OIRR, X TALK (dB) - 10 tTRANS- 100 Loss 0 V+ = 12 V V- = 0 V VL = 5 V 120 80 tTRANS+ 60 - 20 - 30 OIRR - 40 - 50 - 60 - 70 DG417B V+ = + 15 V V- = - 15 V RL = 50 Ω - 80 40 - 90 20 - 55 - 35 - 15 5 25 45 65 85 105 - 100 100K 125 1M 10M 100M 1G Temperature ( C) Frequency (Hz) Transition Time vs. Temperature Insertion Loss, Off -Isolation Crosstalk vs. Frequency 3.0 10 Loss 0 VL = 5 V 2.5 - 10 Loss, OIRR, X TALK (dB) VT - Switching Threshold (V) 65 Transition Time vs. Temperature Switching Time vs. Temperature t ON , t OFF (ns) 5 Temperature ( C) Temperature ( C) 2.0 1.5 1.0 0.5 - 20 - 30 OIRR - 40 XTALK - 50 - 60 - 70 DG419B V+ = + 15 V V- = - 15 V RL = 50 Ω - 80 - 90 0.0 4 6 8 10 12 14 16 18 V+ - Supply Voltage (V) Switching Threshold vs. Supply Voltage www.vishay.com 6 20 - 100 100K 1M 10M 100M 1G Frequency (Hz) Insertion Loss, Off -Isolation Crosstalk vs. Frequency Document Number: 72107 S09-1261-Rev. D, 13-Jul-09 DG417B, DG418B, DG419B Vishay Siliconix TYPICAL CHARACTERISTICS TA = 25 °C, unless otherwise noted 200 Qinj - Charge Injection (pC) 160 140 200 180 DG417B CL = 10 nF 160 140 Qinj - Charge Injection (pC) 180 120 100 80 60 40 20 0 V+ = + 15 V V- = - 15 V V+ = + 12 V V- = 0 V - 20 - 40 120 100 80 V+ = + 15 V V- = - 15 V 60 40 20 0 V+ = + 12 V V- = 0 V - 20 V+ = + 12 V V- = - 12 V - 40 V+ = + 12 V V- = - 12 V - 60 - 80 - 100 - 15 - 12 -9 -6 -3 - 60 - 80 - 100 0 3 6 9 12 15 - 15 - 12 -9 -6 -3 0 3 6 9 12 Analog Voltage (V) Analog Voltage (V) Charge Injection vs. Analog Voltage (Measured at drain pin) Charge Injection vs. Analog Voltage (Measured at source pin) 100 80 60 40 20 0 - 20 - 40 - 60 - 80 - 100 - 120 - 140 - 160 - 180 - 200 - 15 - 12 DG419B CL = 10 nF V+ = + 12 V V- = - 12 V Qinj - Charge Injection (pC) Qinj - Charge Injection (pC) DG417B CL = 10 nF V+ = + 12 V V- = - 0 V V+ = + 15 V V- = - 15 V -9 -6 -3 0 3 6 9 12 15 200 180 DG419B 160 CL = 10 nF 140 120 100 V+ = + 15 V 80 V- = - 15 V 60 40 20 0 - 20 - 40 V+ = + 12 V - 60 V- = - 12 V - 80 - 100 - 15 - 12 - 9 - 6 - 3 0 15 V+ = + 12 V V- = - 0 V 3 6 9 12 Analog Voltage (V) Analog Voltage (V) Charge Injection vs. Analog Voltage (Measured at drain pin) Charge Injection vs. Analog Voltage (Measured at source pin) 15 TEST CIRCUITS VO is the steady state output with the switch on. +5V + 15 V 3V Logic Input VL V+ S 0V D VO 10 V IN GND tr < 5 ns tf < 5 ns 50 % V- CL 35 pF RL 300 - 15 V CL (includes fixture and stray capacitance) RL VO = VS RL + R DS(on) tOFF Switch Input VS Switch Output 0V Note: VO 90 % tON Logic input waveform is inverted for switches that have the opposite logic sense. Figure 2. Switching Time (DG417B/418B) Document Number: 72107 S09-1261-Rev. D, 13-Jul-09 www.vishay.com 7 DG417B, DG418B, DG419B Vishay Siliconix TEST CIRCUITS +5V +1V Logic Input VL V+ S1 VS1 tr < 5 ns tf < 5 ns 3V 0V D VO S2 VS2 RL 300 IN Switch Output V- GND VS1 = VS2 VO CL 35 pF 90 % 0V tD tD CL (includes fixture and stray capacitance) - 15 V Figure 3. Break-Before-Make (DG419B) +5V VL + 15 V V+ S1 VS1 D VO Logic Input 50 % 0V S2 VS2 IN tTRANS CL 35 pF RL 300 tr < 5 ns tf < 5 ns 3V tTRANS VS1 V01 V- GND 90 % Switch Output V02 VS2 - 15 V 10 % CL (includes fixture and stray capacitance) RL VO = VS RL + rDS(on) Figure 4. Transition Time (DG419B) Rg +5V + 15 V VL V+ S VO D IN VO INX OFF CL 10 nF 3V GND VO V- ON OFF Q = VO x CL - 15 V Figure 5. Charge Injection www.vishay.com 8 Document Number: 72107 S09-1261-Rev. D, 13-Jul-09 DG417B, DG418B, DG419B Vishay Siliconix TEST CIRCUITS +5V + 15 V C C VL VL V+ S VS 50 RL IN 0 V, 2.4 V IN GND 0.8 V GND VO D Rg = 50 S2 RL C D Rg = 50 VO + 15 V C V+ S1 VS +5V V- C C V- - 15 V - 15 V XTALK Isolation = 20 log C = RF bypass Off Isolation = 20 log VO VO VS VS Figure 7. Off isolation Figure 6. Crosstalk +5V + 15 V C C VL V+ S VS D VO Rg = 50 RL IN 0 V, 2.4 V GND V- C - 15 V Figure 8. Insertion Loss +5V + 15 V + 15 V C C VL V+ V+ S2 S DG417B/418B IN HP4192A Impedance Analyzer or Equivalent D GND V- C f = 1 MHz S1 DG419B Meter 0 V, 2.4 V NC C 0 V, 2.4 V Meter IN D2 GND HP4192A Impedance Analyzer or Equivalent D1 V- C f = 1 MHz - 15 V - 15 V Figure 9. Source/Drain Capacitances Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?72107. Document Number: 72107 S09-1261-Rev. D, 13-Jul-09 www.vishay.com 9 Package Information Vishay Siliconix SOIC (NARROW): 8-LEAD JEDEC Part Number: MS-012 8 6 7 5 E 1 3 2 H 4 S h x 45 D C 0.25 mm (Gage Plane) A e B All Leads q A1 L 0.004" MILLIMETERS INCHES DIM Min Max Min Max A 1.35 1.75 0.053 0.069 A1 0.10 0.20 0.004 0.008 B 0.35 0.51 0.014 0.020 C 0.19 0.25 0.0075 0.010 D 4.80 5.00 0.189 0.196 E 3.80 4.00 0.150 e 0.101 mm 1.27 BSC 0.157 0.050 BSC H 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.020 L 0.50 0.93 0.020 0.037 q 0° 8° 0° 8° S 0.44 0.64 0.018 0.026 ECN: C-06527-Rev. I, 11-Sep-06 DWG: 5498 Document Number: 71192 11-Sep-06 www.vishay.com 1 Package Information Vishay Siliconix MSOP: 8−LEADS JEDEC Part Number: MO-187, (Variation AA and BA) (N/2) Tips) 2X 5 A B C 0.20 N N-1 0.60 0.48 Max Detail “B” (Scale: 30/1) Dambar Protrusion E 1 2 0.50 N/2 0.60 0.08 M C B S b A S 7 Top View b1 e1 With Plating e A See Detail “B” c1 0.10 C -H- A1 D 6 Seating Plane c Section “C-C” Scale: 100/1 (See Note 8) Base Metal -A- 3 See Detail “A” Side View 0.25 BSC C Parting Line 0.07 R. Min 2 Places Seating Plane ς A2 0.05 S C E1 -B- L 4 T -C- 3 0.95 End View Detail “A” (Scale: 30/1) N = 8L NOTES: 1. Die thickness allowable is 0.203"0.0127. 2. Dimensioning and tolerances per ANSI.Y14.5M-1994. 3. Dimensions “D” and “E1” do not include mold flash or protrusions, and are measured at Datum plane -H- , mold flash or protrusions shall not exceed 0.15 mm per side. 4. Dimension is the length of terminal for soldering to a substrate. 5. Terminal positions are shown for reference only. 6. Formed leads shall be planar with respect to one another within 0.10 mm at seating plane. 7. The lead width dimension does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08 mm total in excess of the lead width dimension at maximum material condition. Dambar cannot be located on the lower radius or the lead foot. Minimum space between protrusions and an adjacent lead to be 0.14 mm. See detail “B” and Section “C-C”. 8. Section “C-C” to be determined at 0.10 mm to 0.25 mm from the lead tip. 9. Controlling dimension: millimeters. 10. This part is compliant with JEDEC registration MO-187, variation AA and BA. 11. Datums -A- and -B- to be determined Datum plane -H- . MILLIMETERS Dim Min Nom Max A A1 A2 b b1 c c1 D E E1 e e1 L N T - - 1.10 0.05 0.10 0.15 0.75 0.85 0.95 0.25 - 0.38 8 0.25 0.30 0.33 8 0.13 - 0.23 0.15 0.18 0.13 3.00 BSC Note 3 4.90 BSC 2.90 3.00 3.10 3 0.70 4 0.65 BSC 1.95 BSC 0.40 0.55 8 0_ 4_ 5 6_ ECN: T-02080—Rev. C, 15-Jul-02 DWG: 5867 12. Exposed pad area in bottom side is the same as teh leadframe pad size. Document Number: 71244 12-Jul-02 www.vishay.com 1 Package Information Vishay Siliconix PDIP: 8ĆLEAD 8 7 6 5 E1 1 2 Dim A A1 B B1 C D E E1 e1 eA L Q1 S 3 E 4 D S Q1 A MILLIMETERS Min Max INCHES Min Max 3.81 5.08 0.150 0.200 0.38 1.27 0.015 0.050 0.38 0.51 0.015 0.020 0.89 1.65 0.035 0.065 0.20 0.30 0.008 0.012 9.02 10.92 0.355 0.430 7.62 8.26 0.300 0.325 5.59 7.11 0.220 0.280 2.29 2.79 0.090 0.110 7.37 7.87 0.290 0.310 2.79 3.81 0.110 0.150 1.27 2.03 0.050 0.080 0.76 1.65 0.030 0.065 ECN: S-03946—Rev. E, 09-Jul-01 DWG: 5478 A1 15° MAX e1 B1 Document Number: 71259 05-Jul-01 L B C NOTE: End leads may be half leads. eA www.vishay.com 1 Package Information Vishay Siliconix CERDIP: 8ĆLEAD 8 7 6 MILLIMETERS 5 Dim A A1 B B1 C D E E1 e1 eA L L1 Q1 S E E1 1 2 3 4 D S e1 Q1 A L1 A1 ∝ L INCHES Min Max Min Max 4.06 5.08 0.160 0.200 0.51 1.14 0.020 0.045 0.38 0.51 0.015 0.020 1.14 1.65 0.045 0.065 0.20 0.30 0.008 0.012 9.40 10.16 0.370 0.400 7.62 8.26 0.300 0.325 6.60 7.62 0.260 0.300 2.54 BSC 0.100 BSC 7.62 BSC 0.300 BSC 3.18 3.81 0.125 0.150 3.18 5.08 0.150 0.200 1.27 2.16 0.050 0.085 0.64 1.52 0.025 0.060 0° 15° 0° 15° ECN: S-03946—Rev. C, 09-Jul-01 DWG: 5348 B1 B Document Number: 71280 03-Jul-01 C eA ∝ www.vishay.com 1 VISHAY SILICONIX TrenchFET® Power MOSFETs Application Note 808 Mounting LITTLE FOOT®, SO-8 Power MOSFETs Wharton McDaniel Surface-mounted LITTLE FOOT power MOSFETs use integrated circuit and small-signal packages which have been been modified to provide the heat transfer capabilities required by power devices. Leadframe materials and design, molding compounds, and die attach materials have been changed, while the footprint of the packages remains the same. See Application Note 826, Recommended Minimum Pad Patterns With Outline Drawing Access for Vishay Siliconix MOSFETs, (http://www.vishay.com/ppg?72286), for the basis of the pad design for a LITTLE FOOT SO-8 power MOSFET. In converting this recommended minimum pad to the pad set for a power MOSFET, designers must make two connections: an electrical connection and a thermal connection, to draw heat away from the package. 0.288 7.3 0.050 1.27 0.196 5.0 0.027 0.69 0.078 1.98 0.2 5.07 Figure 1. Single MOSFET SO-8 Pad Pattern With Copper Spreading Document Number: 70740 Revision: 18-Jun-07 0.050 1.27 0.088 2.25 0.088 2.25 0.027 0.69 0.078 1.98 0.2 5.07 Figure 2. Dual MOSFET SO-8 Pad Pattern With Copper Spreading The minimum recommended pad patterns for the single-MOSFET SO-8 with copper spreading (Figure 1) and dual-MOSFET SO-8 with copper spreading (Figure 2) show the starting point for utilizing the board area available for the heat-spreading copper. To create this pattern, a plane of copper overlies the drain pins. The copper plane connects the drain pins electrically, but more importantly provides planar copper to draw heat from the drain leads and start the process of spreading the heat so it can be dissipated into the ambient air. These patterns use all the available area underneath the body for this purpose. Since surface-mounted packages are small, and reflow soldering is the most common way in which these are affixed to the PC board, “thermal” connections from the planar copper to the pads have not been used. Even if additional planar copper area is used, there should be no problems in the soldering process. The actual solder connections are defined by the solder mask openings. By combining the basic footprint with the copper plane on the drain pins, the solder mask generation occurs automatically. A final item to keep in mind is the width of the power traces. The absolute minimum power trace width must be determined by the amount of current it has to carry. For thermal reasons, this minimum width should be at least 0.020 inches. The use of wide traces connected to the drain plane provides a low impedance path for heat to move away from the device. www.vishay.com 1 APPLICATION NOTE In the case of the SO-8 package, the thermal connections are very simple. Pins 5, 6, 7, and 8 are the drain of the MOSFET for a single MOSFET package and are connected together. In a dual package, pins 5 and 6 are one drain, and pins 7 and 8 are the other drain. For a small-signal device or integrated circuit, typical connections would be made with traces that are 0.020 inches wide. Since the drain pins serve the additional function of providing the thermal connection to the package, this level of connection is inadequate. The total cross section of the copper may be adequate to carry the current required for the application, but it presents a large thermal impedance. Also, heat spreads in a circular fashion from the heat source. In this case the drain pins are the heat sources when looking at heat spread on the PC board. 0.288 7.3 Application Note 826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR SO-8 0.172 (4.369) 0.028 0.022 0.050 (0.559) (1.270) 0.152 (3.861) 0.047 (1.194) 0.246 (6.248) (0.711) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index APPLICATION NOTE Return to Index www.vishay.com 22 Document Number: 72606 Revision: 21-Jan-08 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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It is the customer’s responsibility to validate that a particular product with the properties described in the product specification is suitable for use in a particular application. Parameters provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All operating parameters, including typical parameters, must be validated for each customer application by the customer’s technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein. Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the Vishay product could result in personal injury or death. Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. Material Category Policy Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment (EEE) - recast, unless otherwise specified as non-compliant. Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU. Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000