LINER LTC1452IN8

LTC1451
LTC1452/LTC1453
12-Bit Rail-to-Rail
Micropower DACs in SO-8
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FEATURES
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DESCRIPTIO
12-Bit Resolution
Buffered True Rail-to-Rail Voltage Output
3V Operation (LTC1453), ICC: 250µA Typ
5V Operation (LTC1451), ICC: 400µA Typ
3V to 5V Operation (LTC1452), ICC: 225µA Typ
Built-In Reference: 2.048V (LTC1451)
1.220V (LTC1453)
Multiplying Version (LTC1452)
Power-On Reset
SO-8 Package
3-Wire Cascadable Serial Interface
Maximum DNL Error: 0.5LSB
Schmitt Trigger on Clock Input Allows Direct
Optocoupler Interface
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APPLICATIO S
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The LTC1451 has an onboard reference of 2.048V and a
full-scale output of 4.095V. It operates from a single 4.5V
to 5.5V supply.
The LTC1452 is a multiplying DAC with a full-scale output
of twice the reference input voltage. It operates from a
single supply of 2.7V to 5.5V.
The LTC1453 has an onboard 1.22V reference and a fullscale output of 2.5V. It operates from a single supply of
2.7V to 5.5V.
The low power supply current makes the LTC1451 family
ideal for battery-powered applications. The space saving
8-pin SO package and operation with no external components provide the smallest 12-bit DAC system available.
Digital Calibration
Industrial Process Control
Automatic Test Equipment
Cellular Telephones
, LTC and LT are registered trademarks of Linear Technology Corporation.
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The LTC®1451/LTC1452/LTC1453 are complete single
supply, rail-to-rail voltage output 12-bit digital-to-analog
converters (DACs) in an SO-8 package. They include an
output buffer amplifier and an easy-to-use 3-wire
cascadable serial interface.
TYPICAL APPLICATIO
Differential Nonlinearity
vs Input Code
Daisy-Chained Control Outputs
5V
0.5
0.1µF
VCC
CLK
µP
LTC1451
VOUT
CS/LD
DOUT VREF
CONTROL
OUTPUT 1
GND
DNL ERROR (LSB)
DIN
0.0
0.1µF
DIN
VCC
CLK
CS/LD
LTC1451
DOUT VREF
VOUT
CONTROL
OUTPUT 2
GND
–0.5
0
512 1024 1536 2048 2560 3072 3584 4095
CODE
1451/2/3 TA02
TO NEXT DAC
1451/2/3 TA01
1
LTC1451
LTC1452/LTC1453
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AXI U
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ABSOLUTE
RATI GS
(Note 1)
VCC to GND .............................................. – 0.5V to 7.5V
TTL Input Voltage .................................... – 0.5V to 7.5V
VOUT, DOUT .................................... – 0.5V to VCC + 0.5V
REF ................................................ – 0.5V to VCC + 0.5V
Maximum Junction Temperature ......... – 65°C to 125°C
Operating Temperature Range
Commercial ........................................... 0°C to 70°C
Industrial ......................................... – 40°C to 85°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
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PACKAGE/ORDER I FOR ATIO
ORDER PART NUMBER
TOP VIEW
CLK 1
8
VCC
DIN 2
7
VOUT
CS/LD 3
6
REF
DOUT 4
5
GND
N8 PACKAGE
8-LEAD PDIP
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 125°C, θJA = 100°C/W (N8)
TJMAX = 125°C, θJA = 150°C/W (S8)
LTC1451CN8
LTC1452CN8
LTC1453CN8
LTC1451IN8
LTC1452IN8
LTC1453IN8
S8 PART MARKING
1451
1452
1453
1451I
1452I
1453I
LTC1451CS8
LTC1452CS8
LTC1453CS8
LTC1451IS8
LTC1452IS8
LTC1453IS8
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 4.5V to 5.5V (LTC1451), 2.7V to 5.5V (LTC1452/LTC1453),
internal or external reference (VREF ≤ VCC /2), VOUT and REF unloaded, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
DAC
Resolution
●
12
Bits
DNL
Differential Nonlinearity
Guaranteed Monotonic (Note 2)
●
±0.5
LSB
INL
Integral Nonlinearity
TA = 25°C
(Note 2)
●
±3.5
±4
LSB
LSB
●
±12
±18
mV
mV
VOS
Offset Error
VOSTC
Offset Error Temperature
Coefficient
VFS
Full-Scale Voltage
VFSTC
2
Full-Scale Voltage
Temperature Coefficient
TA = 25°C
±15
µV/°C
When Using Internal Reference, LTC1451, TA = 25°C
LTC1451
●
4.065
4.045
4.095
4.095
4.125
4.145
V
V
External 2.048V Reference, VCC = 5V, LTC1452
●
4.075
4.095
4.115
V
When Using Internal Reference, LTC1453, TA = 25°C
LTC1453
●
2.470
2.460
2.500
2.500
2.530
2.540
V
V
When Using Internal Reference, LTC1451
When Using External 2.048V Reference, LTC1452
When Using Internal Reference, LTC1453
± 0.10
±0.02
±0.10
LSB/°C
LSB/°C
LSB/°C
LTC1451
LTC1452/LTC1453
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 4.5V to 5.5V (LTC1451), 2.7V to 5.5V (LTC1452/LTC1453),
internal or external reference (VREF ≤ VCC /2), VOUT and REF unloaded, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
2.008
1.195
2.048
1.220
2.088
1.245
V
V
Reference (LTC1451/LTC1453)
Reference Output Voltage
LTC1451
LTC1453
●
●
±0.08
Reference Output
Temperature Coefficient
Reference Line Regulation
●
0.7
±2
0.2
0.6
± 1.5
±3
LSB
LSB
VCC /2
V
Reference Load Regulation
0 ≤ IOUT ≤ 100µA, LTC1451
LTC1453
●
●
Reference Input Range
VREF ≤ VCC – 1.5V
●
Reference Input Resistance
●
8
Reference Input Capacitance
Short-Circuit Current
LSB/°C
14
30
kΩ
80
mA
5.5
5.5
5.5
V
V
V
620
350
500
µA
µA
µA
15
REF Shorted to GND
●
LSB/V
pF
Power Supply
VCC
Positive Supply Voltage
For Specified Performance, LTC1451
LTC1452
LTC1453
●
●
●
4.5
2.7
2.7
ICC
Supply Current
4.5V ≤ VCC ≤ 5.5V (Note 4), LTC1451
2.7V ≤ VCC ≤ 5.5V (Note 4), LTC1452
2.7V ≤ VCC ≤ 5.5V (Note 4), LTC1453
●
●
●
300
120
150
Short-Circuit Current Low
VOUT Shorted to GND
●
100
mA
Short-Circuit Current High
VOUT Shorted to VCC
●
120
mA
Output Impedance to GND
Input Code = 0
●
120
Ω
Voltage Output Slew Rate
(Note 3)
●
Voltage Output Settling Time
400
225
250
Op Amp DC Performance
40
AC Performance
1.0
V/µs
(Notes 3, 4) to ±0.5LSB
14
µs
0.3
nV • s
AC Feedthrough
REF = 1kHz, 2VP-P, LTC1452
– 95
dB
Signal-to-Noise + Distortion
REF = 1kHz, 2VP-P, (Code: All 1s) LTC1452
85
dB
Digital Feedthrough
SINAD
0.4
3
LTC1451
LTC1452/LTC1453
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V (LTC1451LTC1452), VCC = 3V (LTC1453).
SYMBOL
PARAMETER
CONDITIONS
LTC1451/LTC1452
MIN
TYP
MAX
MIN
2.4
2.0
LTC1453
TYP
MAX
UNITS
Digital I/O
VIH
Digital Input High Voltage
●
V
VIL
Digital Input Low Voltage
●
VOH
Digital Output High Voltage
IOUT = – 1mA
●
VOL
Digital Output Low Voltage
IOUT = 1mA
●
0.4
0.4
V
ILEAK
Digital Input Leakage
VIN = GND to VCC
●
±10
±10
µA
CIN
Digital Input Capacitance
Guaranteed by Design
Not Subject to Test
●
10
10
pF
0.8
VCC – 1.0
0.6
V
VCC – 0.7
V
Switching
t1
DIN Valid to CLK Setup
●
t2
DIN Valid to CLK Hold
●
0
0
ns
t3
CLK High Time
●
40
60
ns
t4
CLK Low Time
●
40
60
ns
t5
CS/LD Pulse Width
●
50
80
ns
t6
LSB CLK to CS/LD
●
40
60
ns
t7
CS/LD Low to CLK
●
20
30
ns
t8
DOUT Output Delay
t9
CLK Low to CS/LD Low
CLOAD = 15pF
40
60
150
●
●
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2: Nonlinearity is defined from the first code that is greater than or
equal to the maximum offset specification to code 4095 (full scale).
ns
220
20
ns
30
ns
Note 3: Load is 5kΩ in parallel with 100pF.
Note 4: DAC switched between all 1s and the code corresponding to VOS
for the part, i.e., LTC1451: code 18; LTC1453: code 30.
Note 5: Digital inputs at 0V or VCC.
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TYPICAL PERFOR A CE CHARACTERISTICS
LTC1451 Minimum Supply
Voltage vs Load Current
5.4
4.50
4.25
5.0
4.8
4.6
4.4
4.2
4.0
0.0001 0.001
450
∆VOUT < 1LSB
440
430
4.00
SUPPLY CURRENT (µA)
5.2
MINIMUM SUPPLY VOLTAGE (V)
MINIMUM SUPPLY VOLTAGE (V)
∆VOUT < 1LSB
3.75
3.50
3.25
3.00
2.75
0.01
0.1
1
LOAD CURRENT (mA)
10
100
2.25
0.0001 0.001
420
410
VCC = 5.5V
400
390
VCC = 4.5V
VCC = 5V
380
370
2.50
1451/2/3 G01
4
LTC1451
Supply Current vs Temperature
LTC1453 Minimum Supply
Voltage vs Load Current
360
0.01
0.1
1
LOAD CURRENT (mA)
10
100
1451/2/3 G02
350
–55
–25
35
65
5
TEMPERATURE (°C)
95
125
1451/2/3 G03
LTC1451
LTC1452/LTC1453
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TYPICAL PERFOR A CE CHARACTERISTICS
LTC1451
Supply Current vs Logic Input
Voltage
4.0
FULL SCALE
RL TIED TO GND
3.5
0.95
OUTPUT SWING (V)
SUPPLY CURRENT (mA)
1000
4.5
ALL DIGITAL INPUTS
TIED TOGETHER
0.85
0.75
0.65
3.0
2.5
VCC = 5V
2.0
1.5
0.55
1.0
0.45
ZERO SCALE
RL TIED TO VCC
0.5
0
10
0.35
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
LOGIC INPUT VOLTAGE (V)
100
1k
LOAD RESISTANCE (Ω)
OUTPUT PULL-DOWN VOLTAGE (mV)
1.15
1.05
LTC1451
Pull-Down Voltage vs Output Sink
Current Capability
LTC1451
Output Swing vs Load Resistance
125°C
100
25°C
10
–55°C
1
0.1
0.0001 0.001 0.01
0.1
1
10
OUTPUT SINK CURRENT (mA)
10k
1451/2/3 G06
1451/2/3 G05
1451/2/3 G04
LTC1451
Offset Voltage vs Temperature
LTC1451
Integral Nonlinearity (INL)
LTC1451
Differential Nonlinearity (DNL)
0.5
900
100
2.0
1.6
1.2
600
500
ERROR (LSB)
0.8
DNL ERROR (LSB)
700
0.0
0.4
0
–0.4
–0.8
VCC = 5V
INTERNAL REFERENCE
TA = 25°C
–1.2
400
–1.6
300
–55
–0.5
–25
35
65
5
TEMPERATURE (°C)
95
125
0
512 1024 1536 2048 2560 3072 3584 4095
CODE
–2.0
0
512 1024 1536 2048 2560 3072 3584 4095
CODE
1451/2/3 TA02
1451/2/3 G07
LTC1452
Total Harmonic Distortion + Noise
vs Frequency
TOTAL HARMONIC DISTORTION + NOISE (dB)
OFFSET VOLTAGE (µV)
800
1451/2/3 G09
LTC1451
Broadband Output Noise
–40
–50
VCC = 5V
VIN = 2VP-P
VOUT = 4VP-P
–60
0.2LSB/DIV
–70
–80
–90
–100
50 100
10k
1k
FREQUENCY (Hz)
100k
5ms/DIV
CODE = FFFH
BW = 3Hz TO 1.4MHz
GAIN = 1000
1451/2/3 G10
1451/2/3 G08
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LTC1451
LTC1452/LTC1453
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PI FU CTIO S
CLK: The TTL Level Input for the Serial Interface Clock.
GND: Ground.
DIN: The TTL Level Input for the Serial Interface Data. Data
on the DIN pin is latched into the shift register on the rising
edge of the serial clock.
REF: The Output of the Internal Reference and the Input
to the DAC Resistor Ladder. An external reference with
voltage up to VCC /2 may be used for the LTC1452.
CS/LD: The TTL Level Input for the Serial Interface Enable
and Load Control. When CS/LD is low the CLK signal is
enabled, so the data can be clocked in. When CS/LD is
pulled high, data is loaded from the shift register into the
DAC register, updating the DAC output.
VOUT: The Buffered DAC Output.
VCC: The Positive Supply Input. 4.5V ≤ VCC ≤ 5.5V
(LTC1451), 2.7 ≤ VCC ≤ 5.5V (LTC1452/LTC1453). Requires a bypass capacitor to ground.
DOUT: The Output of the Shift Register which Becomes
Valid on the Rising Edge of the Serial Clock.
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BLOCK DIAGRA
8 VCC
CLK 1
LD
DIN 2
12-BIT
SHIFT
REGISTER
+
12-BIT DAC
DAC
REGISTER
7 VOUT
–
CS/LD 3
REFERENCE
LTC1451: 2.048V
LTC1453: 1.22V
POWER-ON
RESET
6 REF
DOUT 4
5 GND
11451/2/3 BD
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TI I G DIAGRA
t1
t2
t6
CLK
t4
t7
t3
t9
DIN
B11
MSB
B0
PREVIOUS WORD
CS/LD
DOUT
B0
LSB
B1
B10
t8
B11
PREVIOUS WORD
B10
t5
B1
B0
B11
CURRENT WORD
1451/2/3 TD
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LTC1451
LTC1452/LTC1453
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DEFI ITIO S
Resolution (n): Resolution is defined as the number of
digital input bits, n. It defines the number of DAC output
states (2n) that divide the full-scale range. The resolution
does not imply linearity.
Full-Scale Voltage (VFS): This is the output of the DAC
when all bits are set to 1.
Voltage Offset Error (VOS): Normally, DAC offset is the
voltage at the output when the DAC is loaded with all zeros.
The DAC can have a true negative offset, but because the
part is operated from a single supply, the output cannot go
below zero. If the offset is negative, the output will remain
near 0V resulting in the transfer curve shown in Figure 1.
The offset of the part is measured at the code that corresponds to the maximum offset specification:
VOS = VOUT – [(Code × VFS)/(2n – 1)]
Integral Nonlinearity (INL): End-point INL is the maximum deviation from a straight line passing through the
end-points of the DAC transfer curve. Because the part
operates from a single supply and the output cannot go
below zero, the linearity is measured between full scale
and the code corresponding to the maximum offset specification. The INL error at a given input code is calculated
as follows:
INL = [VOUT – VOS – (VFS – VOS)(code/4095)]/LSB
VOUT = The output voltage of the DAC measured at
the given input code
Differential Nonlinearity (DNL): DNL is the difference
between the measured change and the ideal 1LSB change
between any two adjacent codes. The DNL error between
any two codes is calculated as follows:
DNL = (∆VOUT – LSB)/LSB
∆VOUT = The measured voltage difference between
two adjacent codes
Least Significant Bit (LSB): One LSB is the ideal voltage
difference between two successive codes.
LSB = (VFS – VOS)/(2n – 1) = (VFS – VOS)/4095
Nominal LSBs:
LTC1451
LTC1452
LTC1453
LSB = 4.095V/4095 = 1mV
LSB = V(REF)/4095
LSB = 2.5V/4095 = 0.610mV
Digital Feedthrough: The glitch that appears at the analog
output caused by AC coupling from the digital inputs when
they change state. The area of the glitch is specified in
nV × sec.
OUTPUT
VOLTAGE
NEGATIVE
OFFSET
0V
DAC CODE
1451/2/3 F01
Figure 1. Effect of Negative Offset
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LTC1451
LTC1452/LTC1453
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OPERATIO
Serial Interface
Reference
The data on the DIN input is loaded into the shift register
on the rising edge of the clock. The MSB is loaded first. The
DAC register loads the data from the shift register when
CS/LD is pulled high. The CLK is disabled internally when
CS/LD is high. Note: CLK must be low before CS/LD is
pulled low to avoid an extra internal clock pulse.
The LTC1451 includes an internal 2.048V reference, making 1LSB equal to 1mV (gain of 2). The LTC1453 has an
internal reference of 1.22V with a full scale of 2.5V (gain of
2.05). The internal reference output is turned off when the
pin is forced above the reference voltage, allowing an
external reference to be connected to the reference pin.
The LTC1452 has no internal reference and the REF pin
must be driven externally. The buffer gain is 2, so the
external reference must be less than VCC /2 and be capable
of driving the 8k minimum DAC resistor ladder.
The buffered output of the 12-bit shift register is available
on the DOUT pin which swings from GND to VCC.
Multiple LTC1451/LTC1452/LTC1453s may be daisychained together by connecting the DOUT pin to the DIN
pin of the next chip, while the CLK and CS/LD signals
remain common to all chips in the daisy chain. The serial
data is clocked to all of the chips, then the CS/LD signal is
pulled high to update all of them simultaneously.
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Voltage Output
The LTC1451 family’s rail-to-rail buffered output can
source or sink 5mA over the entire operating temperature
range while pulling to within 300mV of the positive supply
voltage or ground. The output swings to within a few
millivolts of either supply rail when unloaded and has an
equivalent output resistance of 40Ω when driving a load to
the rails. The output can drive 1000pF without going into
oscillation.
LTC1451
LTC1452/LTC1453
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TYPICAL APPLICATIO S
An Isolated 4mA to 20mA Process Controller
Has 3.3V Minimum Loop Voltage
VLOOP
3.3V TO 30V
LT ®1121-3.3
IN
90k
5k
45k
5k
OUT
1µF
CLK
FROM
OPTOISOLATED
INPUTS
VCC
DIN
VREF
LTC1453
VOUT
CS/LD
+
LT1077
3k
–
1k
Q1
2N3440
RS
10Ω
IOUT
11451/2/3 TA04
3.3V
OPTO-ISOLATORS
CLK
DIN
CS/LD
500Ω
10k
4N28
CLK
DIN
CS/LD
This circuit shows how to use an LTC1453 to make an
opto-isolated digitally controlled 4mA to 20mA process
controller. The controller circuitry, including the optoisolation, is powered by the loop voltage that can have a
wide range of 3.3V to 30V. The 1.22V reference output of
the LTC1453 is used for the 4mA offset current and VOUT
is used for the digitally controlled 0mA to 16mA current.
RS is a sense resistor and the op amp modulates the
transistor Q1 to provide the 4mA to 20mA current through
this resistor. The potentiometers allow for offset and fullscale adjustment. The control circuitry dissipates well
under the 4mA budget at zero-scale.
Note that although these DACs have internal Schmitt
triggers and are suitable for use with slow rising edges
such as produced by the above optoisolator, the use of
optoisolators in a daisy-chained topology requires the
addition of a gate or the use of a fast isolator on the clock
signal. Setup and hold times between DOUT and DIN are not
guaranteed unless a clock edge with a rise time of less than
100ns is provided.
9
LTC1451
LTC1452/LTC1453
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TYPICAL APPLICATIO S
12-Bit 3V to 5V Voltage Output DAC
LTC1451: 4.5V TO 5.5V
LTC1452: 2.7V TO 5.5V
LTC1453: 2.7V TO 5.5V
0.1µF
DIN
VCC
CLK
µP
VOUT
LTC145X
CS/LD
DOUT VREF
TO NEXT DAC FOR
DAISY-CHAINING
GND
OUTPUT
LTC1451: 0V TO 4.095V
LTC1452: 0V TO 2 • REF
LTC1453: 0V TO 2.5V
1451/2/3 TA03
LTC1451: 2.048V
LTC1452: EXTERNAL
LTC1453: 1.22V
Digitally Programmable Current Source
5V
VS + 5V TO 100V
FOR RL ≤ 50Ω
0.1µF
VCC
RL
CLK
µP
DIN
LTC1451
VOUT
+
LT1077
CS/LD
GND
D • 4.095
IOUT = IN
≈ 0mA TO 10mA
4096 • RA
Q1
2N3440
–
RA
410Ω
1451/2/3 TA05
This circuit shows a digitally programmable current source
from an external voltage source using an external op amp,
an LT1077 and an NPN transistor (2N3440). Any digital
word from 0 to 4095 is loaded into the LTC1451 and its
output correspondingly swings from 0V to 4.095V. In the
configuration shown, this voltage will be forced across the
10
resistor RA. If RA is chosen to be 410Ω the output current
will range from 0mA at zero-scale to 10mA at full-scale.
The minimum voltage for VS is determined by the load
resistor RL and Q1's VCESAT voltage. With a load resistor
of 50Ω, the voltage source can be as low as 5V.
LTC1451
LTC1452/LTC1453
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PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.400*
(10.160)
MAX
8
7
6
5
1
2
3
4
0.255 ± 0.015*
(6.477 ± 0.381)
0.300 – 0.325
(7.620 – 8.255)
0.065
(1.651)
TYP
0.009 – 0.015
(0.229 – 0.381)
(
+0.035
0.325 –0.015
8.255
+0.889
–0.381
0.130 ± 0.005
(3.302 ± 0.127)
0.045 – 0.065
(1.143 – 1.651)
)
0.125
(3.175) 0.020
MIN
(0.508)
MIN
0.018 ± 0.003
(0.457 ± 0.076)
0.100
(2.54)
BSC
N8 1098
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
8
7
6
5
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
1
0.010 – 0.020
× 45°
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
0.053 – 0.069
(1.346 – 1.752)
0°– 8° TYP
0.016 – 0.050
(0.406 – 1.270)
0.014 – 0.019
(0.355 – 0.483)
TYP
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
2
3
4
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
BSC
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
SO8 1298
11
LTC1451
LTC1452/LTC1453
U
TYPICAL APPLICATION
This circuit shows how to make a bipolar output 12-bit
DAC with a wide output swing using an LTC1451 and an
LT1077. R1 and R2 resistively divide down the LTC1451
output and an offset is summed in using the LTC1451
onboard 2.048V reference and R3 and R4. R5 ensures that
the onboard reference is always sourcing current and
never has to sink any current even when VOUT is at fullscale. The LT1077 output will have a wide bipolar output
swing of – 4.096V to 4.094V as shown in the figure above.
With this output swing 1LSB = 2mV.
A Wide Swing, Bipolar Output 12-Bit DAC
5V
0.1µF
VCC
CLK
µP
VOUT
LTC1451
DIN
CS/LD
GND
R1
5k
VREF
5V
+
R2
10k
4.094
VOUT
2048
4095
R3
10k
DIN
LT1077
VOUT:
2 • DIN • 4.095
– 4.096V
4096
–
– 5V
R4
20k
1451/2/3 TA06
– 4.096
R5
20k
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1257
5V to 15V Single Supply, Complete 12-Bit VOUT
DAC in SO-8 Package
Reference Can Be Overdriven Up to 12V, i.e., FS MAX = 12V
LTC1446/LTC1446L
Dual 12-Bit VOUT DACs in SO-8
5V with 4.096V Full-Scale Output/3V with 2.5V Full Scale
LTC1448
Dual 12-Bit VOUT DAC in SO-8
VCC from 2.7V to 5.5V, Output Swings to VREF
LTC1655/LTC1655L
5V/3V 16-Bit VOUT DAC in SO-8
Pin Conpatible with LTC1451/LTC1453
LTC1659
Single 12-Bit VOUT DAC in MSOP
VCC from 2.7V to 5.5V, Output Swings to VREF
LTC7541
12-Bit Multiplying Parallel IOUT DAC
5V to 16V Supply, 12-Bit Wide Interface
LTC7543/LTC8143
12-Bit Multiplying Serial IOUT DAC
5V Supply, Clear Pin and Serial Data Output (LTC8143)
LTC8043
12-Bit Multiplying Serial IOUT DAC
5V Supply, SO-8 Package
12
Linear Technology Corporation
145123fa LT/TP 0100 2K REV A • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7487
(408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977
 LINEAR TECHNOLOGY CORPORATION 1995