MPQ8612 High Efficiency, 12A/16A/20A, 6V Synchronous Step-down Converter The Future of Analog IC Technology DESCRIPTION FEATURES The MPQ8612 is fully integrated high frequency synchronous rectified step-down switch mode converter. It offers very compact solutions to achieve 12A/16A/20A output current from a 3V to 6V input with excellent load and line regulation. • • • • Constant-On-Time (COT) control mode provides fast transient response and eases loop stabilization. The MPQ8612 can operate with a low-cost electrolytic capacitor and can support ceramic output capacitor with external slope compensation. • • • • • Operating frequency is programmed by an external resistor and is compensated for variations in VIN. • Under voltage lockout is internally set at 2.8 V, but can be increased by programming the threshold with a resistor network on the enable pin. The output voltage startup ramp is controlled by the soft start pin. A power good signal indicates the output is within its nominal voltage range. • • Wide 3V to 6V Operating Input Range 12A/16A/20A Output Current Low RDS(ON) Internal Power MOSFETs Proprietary Switching Loss Reduction Technique Adaptive COT for Ultrafast Transient Response 1% Reference Voltage Over -20°C to +85°C Junction Temperature Range Programmable Soft Start Time Pre-Bias Start up Programmable Switching Frequency from 300kHz to 1MHz. Minimum On Time TON_MIN=60ns Minimum Off Time TOFF_MIN=75ns Non-latch OCP, non-latch OVP Protection and Thermal Shutdown Output Adjustable from 0.608V to 4.5V APPLICATIONS • • • • • • Full fault protection including OCP, SCP, OVP UVP and OTP is provided by internal comparators. The MPQ8612 requires a minimum number of readily available standard external components and are available in QFN3X4/4X4/4X4 packages. Telecom System Base Stations Networking Systems Server Personal Video Recorders Flat Panel Television and Monitors Distributed Power Systems All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Products, Quality Assurance page. “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION VIN BST IN C3 RFREQ C1 EN ON/OFF VCC VOUT R4 C4 R1 MPQ8612 C2 FB VCC C5 L1 SW FREQ SS R3 R2 C6 PG PGND AGND MPQ8612 Rev. 1.11 www.MonolithicPower.com 10/22/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 1 MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER ORDERING INFORMATION Part Number* Package MPQ8612GL-12 QFN (3x4mm) MPQ8612GR-16 QFN (4x4mm) MPQ8612GR-20 QFN (4x4mm) Top Marking MP8612 12 MP8612 16 MP8612 20 * For Tape & Reel, add suffix –Z (e.g. MPQ8612GL–Z); PACKAGE REFERENCE TOP VIEW AGND 1 FB 2 4 VCC 5 PG 6 IN 11 10 13 14 SW 3 IN 12 SW SS EN FREQ 7 8 9 BST GND GND EXPOSED PAD ON BACKSIDE Part Number*** Package MPQ8612GL-12 QFN14 (3x4mm) ***For Tape & Reel, add suffix –Z (eg. MPQ8612GL–12–Z) TOP VIEW EN 4 VCC 5 PG 6 IN IN 13 12 11 14 13 12 11 15 16 17 7 8 9 10 BST GND GND GND EXPOSED PAD ON BACKSIDE AGND 1 FB 2 SS 3 EN 4 VCC 5 PG 6 15 17 16 SW 3 IN 14 SW SS FREQ SW 2 IN SW FB IN SW 1 IN SW AGND TOP VIEW FREQ 7 8 9 10 BST GND GND GND EXPOSED PAD ON BACKSIDE Part Number**** Package Part Number***** Package MPQ8612GR-16 QFN17 (4x4mm) MPQ8612GR-20 QFN17 (4x4mm) ****For Tape & Reel, add suffix –Z (eg. MPQ8612GR-16–Z) *****For Tape & Reel, add suffix –Z (eg. MPQ8612GR-20–Z) MPQ8612 Rev. 1.11 www.MonolithicPower.com 10/22/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 2 MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER ABSOLUTE MAXIMUM RATINGS (1) Supply Voltage VIN ...................................... 6.5V VSW ........................................-0.3V to VIN + 0.3V VSW (30ns)...................................-3V to VIN + 3V VIN -VSW .................................-0.3V to VIN + 0.3V VIN -VSW (30ns) ............................-3V to VIN + 3V VBST ...................................................... VSW + 6V All Other Pins ..................................-0.3V to +6V (2) Continuous Power Dissipation (TA=+25°) …… QFN(3x4mm)…………………...……………2.6W QFN(4x4mm)…………………...……………2.8W Junction Temperature ...............................150°C Lead Temperature ....................................260°C Storage Temperature............... -65°C to +150°C Recommended Operating Conditions Thermal Resistance (4) θJA θJC QFN (3x4mm) ......................... 48 ...... 10... °C/W QFN (4x4mm) ......................... 44 ....... 9.... °C/W Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD(MAX)=(TJ(MAX)TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB. (3) Supply Voltage VIN ................................3V to 6V Output Voltage VOUT ....................0.608V to 4.5V Operating Junction Temp. (TJ). -40°C to +125°C MPQ8612 Rev. 1.11 www.MonolithicPower.com 10/22/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 3 MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER ELECTRICAL CHARACTERISTICS VIN = 5V, TJ = -40 to +125°C, unless otherwise noted. Parameters Supply Current Supply Current (Shutdown) Supply Current (Quiescent) Symbol IIN IIN Condition Typ Max Units 0.001 2 μA 850 1100 1300 μA 600 1000 1300 μA MPQ8612-12, TJ =25°C 10 18 MPQ8612-16, TJ =25°C 7.4 13 MPQ8612-20, TJ =25°C 6.6 12 MPQ8612-12, TJ =25°C 7.8 10 MPQ8612-16, TJ =25°C 5.5 11 MPQ8612-20, TJ =25°C 4.6 9.5 0.001 5 VEN = 0V VEN = 2V, VFB = 1V, MPQ8612-12 VEN = 2V, VFB = 1V, MPQ8612-16, MPQ8612-20 Min MOSFET High-side Switch On Resistance Low-side Switch On Resistance Switch Leakage HSRDS-ON LSRDS-ON SWLKG VEN = 0V, VSW = 0V or 5V, TJ =25°C mΩ mΩ μA Current Limit High-side Current Limit ILIMIT MPQ8612-12 17 21 26 MPQ8612-16 23 28 33 MPQ8612-20 29 35 41 A Timer One-Shot On Time Minimum Off Time tON tOFF Fold back Timer(5) tFOLDBACK Over-voltage and Under-voltage Protection OVP Threshold VOVP1 OVP Delay(5) tOVP (5) UVP Threshold VUVP RFREQ=82kΩ,VOUT=1.2V, MPQ8612-12 RFREQ=82kΩ,VOUT=1.2V, MPQ8612-16, MPQ8612-20 MPQ8612-12 MPQ8612-16, MPQ8612-20 OCP Happens 170 ns 200 ns 30 75 150 ns 30 110 160 ns 2.5 110 120 1 50 MPQ8612 Rev. 1.11 www.MonolithicPower.com 10/22/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. μs 130 %VREF μs %VREF 4 MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER ELECTRICAL CHARACTERISTICS (continued) VIN = 5V, TJ = -40 to +125°C, unless otherwise noted. Parameters Symbol Condition Min Typ Max Units TJ = -20°C to +85°C, MPQ8612-12 602 608 614 TJ = -20°C to +85°C, MPQ8612-16, MPQ8612-20 604 610 616 TJ = -40°C to +125°C, MPQ8612-12 599 608 617 601 610 619 5.5 0.001 7.5 50 9 nA μA 1.8 V mV Reference And Soft Start Reference Voltage Feedback Current Soft Start Charging Current Enable And UVLO Enable Rising Threshold Enable Hysteresis Enable Input Current VCC UVLO VCC Under Voltage Lockout Threshold Rising VCC Under Voltage Lockout Threshold Hysteresis Power Good Power Good Rising Threshold Power Good Falling Threshold Power Good Deglitch Timer Power Good Sink Current Capability Power Good Leakage Current Thermal Protection Thermal Shutdown Thermal Shutdown Hysteresis VREF IFB ISS TJ = -40°C to +125°C, MPQ8612-16, MPQ8612-20 VFB = 608mV VSS=0V ENVth-Hi ENVth-Hy IEN mV 1.4 VEN = 2V VEN = 0V VCCVth 1 890 1.5 0.001 2 2.3 2.8 2.95 300 VCCHYS PGVth-Hi PGVth-Lo PGTd TSS=1ms, VPG IPG_LEAK TSD 84 63 V mV 96 73 2.2 %VREF %VREF ms Sink 4mA 0.4 V VPG = 3.3V 50 nA Note 5 150 90 70 1.6 μA 160 25 °C °C Note: 5) Guaranteed by design. MPQ8612 Rev. 1.11 www.MonolithicPower.com 10/22/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 5 MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER TYPICAL CHARACTERISTICS Performance waveforms are tested on the evaluation board of the Design Example section. VIN=5V, VOUT=1.2V, L=1.0µH, TA=+25°C, unless otherwise noted. 0.8 1150 18 16 0.7 14 0.6 12 1100 0.5 10 0.4 8 0.3 6 1050 0.2 4 0.1 2 0 -50 -25 0 25 50 75 100 125 150 1000 -50 -25 8 21.50 7 21.40 0 25 50 75 100 125 150 21.20 28 21.10 27.8 4 21.00 3 20.90 27.2 20.60 0 50 100 150 20.50 -50 -25 27 0 -40 25 50 75 100 125 150 35..8 162 1470 35.6 160 1469 35 34.8 1465 152 1464 34.4 146 -50 -25 0 -40 0 25 85 125 125 1463 150 148 85 1466 154 34.6 25 1467 156 35.2 0 1468 158 35.4 150 27.4 20.70 0 -50 100 27.6 20.80 1 50 28.2 5 2 0 28.4 21.30 6 0 -50 1462 25 50 75 100 125 150 1461 1460 -50 -25 0 25 50 75 100 125 150 MPQ8612 Rev. 1.11 www.MonolithicPower.com 10/22/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 6 MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER TYPICAL CHARACTERISTICS (continued) Performance waveforms are tested on the evaluation board of the Design Example section. VIN=5V, VOUT=1.2V, L=1.0µH, TA=+25°C, unless otherwise noted. Reference Voltage vs. Temperature OVP Threshold vs. Temperature 615 614 613 2.90 122.0 2.85 610 2.70 MPQ8612-20 120.5 608 0 50 2.65 120.0 MPQ8612-12 100 150 EN Threshold vs. Temperature 25 50 75 100 125 150 2.55 -50 -25 0 25 50 75 100 125 150 Soft-Start/Shutdown Current vs. Temperature 7.40 1.60 7.35 EN Rising Threshold VCC Falling Threshold 2.60 119.5 -50 -25 0 1.80 7.30 7.25 1.20 7.20 1.00 7.15 0.80 0.60 VCC Rising Threshold 121.0 MPQ8612-16 609 1.40 2.80 2.75 611 606 -50 122.5 121.5 612 607 VCC UVLO Threshold vs. Temperature 7.10 EN Falling Threshold 7.05 0.40 7.00 0.20 6.95 0.00 -50 -25 0 25 50 75 100 125 150 6.90 -50 0 50 100 150 MPQ8612 Rev. 1.11 www.MonolithicPower.com 10/22/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 7 MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS (continued) Performance waveforms are tested on the evaluation board of the Design Example section. MPQ8612-12, VIN=5V, VOUT=1.2V, L=1.0µH, TA=+25°C, unless otherwise noted. 100 100 100 95 VIN=3.3V VIN=3.3V 95 90 85 85 80 VIN=4.2V 75 70 VIN=4.2V 80 75 VIN=5V 65 75 VIN=5V 50 0.01 0.1 1 10 100 60 0.01 0.1 1 10 100 65 0.01 80 70 65 1 10 100 75 0.01 OUTPUT CURRENT (A) 100 VIN=3.3V 95 90 VIN=4.2V 70 65 65 VIN=6V 0.1 1 10 OUTPUT CURRENT (A) 100 10 100 100 75 VIN=5V 1 OUTPUT CURRENT (A) VIN=3.3V 95 60 0.01 VIN=3.3V 90 85 80 75 55 0.01 100 85 80 60 10 90 85 70 1 55 VIN=6V 50 0.01 0.1 OUTPUT CURRENT (A) 100 95 0.1 VIN=5V 60 VIN=6V VIN=6V VIN=4.2V 75 VIN=5V 85 80 0.1 100 85 VIN=4.2V 75 70 10 90 90 VIN=5V 1 100 95 VIN=3.3V 95 VIN=4.2V 0.1 OUTPUT CURRENT (A) 100 90 85 VIN=6V 60 0.01 OUTPUT CURRENT (A) VIN=3.3V 80 65 VIN=6V OUTPUT CURRENT (A) 100 VIN=5V 70 65 VIN=6V 55 VIN=4.2V 80 70 60 VIN=3.3V 90 90 85 95 95 VIN=4.2V VIN=5V 75 70 VIN=6V 0.1 1 10 OUTPUT CURRENT (A) VIN=4.2V 80 100 65 0.01 VIN=5V VIN=6V 0.1 1 10 100 OUTPUT CURRENT (A) MPQ8612 Rev. 1.11 www.MonolithicPower.com 10/22/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 8 MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS (continued) Performance waveforms are tested on the evaluation board of the Design Example section. MPQ8612-12, VIN=5V, VOUT=1.2V, L=1.0µH, TA=+25°C, unless otherwise noted. 100 1.00 0.6 0.4 95 0.50 0.2 90 0.00 0 85 -0.2 -0.50 80 75 0.01 -0.4 0.1 1 10 100 -1.00 3 1200 650 1000 630 4 5 6 2 4 6 8 10 12 2 4 6 8 10 12 700 600 500 800 610 400 590 300 600 400 200 570 200 0 200 -0.6 0 400 600 800 1000 1200 550 3 100 3.5 4 4.5 5 5.5 6 0 0 MPQ8612 Rev. 1.11 www.MonolithicPower.com 10/22/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 9 MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS (continued) Performance waveforms are tested on the evaluation board of the Design Example section. MPQ8612GL-12, VIN=5V, VOUT=1.2V, L=1.0µH, TA=+25°C, unless otherwise noted. Dead Time (on) Dead Time Off Input/Output Voltage Rippl IOUT =12A IOUT =12A IOUT = 0A VOUT AC Coupled 20mV/div. VIN AC Coupled 10mV/div. VSW 1V/div. VSW 200mV/div. VSW 5V/div. IL 2.5A/div. Input/Output Voltage Ripple Input/Output Voltage Ripple IOUT = 0.4A IOUT = 12A Power Good Through Vin Start-Up IOUT = 12A VOUT AC Coupled 10mV/div. VIN AC Coupled 10mV/div. VOUT AC Coupled 10mV/div. VSW 5V/div. VSW 5V/div. VOUT 1V/div. VIN AC Coupled 100mV/div. IL 1A/div. VIN 2V/div. VPG 1V/div. IL 10A/div. Power Good Through Vin Shutdown Power Good Through EN Start-Up Power Good Through EN Shutdown IOUT = 12A IOUT = 12A IOUT = 12A VOUT 1V/div. VOUT 1V/div. VIN 2V/div. VEN 5V/div. VEN 5V/div. VPG 2V/div. VPG 5V/div. VPG 5V/div. VOUT 1V/div. MPQ8612 Rev. 1.11 www.MonolithicPower.com 10/22/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 10 MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS (continued) Performance waveforms are tested on the evaluation board of the Design Example section. MPQ8612GL-12, VIN=5V, VOUT=1.2V, L=1.0µH, TA=+25°C, unless otherwise noted. Start-Up Through Vin Start-Up Through Vin Shutdown Through Vin IOUT = 0A IOUT = 12A IOUT = 0A VOUT 1V/div. VOUT 1V/div. VOUT 1V/div. VIN 5V/div. VSW 5V/div. VIN 5V/div. VSW 5V/div. VIN 5V/div. IL 1A/div. IL 10A/div. VSW 2V/div. IL 1A/div. Shutdown Through Vin Start-Up Through EN Start-Up Through EN IOUT = 12A IOUT = 0A IOUT = 12A VOUT 1V/div. VOUT 1V/div. VOUT 1V/div. VIN 5V/div. VSW 5V/div. VEN 5V/div. VIN 5V/div. VSW 5V/div. IL 2.5A/div. VSW 5V/div. IL 10A/div. IL 10A/div. Shutdown Through EN Shutdown Through EN IOUT = 0A IOUT = 12A VOUT 1V/div. VOUT 1V/div. VEN 5V/div. VEN 5V/div. VSW 5V/div. VSW 5V/div. IL 1A/div. IL 10A/div. VOUT AC Coupled 200mV/div. IL 5A/div. MPQ8612 Rev. 1.11 www.MonolithicPower.com 10/22/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 11 MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS (continued) Performance waveforms are tested on the evaluation board of the Design Example section. MPQ8612GL-12, VIN=5V, VOUT=1.2V, L=1.0µH, TA=+25°C, unless otherwise noted. Short Circuit Protection VOUT 1V/div. VSW 5V/div. IL 10A/div. Thermal Shutdown Thermal Recovery IOUT = 12A IOUT = 12A VOUT 1V/div. VOUT 1V/div. VSW 5V/div. VSW 5V/div. IL 10A/div. IL 10A/div. MPQ8612 Rev. 1.11 www.MonolithicPower.com 10/22/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 12 MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER PIN FUNCTIONS MPQ8612GL-12 PIN # Name Description 1 AGND 2 FB 3 SS 4 EN 5 VCC 6 PG 7 BST 8-9 GND 10-11 IN 12 FREQ 13-14 SW Analog ground. Feedback. An external resistor divider from the output to GND, tapped to the FB pin, sets the output voltage. It is recommended to place the resistor divider as close to FB pin as possible. Vias should be avoided on the FB traces. Soft Start. Connect on external capacitor to program the soft start time for the switch mode regulator. Enable pin. Pull this pin higher than 1.25V to enable the chip. For automatic start-up, connect EN pin to VIN with 100KΩ resistor. Can be used to set the on/off threshold (adjust UVLO) with two additional resistors. Supply Voltage for driver and control circuits. Decouple with a minimum 4.7µF ceramic capacitor as close to the pin as possible. X7R or X5R grade dielectric ceramic capacitors are recommended for their stable temperature characteristics. Power good output, and it is high if the output voltage is higher than 90% of the nominal voltage. There is a delay from FB ≥ 90% to PGOOD goes high. Bootstrap. A capacitor connected between SW and BS pins is required to form a floating supply across the high-side switch driver. System Ground. This pin is the reference ground of the regulated output voltage. For this reason care must be taken in PCB layout. Supply Voltage. The IN pin supplies power for internal MOSFET and regulator. The MPQ8612 operate from a +3V to +6V input rail. An input capacitor is needed to decouple the input rail. Use wide PCB traces and multiple vias to make the connection. Frequency set during CCM operation. A resistor connected between FREQ and IN is required to set the switching frequency. The ON time is determined by the input voltage and the resistor connected to the FREQ pin. IN connect through a resistor is used for line feed-forward and makes the frequency basically constant during input voltage’s variation. An optional 1nF decoupling capacitor can be added to improve any switching frequency jitter that may be present. Switch Output. Connect this pin to the inductor and bootstrap capacitor. This pin is driven up to the VIN voltage by the high-side switch during the on-time of the PWM duty cycle. The inductor current drives the SW pin negative during the off-time. The on-resistance of the low-side switch and the internal Schottky diode fixes the negative voltage. Use wide PCB traces to make the connection. MPQ8612 Rev. 1.11 www.MonolithicPower.com 10/22/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 13 MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER PIN FUNCTIONS (continued) MPQ8612GR-16, MPQ8612GR-20 PIN # 1 Name AGND 2 FB 3 SS 4 EN 5 VCC 6 PG 7 BST 8-10 GND 11-13 IN 14 FREQ 15-17 SW Description Analog ground. Feedback. An external resistor divider from the output to GND, tapped to the FB pin, sets the output voltage. It is recommended to place the resistor divider as close to FB pin as possible. Vias should be avoided on the FB traces. Soft Start. Connect on external capacitor to program the soft start time for the switch mode regulator. Enable pin. Pull this pin higher than 1.25V to enable the chip. For automatic start-up, connect EN pin to VIN with 100KΩ resistor. Can be used to set the on/off threshold (adjust UVLO) with two additional resistors. Supply Voltage for driver and control circuits. Decouple with a minimum 4.7µF ceramic capacitor as close to the pin as possible. X7R or X5R grade dielectric ceramic capacitors are recommended for their stable temperature characteristics. Power good output, and it is high if the output voltage is higher than 90% of the nominal voltage. There is a delay from FB ≥ 90% to PGOOD goes high. Bootstrap. A capacitor connected between SW and BS pins is required to form a floating supply across the high-side switch driver. System Ground. This pin is the reference ground of the regulated output voltage. For this reason care must be taken in PCB layout. Supply Voltage. The IN pin supplies power for internal MOSFET and regulator. The MPQ8612 operate from a +3V to +6V input rail. An input capacitor is needed to decouple the input rail. Use wide PCB traces and multiple vias to make the connection. Frequency set during CCM operation. A resistor connected between FREQ and IN is required to set the switching frequency. The ON time is determined by the input voltage and the resistor connected to the FREQ pin. IN connect through a resistor is used for line feed-forward and makes the frequency basically constant during input voltage’s variation. An optional 1nF decoupling capacitor can be added to improve any switching frequency jitter that may be present. Switch Output. Connect this pin to the inductor and bootstrap capacitor. This pin is driven up to the VIN voltage by the high-side switch during the on-time of the PWM duty cycle. The inductor current drives the SW pin negative during the off-time. The on-resistance of the low-side switch and the internal Schottky diode fixes the negative voltage. Use wide PCB traces to make the connection. MPQ8612 Rev. 1.11 www.MonolithicPower.com 10/22/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 14 MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER BLOCK DIAGRAM IN FREQ Current Sense Amplifer RSEN Over-Current OC Timer VCC ILIM EN REFERENCE 1MEG HS Limit Comparator Refresh Timer OFF Timer xS Q 0.3V 0.75V 0.608V BST BSTREG HS Driver PWM HS-FET xR LOGIC SS SOFT START/STOP START FB Loop Comparator SW VCC ON Timer LS Driver LS-FET Current Modulator PG UV PGOOD Comparator UV Detect Comparator GND AGND OV OV Detect Comparator Figure 1—Functional Block Diagram MPQ8612 Rev. 1.11 www.MonolithicPower.com 10/22/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 15 MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER OPERATION PWM Operation The MPQ8612 is fully integrated synchronous rectified step-down switch mode converter. Constant-on-time (COT) control is employed to provide fast transient response and easy loop stabilization. At the beginning of each cycle, the high-side MOSFET (HS-FET) is turned ON when the feedback voltage (VFB) is below the reference voltage (VREF), which indicates insufficient output voltage. The ON period is determined by the input voltage and the frequency-set resistor as follows: t ON (ns) = 4.8 × R FREQ (kΩ ) VIN ( V ) − 0.49 (1) After the ON period elapses, the HS-FET is turned off, or becomes OFF state. It is turned ON again when VFB drops below VREF. By repeating operation this way, the converter regulates the output voltage. The integrated low-side MOSFET (LS-FET) is turned on when the HS-FET is in its OFF state to minimize the conduction loss. There will be a dead short between input and GND if both HS-FET and LS-FET are turned on at the same time. It’s called shoot-through. In order to avoid shoot-through, a dead-time (DT) is internally generated between HS-FET off and LSFET on, or LS-FET off and HS-FET on. Heavy-Load Operation below VREF, HS-MOSFET is turned on for a fixed interval which is determined by one- shot ontimer as equation 1 shown. When the HSMOSFET is turned off, the LS-MOSFET is turned on until next period. In CCM mode operation, the switching frequency is fairly constant and it is called PWM mode. Light-Load Operation With the load decreasing, the inductor current decreases too. When the inductor current touches zero, the operation is transited from continuous-conduction-mode (CCM) to discontinuous-conduction-mode (DCM). The light load operation is shown in Figure 3. When VFB is below VREF, HS-MOSFET is turned on for a fixed interval which is determined by one- shot on-timer as equation 1 shown. When the HS-MOSFET is turned off, the LS-MOSFET is turned on until the inductor current reaches zero. In DCM operation, the VFB does not reach VREF when the inductor current is approaching zero. The driver of LS-FET turns into tri-state (high Z) whenever the inductor current reaches zero. A current modulator takes over the control of LS-FET and limits the inductor current to less than -1mA. Hence, the output capacitors discharge slowly to GND through LS-FET. As a result, the efficiency at light load condition is greatly improved. At light load condition, the HSFET is not turned ON as frequently as at heavy load condition. This is called skip mode. At light load or no load condition, the output drops very slowly and the MPQ8612 reduce the switching frequency naturally and then high efficiency is achieved at light load. TON is constont VIN Figure 2—Heavy Load Operation When the output current is high and the inductor current is always above zero amps, it is called continuous-conduction-mode (CCM). The CCM mode operation is shown in Figure2. When VFB is Current Modulator regulates around -1mA VSW VOUT IL IOUT VFB VREF Figure 3—Light Load Operation MPQ8612 Rev. 1.11 www.MonolithicPower.com 10/22/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 16 MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER As the output current increases from the light load condition, the time period within which the current modulator regulates becomes shorter. The HS-FET is turned ON more frequently. Hence, the switching frequency increases correspondingly. The output current reaches the critical level when the current modulator time is zero. The critical level of the output current is determined as follows: IOUT = (VIN − VOUT ) × VOUT 2 × L × fSW × VIN (2) It turns into PWM mode once the output current exceeds the critical level. After that, the switching frequency stays fairly constant over the output current range. Switching Frequency The selection of switching frequency is a tradeoff between efficiency and component size. Low frequency operation increases efficiency by reducing MOSFET switching losses, but requires larger inductance and capacitance to maintain low output voltage ripple. For MPQ8612 ， the on time can be set using FREQ pin, then the frequency is set in steady state operation at CCM mode. Adaptive constant-on-time (COT) control is used in MPQ8612 and there is no dedicated oscillator in the IC. Connect FREQ pin to IN pin through resistor RFREQ and the input voltage is feedforwarded to the one-shot on-time timer through the resistor RFREQ. When in steady state operation at CCM, the duty ratio is kept as VOUT/VIN. Hence the switching frequency is fairly constant over the input voltage range. The switching frequency can be set as follows: fSW (kHz) = 106 4.8 × RFREQ (kΩ) VIN (V) × + tDELAY (ns) VIN (V) − 0.49 VOUT (V) (3) Where TDELAY is the comparator delay. It’s about 40ns. Generally, the MPQ8612 is set for 300kHz to 1MHz application. It is optimized to operate at high switching frequency with high efficiency. High switching frequency makes it possible to utilize small sized LC filter components to save system PCB space. Jitter and FB Ramp Slope Figure 4 and Figure 5 show jitter occurring in both PWM mode and skip mode. When there is noise in the VFB downward slope, the ON time of HS-FET deviates from its intended location and produces jitter. It is necessary to understand that there is a relationship between a system’s stability and the steepness of the VFB ripple’s downward slope. The slope steepness of the VFB ripple dominates in noise immunity. The magnitude of the VFB ripple doesn’t affect the noise immunity directly. Figure 4—Jitter in PWM Mode VSLOPE2 VFB VNOISE VREF HS Driver Jitter Figure 5—Jitter in Skip Mode Ramp with Large ESR Capacitor In the case of POSCAP or other types of capacitor with lager ESR is applied as output capacitor, the ESR ripple dominates the output ripple, and the slope on the FB is quite ESR related. Figure 6 shows an equivalent circuit in PWM mode with the HS-FET off and without an external ramp circuit. Turn to application information section for design steps with large ESR capacitors. MPQ8612 Rev. 1.11 www.MonolithicPower.com 10/22/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 17 MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER SW L Where: Vo FB ESR R1 And the ramp on the VFB can then be estimated as: POSCAP R2 VRAMP = Figure 6—Simplified Circuit in PWM Mode without External Ramp Compensation To realize the stability when no external ramp is applied, usually the ESR value should be chosen as follow: RESR t SW t + ON × π 0.7 2 ≥ COUT (4) TSW is the switching period. Ramp with Small ESR Capacitor When the output capacitors are ceramic ones, the ESR ripple is not high enough to stabilize the system, and external ramp compensation is needed. Skip to application information section for design steps with small ESR caps. L SW R4 Vo C4 IR4 IC4 R9 ⎛ R1 // R2 ⎞ VIN − VO × t ON × ⎜ ⎟ R 4 × C4 ⎝ R1 // R2 + R9 ⎠ (7) The downward slope of the VFB ripple then follows: VSLOPE1 = − VOUT VRAMP = t off R 4 × C4 (8) As can be seen from equation 8, if there is instability in PWM mode, we can reduce either R4 or C4. If C4 can not be reduced further due to limitation from equation 5, then we can only reduce R4. For a stable PWM operation, the Vslope1 should be design follow equation 9. − VSLOPE1 t SW t + ON − RESR × COUT 0.7 × IO × 10−3 × π 0.7 2 ≥ × VOUT + 2 × L × COUT t sw − t on (9) Where Io is the load current. In skip mode, the downward slope of the VFB ripple is almost same whether the external ramp is used or not. Fig.8 shows the simplified circuit of the skip mode when both the HS-FET and LSFET are off. R1 Vo I FB Ceramic FB (6) IR4 = IC4 + IFB ≈ IC4 FB R2 R1 Cout Ro R2 Figure 7—Simplified Circuit in PWM Mode with External Ramp Compensation In PWM mode, an equivalent circuit with HS-FET off and the use of an external ramp compensation circuit (R4, C4) is simplified in Figure 7. The external ramp is derived from the inductor ripple current. If one chooses C4, R9, R1 and R2 to meet the following condition: ⎞ 1 1 ⎛ R1 × R 2 < ×⎜ + R9 ⎟ 2π × fSW × C4 20 ⎝ R1 + R 2 ⎠ (5) Figure 8—Simplified Circuit in skip Mode The downward slope of the VFB ripple in skip mode can be determined as follows: VSLOPE2 = − VREF [(R1 + R2 ) // RO ] × COUT (10) Where Ro is the equivalent load resistor. As described in Fig.5, VSLOPE2 in the skip mode is lower than that is in the PWM mode, so it is reasonable that the jitter in the skip mode is MPQ8612 Rev. 1.11 www.MonolithicPower.com 10/22/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 18 MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER larger. If one wants a system with less jitter during ultra light load condition, the values of the VFB resistors should not be too big, however, that will decrease the light load efficiency. Soft Start/Stop The MPQ8612 employs soft start/stop (SS) mechanism to ensure smooth output during power up and power down. When the EN pin becomes high, an internal current source (8μA) charges up the SS capacitor C6. The SS capacitor voltage takes over the REF voltage to the PWM comparator. The output voltage smoothly ramps up with the SS voltage. Once the SS voltage reaches the same level as the REF voltage, it keeps ramping up while VREF takes over the PWM comparator. At this point, the soft start finishes and it enters into steady state operation. When the EN pin is pulled to low, the SS CAP voltage is discharged through an 8uA internal current source. Once the SS voltage reaches REF voltage, it takes over the PWM comparator. The output voltage will decrease smoothly with SS voltage until zero level. The SS capacitor value can be determined as follows: CSS (nF) = t SS (ms) × ISS (μA) VREF (11) If the output capacitors have large capacitance value, it’s not recommended to set the SS time too small. Otherwise, it’s easy to hit the current limit during SS. A minimum value of 4.7nF should be used if the output capacitance value is larger than 330μF. Pre-Bias Startup If the output is pre-biased to a certain voltage during startup, the MPQ8612 will disable the switching of both high-side and low-side switches until the voltage on the internal soft-start capacitor exceeds the sensed output voltage at the FB pin. Power Good (PG) The MPQ8612 has power-good (PG) output. It can be connected to VCC or other voltage source through a resistor (e.g. 100k). When the MPQ8612 is powered on and FB voltage reaches above 90% of REF voltage, the PG pin is pulled high. When the FB voltage drops to 70% of REF voltage or the part is not powered on, the PG pin will be pulled low. Over-Current Protection (OCP) The MPQ8612 enters over-current protection mode when the inductor current hits the current limit, and tries to recover from over-current fault with hiccup mode. That means in over-current protection, the chip will disable output power stage, discharge soft-start capacitor and then automatically try to soft-start again. If the overcurrent condition still holds after soft-start ends, the chip repeats this operation cycle till overcurrent disappears and output rises back to regulation level. The MPQ8612 also operates in hiccup mode when short circuit happens. Over/Under –Voltage Protection (OVP/UVP) The MPQ8612 has non-latching over voltage protection. It monitors the output voltage through a resistor divider feedback (FB) voltage to detect over-voltage on the output. When the FB voltage is higher than 120% of the REF voltage (0.608V), the LS-FET will be turned on while the HS-FET will be off. The LS-FET keeps on until it hits the negative current limit and turns off for 100ns. If over voltage condition still holds, the chip repeats this operation cycle till the FB voltage drops below 110% of the REF voltage. When the FB voltage is below 50% of the REF voltage (0.608V), it is recognized as undervoltage (UV). Usually, UVP accompanies a hit in current limit and results in OCP. Configuring the EN Control The EN pin provides electrical on/off control of the device. Set EN high to turn on the regulator and low to turn it off. Do not float this pin. For automatic start-up, the EN pin can be pulled up to input voltage through a resistive voltage divider. Choose the values of the pull-up resistor (RUP from VIN pin to EN pin) and the pull-down resistor (RDOWN from EN pin to GND) to determine the automatic start-up voltage: VIN−START = 1.4 × RUP + RDOWN RDOWN MPQ8612 Rev. 1.11 www.MonolithicPower.com 10/22/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. (12) 19 MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER For example, for RUP =100kΩ and RDOWN =51kΩ, the VIN−START is set at 4.15V. falling threshold protection. To avoid noise, a 10nF ceramic capacitor from EN to GND is recommended. The MPQ8612 is disabled when the VCC voltage falls below its UVLO falling threshold (2.45V). If an application requires a higher under-voltage lockout (UVLO), use the EN pin as shown in Figure 9 to adjust the input voltage UVLO by using two external resistors. It is recommended to use the enable resistors to set the UVLO falling threshold (VSTOP) above 2.8 V. The rising threshold (VSTART) should be set to provide enough hysteresis to allow for any input supply variations. There is an internal zener diode on the EN pin, which clamps the EN pin voltage to prevent it from running away. The maximum pull up current assuming a worst case 6V internal zener clamp should be less than 1mA. Therefore, when EN is driven by an external logic signal, the EN voltage should be lower than 6V; when EN is connected with VIN through a pull-up resistor or a resistive voltage divider, the resistance selection should ensure the maximum pull up current less than 1mA. If using a resistive voltage divider and VIN higher than 6V, the allowed minimum pull-up resistor RUP should meet the following equation: VIN (V) − 6 6 − < 1(mA) RUP (kΩ) RDOWN (kΩ) VIN (V) − 6 1(mA) This is non-latch IN VCC R UP MPQ8612 EN Comparator EN (13) RDOWN As a result, when just the pull-up resistor RUP is applied, the VIN−START is determined by input UVLO. The value of RUP can be get as: RUP (kΩ) > voltage. (14) A typical pull-up resistor is 100kΩ. UVLO protection The MPQ8612 has under-voltage lock-out protection (UVLO). When the VCC voltage is higher than the UVLO rising threshold voltage, the MPQ8612 will be powered up. It shuts off when the VCC voltage is lower than the UVLO Figure 9—Adjustable UVLO Thermal Shutdown Thermal shutdown is employed in the MPQ8612. The junction temperature of the IC is internally monitored. If the junction temperature exceeds the threshold value (minimum 150ºC), the converter shuts off. This is a non-latch protection. There is about 25ºC hysteresis. Once the junction temperature drops to about 125ºC, it initiates a soft startup. MPQ8612 Rev. 1.11 www.MonolithicPower.com 10/22/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 20 MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER APPLICATION INFORMATION Setting the Output Voltage-Large ESR Caps For applications that electrolytic capacitor or POS capacitor with a controlled output of ESR is set as output capacitors. The output voltage is set by feedback resistors R1 and R2. As figure 10 shows. SW Vo L FB R1 = ESR R1 in Figure 11. The VRAMP can be calculated as shown in equation 7. R2 should be chosen reasonably, a small R2 will lead to considerable quiescent current loss while too large R2 makes the FB noise sensitive. It is recommended to choose a value within 5kΩ-100kΩ for R2, using a comparatively larger R2 when VOUT is low, and a smaller R2 when VOUT is high. And the value of R1 then is determined as follow: VOUT − VFB( AVG) POSCAP R2 Figure 10—Simplified Circuit of POS Capacitor First, choose a value for R2. R2 should be chosen reasonably, a small R2 will lead to considerable quiescent current loss while too large R2 makes the FB noise sensitive. It is recommended to choose a value within 5kΩ100kΩ for R2, using a comparatively larger R2 when VOUT is low, and a smaller R2 when VOUT is high. Then R1 is determined as follow with the output ripple considered: R1 = VOUT 1 − × ΔVOUT − VREF 2 × R2 VREF (15) ΔVOUT is the output ripple determined by equation 21. FB Vo L R4 C4 R9 R1 Ceramic R2 Figure 11—Simplified Circuit of Ceramic Capacitor When low ESR ceramic capacitor is used in the output, an external voltage ramp should be added to FB through resistor R4 and capacitor C4.The output voltage is influenced by ramp voltage VRAMP besides resistor divider as shown R2 − R 4 + R9 (16) The VFB(AVG) is the average value on the FB. VFB(AVG) varies with the Vin, Vo, and load condition, etc.. Its value on the skip mode would be lower than that of the PWM mode, which means the load regulation is strictly related to the VFB(AVG). Also the line regulation is related to the VFB(AVG) ,if one wants to gets a better load or line regulation, a lower VRAMP is suggested once it meets equation 9. For PWM operation, VFB(AVG) value can be deduced from equation 17. VFB( AVG) = VREF + R1 // R2 1 × VRAMP × 2 R1 // R2 + R9 (17) Usually, R9 is set to 0Ω, and it can also be set following equation 18 for a better noise immunity. It should be set to be 5 timers smaller than R1//R2 to minimize its influence on Vramp. R9 ≤ Setting the Output Voltage-Small ESR Caps SW R2 VFB( AVG) 1 R1 × R2 × 10 R1 + R2 (18) Using equation 16 and 17 to calculate the output voltage can be complicated. To simplify the calculation of R1 in equation 16, a DC-blocking capacitor Cdc can be added to filter the DC influence from R4 and R9. Figure 12 shows a simplified circuit with external ramp compensation and a DC-blocking capacitor. With this capacitor, R1 can easily be obtained by using equation 19 for PWM mode operation. R1 = 1 × VRAMP 2 × R2 1 + × VRAMP 2 VOUT − VREF − VREF (19) Cdc is suggested to be at least 10 times larger than C4 for better DC blocking performance, and MPQ8612 Rev. 1.11 www.MonolithicPower.com 10/22/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 21 MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER should be not larger than 0.47uF considering start up performance. In case one wants to use larger Cdc for a better FB noise immunity,combined with reduced R1 and R2 to limit the Cdc in a reasonable value without affecting the system start up. Be noted that even when the Cdc is applied, the load and line regulation are still Vramp related. SW FB L R4 Vo C4 ΔVIN = Ceramic The worst-case condition occurs at VIN = 2VOUT, where: ΔVIN = ΔVOUT = Figure 12—Simplified Circuit of Ceramic Capacitor with DC blocking capacitor Input Capacitor The input current to the step-down converter is discontinuous. Therefore, a capacitor is required to supply the AC current to the step-down converter while maintaining the DC input voltage. Ceramic capacitors are recommended for best performance. In the layout, it’s recommended to put the input capacitors as close to the IN pin as possible. The capacitance varies significantly over temperature. Capacitors with X5R and X7R ceramic dielectrics are recommended because they are fairly stable over temperature. The capacitors must also have a ripple current rating greater than the maximum input ripple current of the converter. The input ripple current can be estimated as follows: VOUT V × (1 − OUT ) VIN VIN (20) The worst-case condition occurs at VIN = 2VOUT, where: ICIN = IOUT 2 (22) I 1 × OUT 4 fSW × CIN (23) The output capacitor is required to maintain the DC output voltage. Ceramic or POSCAP capacitors are recommended. The output voltage ripple can be estimated as: R2 ICIN = IOUT × IOUT V V × OUT × (1 − OUT ) fSW × CIN VIN VIN Output Capacitor R1 Cdc The input voltage ripple can be estimated as follows: (21) For simplification, choose the input capacitor whose RMS current rating is greater than half of the maximum load current. The input capacitance value determines the input voltage ripple of the converter. If there is input voltage ripple requirement in the system design, choose the input capacitor that meets the specification VOUT V 1 × (1 − OUT ) × (RESR + ) (24) fSW × L VIN 8 × fSW × COUT In the case of ceramic capacitors, the impedance at the switching frequency is dominated by the capacitance. The output voltage ripple is mainly caused by the capacitance. For simplification, the output voltage ripple can be estimated as: ΔVOUT = VOUT V × (1 − OUT ) VIN 8 × fSW 2 × L × COUT (25) The output voltage ripple caused by ESR is very small. Therefore, an external ramp is needed to stabilize the system. The external ramp can be generated through resistor R4 and capacitor C4 following equation 5, 8 and 9. In the case of POSCAP capacitors, the ESR dominates the impedance at the switching frequency. The ramp voltage generated from the ESR is high enough to stabilize the system. Therefore, an external ramp is not needed. A minimum ESR value around 12mΩ is required to ensure stable operation of the converter. For simplification, the output ripple can be approximated as: ΔVOUT = VOUT V × (1 − OUT ) × RESR fSW × L VIN (26) Inductor The inductor is required to supply constant current to the output load while being driven by the switching input voltage. A larger value MPQ8612 Rev. 1.11 www.MonolithicPower.com 10/22/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 22 MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER inductor will result in less ripple current and lower output ripple voltage. However, a larger value inductor will have a larger physical size, higher series resistance, and/or lower saturation current. A good rule for determining the inductor value is to allow the peak-to-peak ripple current in the inductor to be approximately 10~30% of the maximum output current. Also, make sure that the peak inductor current is below the current limit of the device. The inductance value can be calculated as: L= VOUT V × (1 − OUT ) fSW × ΔIL VIN Where ΔIL is the peak-to-peak inductor ripple current. Choose an inductor that will not saturate under the maximum inductor peak current. The peak inductor current can be calculated as: ILP = IOUT + VOUT V × (1 − OUT ) 2 × fSW × L VIN (28) The inductors listed in Table 1 are highly recommended for the high efficiency they can provide. (27) Table 1—Inductor Selection Guide Part Number Manufacturer Inductance (µH) DCR (mΩ) Current Rating (A) Dimensions L x W x H (mm3) FDU1250C-R50M FDU1250C-R56M FDU1250C-R75M FDU1250C-1R0M TOKO TOKO TOKO TOKO 0.50 0.56 0.75 1.0 1.3 1.6 1.7 2.2 46.3 42.6 32.7 31.3 13.3 x 12.1 x5 13.3 x 12.1 x5 13.3 x 12.1 x5 13.3 x 12.1 x5 Typical Design Parameter Tables The following tables include recommended component values for typical output voltages (1.0V, 1.2V, 1.8V, 3.3V) and switching frequencies (600kHz, 800kHz, and 1MHz). Refer to Tables 2-4 for design cases without external ramp compensation and Tables 5-7 for design cases with external ramp compensation. External ramp is not needed when high-ESR capacitors, such as electrolytic or POSCAPs are used. External ramp is needed when low-ESR capacitors, such as ceramic capacitors are used. For cases not listed in this datasheet, a calculator in excel spreadsheet can also be requested through a local sales representative to assist with the calculation. Table 2—COUT-Poscap, 600kHz, 5VIN VOUT (V) 1.0 1.2 L (μH) 1.0 1.0 R1 (kΩ) 19.8 29.4 R2 (kΩ) 30 30 R7 (kΩ) 300 365 1.5 1.0 29.4 20 453 1.8 1.0 39.2 20 549 3.3 1.0 44.2 10 1000 Switching Frequency (kHz) 1000 800-1000 600-800 600 Table 3—COUT-Poscap, 800kHz, 5VIN VOUT (V) 1.0 L (μH) 0.75 R1 (kΩ) 20 R2 (kΩ) 30 R7 (kΩ) 210 1.2 0.75 20 20 270 1.5 0.75 30 20 330 1.8 3.3 0.75 0.75 39 44.2 20 10 499 750 VOUT (V) 1.0 1.2 1.5 1.8 3.3 VOUT (V) 1.0 1.2 1.5 1.8 3.3 Table 5—COUT-Ceramic, 600kHz, 5VIN L (μH) 1.0 1.0 1.0 1.0 1.0 R1 (kΩ) 21 33 51 45 62 R2 (kΩ) 30 30 30 20 10 R4 (kΩ) 240 220 330 270 160 C4 (pF) 470 470 390 470 680 R7 (kΩ) 309 365 464 549 953 Table 6—COUT-Ceramic, 800kHz, 5VIN L (μH) 0.75 0.75 0.75 0.75 0.75 R1 (kΩ) 21 34 34 47.5 57.6 R2 (kΩ) 30 30 20 20 10 R4 (kΩ) 200 200 220 225 200 MPQ8612 Rev. 1.11 www.MonolithicPower.com 10/22/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. C4 (pF) 470 470 470 470 560 R7 (kΩ) 226 270 324 402 750 23 MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER TYPICAL APPLICATION VIN C1B C1A 22uF 22uF C1C 22uF C1D C1E 0.1uF 22uF R6 R8 100K 360K FREQ C7 1nF 10 R3 BST IN R7 0 C3 1uF L1 1uH SW VOUT R1 MPQ8612GL-12 + 29.4K C2B C2A 220uF/20mΩ 0.1uF EN FB VCC C5 R2 R5 SS 4.7uF 100K 30K C6 33nF PG PGND AGND Figure 13 — Typical Application Circuit with No External Ramp MPQ8612GL- 12, VIN=5V, VOUT=1.2V, IOUT= 12A, fSW=600kHz VIN C1A 22uF C1B 22uF C1C 22uF C1D R7 C1E 0.1uF 22uF R6 100K R8 10 360K C7 1nF BST IN R3 0 C3 1uF VOUT C4 R4 MPQ8612GL-12 220K EN FB VCC C5 L1 1uH SW FREQ R5 470pF R9 0 R1 33K C2A C2B C3C 22uF 22uF 22uF 22uF C2D C2E 0.1uF R2 30K SS 4.7uF 100K C6 33nF PG PGND AGND Figure 14 — Typical Application Circuit with Low ESR Ceramic Capacitor MPQ8612GL- 12, VIN=5V, VOUT=1.2V, IOUT= 12A, fSW=600kHz VIN C1A 22uF C1B 22uF C1C 22uF C1D R7 C1E 0.1uF 22uF R6 100K R8 10 360K C7 1nF BST IN R3 0 C3 1uF VOUT C4 R4 200K EN MPQ8612 FB VCC C5 L1 1uH SW FREQ 560pF Cdc 10nF R1 29.1K C2A C2B C3C 22uF 22uF 22uF 22uF C2D C2E 0.1uF R2 R5 SS 4.7uF 100K C6 33nF PG PGND 30K AGND Figure 15 — Typical Application Circuit with Low ESR Ceramic Capacitor and DC-Blocking Capacitor. MPQ8612GL- 12, VIN=5V, VOUT=1.2V, IOUT= 12A, fSW=600kHz MPQ8612 Rev. 1.11 www.MonolithicPower.com 10/22/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 24 MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER LAYOUT RECOMMENDATION 1. The high current paths (GND, IN, and SW) should be placed very close to the device with short, direct and wide traces. 2. Put the input capacitors as close to the IN and GND pins as possible. 3. Put the decoupling capacitor as close to the VCC and GND pins as possible. 4. Keep the switching node SW short and away from the feedback network. 5. The external feedback resistors should be placed next to the FB pin. Make sure that there is no via on the FB trace. 6. Keep the BST voltage path (BST, C3, and SW) as short as possible. 7. Keep the IN and GND pads connected with large copper to achieve better thermal performance. 8. Four-layer layout is strongly recommended to achieve better thermal performance. V IN R6 R5 C3 RFREQ GND EN L1 VOUT SW FREQ C4 R4 R1 MPQ8612 C2 FB VCC C5 Inner1 Layer BST IN C1 GND SS R3 R2 C6 PG PGND AGND Inner2 Layer Schematic For PCB Layout Guide Line SW R3 C1B SW GND IN EN PG SS VCC R3 R3 1 FB BST AG ND FREQ R3 R5 R3 C1A GND R3 R6 R3 RFREQ L1 GND SW IN R3 C3 SW IN R3 C5 R3 R2 R3 C2 R3 C6 R3 R4 R3 R1 VIN R3 C4 VIN GND Top Layer GND VOUT VOUT Bottom Layer Figure 16—PCB Layout MPQ8612 Rev. 1.11 www.MonolithicPower.com 10/22/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 25 MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER PACKAGE INFORMATION QFN (3x4mm) PIN 1 ID MARKING PIN 1 ID INDEX AREA BOTTOM VIEW TOP VIEW SIDE VIEW NOTE: 0.1x45 ° 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH. 3) LEAD COPLANARITY SHALL BE0.10 MILLIMETERS MAX. 4) JEDEC REFERENCE IS MO-220. 5) DRAWING IS NOT TO SCALE. RECOMMENDED LAND PATTERN MPQ8612 Rev. 1.11 www.MonolithicPower.com 10/22/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 26 MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER QFN (4x4mm) NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MPQ8612 Rev. 1.11 www.MonolithicPower.com 10/22/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 27