FAN7621 PFM Controller for Half-Bridge Resonant Converters Features Description The FAN7621 is a pulse frequency modulation controller for high-efficiency half-bridge resonant converters. Offering everything necessary to build a reliable and robust resonant converter, the FAN7621 simplifies designs and improves productivity, while improving performance. The FAN7621 includes a high-side gatedrive circuit, an accurate current controlled oscillator, frequency limit circuit, soft-start, and built-in protection functions. The high-side gate-drive circuit has a common-mode noise cancellation capability, which guarantees stable operation with excellent noise immunity. Using the zero-voltage-switching (ZVS) technique dramatically reduces the switching losses and efficiency is significantly improved. The ZVS also reduces the switching noise noticeably, which allows a small-sized Electromagnetic Interference (EMI) filter. Variable Frequency Control with 50% Duty Cycle for Half-bridge Resonant Converter Topology High Efficiency through Zero Voltage Switching (ZVS) Fixed Dead Time (350ns) Up to 300kHz Operating Frequency Pulse Skipping for Frequency Limit (Programmable) at Light-Load Condition Remote On/Off Control using CON Pin Protection Functions: Over-Voltage Protection (OVP), Overload Protection (OLP), Over-Current Protection (OCP), Abnormal Over-Current Protection (AOCP), Internal Thermal Shutdown (TSD) Applications The FAN7621 can be applied to various resonant converter topologies; such as series resonant, parallel resonant, and LLC resonant converters. PDP and LCD TVs Desktop PCs and Servers Adapters Telecom Power Supplies Video Game Consoles Related Resources AN4151 — Half-bridge LLC Resonant Converter Design TM using FSFR-series Fairchild Power Switch (FPS ) Ordering Information Part Number Operating Junction Temperature Eco Status FAN7621N FAN7621SJ -40°C ~ 130°C FAN7621SJX RoHS Package Packaging Method 16-DIP Tube 16-SOP Tube 16-SOP Tape & Reel For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. © 2009 Fairchild Semiconductor Corporation FAN7621 • Rev. 1.0.1 www.fairchildsemi.com FAN7621 — PFM Controller for Half-Bridge Resonant Converters July 2009 D1 Cr L lk VCC Np Lm LVcc CON CDL VIN FAN7621 HV CC RT VO Ns Ns HO CF R F D2 CTR KA431 LO CS SG PG Rsense Figure 1. Typical Application Circuit (LLC Resonant Half-Bridge Converter) Block Diagram LVCC 12 I CTC + 2ICTC 3V - 1V + S Q R -Q 11.3 / 14.5V LVCC good VREF - 8.7 / 9.2V HVCC good Internal Bias + I CTC - + VREF 1 F/F - 2V Time Delay + - RT High-Side Gate Drive Level-Shift 8 Counter (1/4) LVCC 6 Time Delay 0.4 / 0.6 V HO 2 CTR + OLP - LVCC + 23 V - Low-Side Gate Drive Balancing Delay 14 LO 350ns + 5V 3 350ns I OLP CON HVCC LVCC good OVP S Q R -Q Auto-restart Protection Shutdown without delay -1 + Q S -Q R 50ns Delay 0.9 V - V AOCP TSD Latch Protection LVCC < 5V Delay 1.5µs - 16 PG 10 SG V OCP 0.58 V + 9 CS Figure 2. Internal Block Diagram © 2009 Fairchild Semiconductor Corporation FAN7621 • Rev. 1.0.1 www.fairchildsemi.com 2 FAN7621 — PFM Controller for Half-Bridge Resonant Converters Application Circuit Diagram FAN7621 — PFM Controller for Half-Bridge Resonant Converters Pin Configuration (1) HVCC PG (16) (2) CTR NC (15) (3) HO LO (14) NC (13) (4) NC FAN7621 (5) NC LVCC (12) (6) CON NC (11) (7) NC SG (10) (8) RT CS (9) Figure 3. Package Diagram Pin Definitions Pin # Name Description 1 HVCC This is the supply voltage of the high-side gate-drive circuit IC. 2 CTR This is the drain of the low-side MOSFET. Typically, a transformer is connected to this pin. 3 HO This is the high-side gate driving signal. 4 NC No connection. 5 NC No connection. This pin is for a protection and enabling/disabling the controller. When the voltage of this pin is above 0.6V, the IC operation is enabled. When the voltage of this pin drops below 0.4V, gate drive signals for both MOSFETs are disabled. When the voltage of this pin increases above 5V, protection is triggered. 6 CON 7 NC No connection. 8 RT This pin programs the switching frequency. Typically, an opto-coupler is connected to control the switching frequency for the output voltage regulation. 9 CS This pin senses the current flowing through the low-side MOSFET. Typically, negative voltage is applied on this pin. 10 SG This pin is the control ground. 11 NC No connection. 12 LVCC 13 NC No connection. 14 LO This is the low-side gate driving signal. 15 NC No connection. 16 PG This pin is the power ground. This pin is connected to the source of the low-side MOSFET. This pin is the supply voltage of the control IC. © 2009 Fairchild Semiconductor Corporation FAN7621 • Rev. 1.0.1 www.fairchildsemi.com 3 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA=25°C unless otherwise specified. Symbol Parameter Min. Max. Unit VHO High-Side Gate Driving Voltage VCTR-0.3 HVCC VLO Low-Side Gate Driving Voltage -0.3 LVCC Low-Side Supply Voltage -0.3 25.0 V -0.3 25.0 V -0.3 600.0 V LVCC HVCC to VCTR High-Side VCC Pin to Center Voltage VCTR Center Voltage V VCON Control Pin Input Voltage -0.3 LVCC V VCS Current Sense (CS) Pin Input Voltage -5.0 1.0 V VRT RT Pin Input Voltage -0.3 5.0 V dVCTR/dt PD TJ TSTG Allowable Center Voltage Slew Rate Total Power Dissipation 50 V/ns 16-DIP 1.56 W 16-SOP 1.13 W Maximum Junction Temperature (1) +150 Recommended Operating Junction Temperature (1) Storage Temperature Range -40 +130 -55 +150 °C °C Note: 1. The maximum value of the recommended operating junction temperature is limited by thermal shutdown. Thermal Impedance Symbol θJA Parameter Junction-to-Ambient Thermal Impedance © 2009 Fairchild Semiconductor Corporation FAN7621 • Rev. 1.0.1 Value 16-DIP 80 16-SOP 110 Unit ºC/W www.fairchildsemi.com 4 FAN7621 — PFM Controller for Half-Bridge Resonant Converters Absolute Maximum Ratings TA=25°C and LVCC=17V unless otherwise specified. Symbol Parameter Test Conditions Min. Typ. Max. Unit 50 μA Supply Section ILK Offset Supply Leakage Current HVCC=VCTR IQHVCC Quiescent HVCC Supply Current (HVCCUV+) - 0.1V 50 120 μA IQLVCC Quiescent LVCC Supply Current (LVCCUV+) - 0.1V 100 200 μA IOHVCC Operating HVCC Supply Current (RMS Value) fOSC=100kHz, VCON > 0.6V, CLoad=1nF 5 8 mA No Switching, VCON < 0.4V 100 200 μA fOSC=100kHz, VCON > 0.6V, CLoad=1nF 6 9 mA No Switching, VCON < 0.4V 2 4 mA IOLVCC Operating LVCC Supply Current (RMS Value) UVLO Section LVCCUV+ LVCC Supply Under-Voltage Positive Going Threshold (LVCC Start) 13.0 14.5 16.0 V LVCCUV- LVCC Supply Under-Voltage Negative Going Threshold (LVCC Stop) 10.2 11.3 12.4 V LVCCUVH LVCC Supply Under-Voltage Hysteresis HVCCUV+ HVCC Supply Under-Voltage Positive Going Threshold (HVCC Start) 8.2 9.2 10.2 V HVCCUV- HVCC Supply Under-Voltage Negative Going Threshold (HVCC Stop) 7.8 8.7 9.6 V HVCCUVH HVCC Supply Under-Voltage Hysteresis 3.2 V 0.5 V Oscillator & Feedback Section VCONDIS Control Pin Disable Threshold Voltage 0.36 0.40 0.44 V VCONEN Control Pin Enable Threshold Voltage 0.54 0.60 0.66 V VRT V-I Converter Threshold Voltage 1.5 2.0 2.5 V fOSC Output Oscillation Frequency 94 100 106 kHz DC Output Duty Cycle 48 50 52 % fSS Internal Soft-Start Initial Frequency tSS Internal Soft-Start Time RT=5.2kΩ fSS=fOSC+40kHz, RT=5.2kΩ 140 2 3 kHz 4 ms Output Section Isource Isink Peak Sourcing Current HVCC=17V 250 360 mA Peak Sinking Current HVCC=17V 460 600 mA 65 ns 35 ns tr Rising Time tf Falling Time VHOH High Level of High-Side Gate Driving Signal (VHVCC-VHO) VHOL Low Level of High-Side Gate Driving Signal VLOH High Level of High-Side Gate Driving Signal (VLVCC-VLO) VLOL Low Level of High-Side Gate Driving Signal © 2009 Fairchild Semiconductor Corporation FAN7621 • Rev. 1.0.1 CLoad=1nF, HVCC=17V 1.0 V 0.6 V 1.0 V 0.6 V IO=20mA www.fairchildsemi.com 5 FAN7621 — PFM Controller for Half-Bridge Resonant Converters Electrical Characteristics TA=25°C and LVCC=17V unless otherwise specified. Symbol Parameter Test Conditions Min. Typ. Max. Unit Protection Section IOLP OLP Delay Current VCON=4V 3.8 5.0 6.2 μA VOLP OLP Protection Voltage VCON > 3.5V 4.5 5.0 5.5 V VOVP LVCC Over-Voltage Protection LVCC > 21V 21 23 25 V VAOCP AOCP Threshold Voltage -1.0 -0.9 -0.8 V tBAO AOCP Blanking Time VOCP OCP Threshold Voltage 50 (2) tBO OCP Blanking Time tDA Delay Time (Low-Side) Detecting from (2) VAOCP to Switch Off TSD Thermal Shutdown Temperature ISU Protection Latch Sustain LVCC Supply Current VPRSET (2) -0.64 -0.58 -0.52 V 1.0 1.5 2.0 μs 250 400 ns 130 150 °C 100 150 μA 110 LVCC=7.5V Protection Latch Reset LVCC Supply Voltage ns 5 V Dead-Time Control Section DT Dead Time 350 ns Note: 2. These parameters, although guaranteed, are not tested in production. © 2009 Fairchild Semiconductor Corporation FAN7621 • Rev. 1.0.1 www.fairchildsemi.com 6 FAN7621 — PFM Controller for Half-Bridge Resonant Converters Electrical Characteristics (Continued) 1.1 1.1 1.05 1.05 Normalized at 25OC Normalized at 25OC These characteristic graphs are normalized at TA=25ºC. 1 0.95 1 0.95 0.9 0.9 -50 -25 0 25 50 75 -50 100 -25 0 O Temp ( C) Temp Figure 4. Low-Side MOSFET Duty Cycle vs. Temperature 50 75 100 (OC) Figure 5. Switching Frequency vs. Temperature 1.1 1.1 1.05 1.05 Normalized at 25OC Normalized at 25OC 25 1 0.95 0.9 1 0.95 0.9 -50 -25 0 25 50 75 100 -50 -25 0 25 50 75 100 Temp (OC) Figure 6. High-Side VCC (HVCC) Start vs. Temperature Figure 7. High-Side VCC (HVCC) Stop vs. Temperature 1.1 1.1 1.05 1.05 Normalized at 25OC Normalized at 25OC Temp (OC) 1 0.95 1 0.95 0.9 0.9 -50 -25 0 25 Temp 50 75 100 -50 Figure 8. Low-Side VCC (LVCC) Start vs. Temperature © 2009 Fairchild Semiconductor Corporation FAN7621 • Rev. 1.0.1 -25 0 25 50 75 100 Temp (OC) (OC) Figure 9. Low-Side VCC (LVCC) Stop vs. Temperature www.fairchildsemi.com 7 FAN7621 — PFM Controller for Half-Bridge Resonant Converters Typical Performance Characteristics 1.1 1.1 1.05 1.05 Normalized at 25OC Normalized at 25OC These characteristic graphs are normalized at TA=25ºC. 1 0.95 0.95 0.9 0.9 -50 -25 0 25 50 75 -50 100 -25 0 50 75 100 Temp (OC) Figure 10. OLP Delay Current vs. Temperature Figure 11. OLP Protection Voltage vs. Temperature 1.1 1.1 1.05 1.05 1 0.95 1 0.95 0.9 0.9 -50 -25 0 25 50 75 -50 100 -25 0 Temp (OC) 25 Temp Figure 12. LVCC OVP Voltage vs. Temperature 50 75 100 (OC) Figure 13. RT Voltage vs. Temperature 1.1 1.1 1.05 1.05 Normalized at 25OC Normalized at 25OC 25 Temp (OC) Normalized at 25OC Normalized at 25OC 1 1 0.95 0.9 1 0.95 0.9 -50 -25 0 25 50 75 -50 100 -25 0 25 50 75 100 Temp (OC) Temp (OC) Figure 14. CON Pin Enable Voltage vs. Temperature Figure 15. OCP Voltage vs. Temperature © 2009 Fairchild Semiconductor Corporation FAN7621 • Rev. 1.0.1 www.fairchildsemi.com 8 FAN7621 — PFM Controller for Half-Bridge Resonant Converters Typical Performance Characteristics (Continued) 1. Basic Operation: FAN7621 is designed to drive highside and low-side MOSFETs complementarily with 50% duty cycle. A fixed dead time of 350ns is introduced between consecutive transitions, as shown in Figure 16. Gain 1.8 f min f normal f max f ISS Dead t ime 1.6 High-side MOSFET gate drive 1.4 1.2 Low-side MOSFET gate drve 1.0 time Soft-sta rt Figure 16. MOSFETs Gate Drive Signal 0.8 2. Internal Oscillator: FAN7621 employs a currentcontrolled oscillator, as shown in Figure 17. Internally, the voltage of RT pin is regulated at 2V and the charging / discharging current for the oscillator capacitor, CT, is obtained by copying the current flowing out of RT pin (ICTC) using a current mirror. Therefore, the switching frequency increases as ICTC increases. 0.6 60 70 80 90 100 110 2I CTC CT 1V + S Q R -Q RT F/F Rmax Rmin - RSS CON CSS + - RT 2V 3 Counter (1/4) 150 HV CC FAN7621 I CTC - 140 LVCC + 3V 130 Figure 18. Resonant Converter Typical Gain Curve VCC I CTC VREF 120 Frequency (kHz) HO CTR LO Gate drive CS SG Figure 17. Current Controlled Oscillator PG R sense 3. Frequency Setting: Figure 18 shows the typical voltage gain curve of a resonant converter, where the gain is inversely proportional to the switching frequency in the ZVS region. The output voltage can be regulated by modulating the switching frequency. Figure 19 shows the typical circuit configuration for RT pin, where the opto-coupler transistor is connected to the RT pin to modulate the switching frequency. Figure 19. Frequency Control Circuit The minimum switching frequency is determined as: f min = 5.2k Ω × 100(kHz ) Rmin (1) Assuming the saturation voltage of opto-coupler transistor is 0.2V, the maximum switching frequency is determined as: f max = ( 5.2k Ω 4.68k Ω + ) × 100(kHz ) Rmin Rmax (2) To prevent excessive inrush current and overshoot of output voltage during startup, increase the voltage gain of the resonant converter progressively. Since the voltage gain of the resonant converter is inversely proportional to the switching frequency, the soft-start is © 2009 Fairchild Semiconductor Corporation FAN7621 • Rev. 1.0.1 www.fairchildsemi.com 9 FAN7621 — PFM Controller for Half-Bridge Resonant Converters Functional Description 5.2k Ω 5.2k Ω ) × 100 + 40 (kHz ) + Rmin RSS LV CC HV CC RT Rmax R min RSS CON (3) CSS It is typical to set the initial (soft-start) frequency of two ~ three times the resonant frequency (fO) of the resonant network. CTR LO SG PG (4) Figure 22. Control Pin Configuration for Pulse Skipping fs f HO CS The soft-start time is three to four times the RC time constant. The RC time constant is as follows: TSS = RSS ⋅ CSS FAN7621 f ISS = ( VCC ISS Remote On / Off: When an auxiliary power supply is used for standby, the main power stage using FAN7621 can be shut down by pulling down the control pin voltage, as shown in Figure 23. R1 and C1 are used to ensure soft-start when switching resumes. 40kHz Control loop take over OP1 time Main Output R1 Figure 20. Frequency Sweeping of Soft-Start 4. Control Pin: The FAN7621 has a control pin for protection, cycle skipping, and remote on/off. Figure 21 shows the internal block diagram for control pin. C1 Main Off FAN7621 LVCC CON IOLP 6 RT 0.4 / 0.6V Aux Output Rmin + Stop Switching + OLP 5V - LVCC + 23V - LVCC good S Q R -Q CON Auto-restart protection OP1 OVP Figure 21. Internal Block of Control Pin Figure 23. Remote On / Off Circuit Protection: When the control pin voltage exceeds 5V, protection is triggered. Detailed applications are described in the protection section. 5. Protection Circuits: The FAN7621 has several selfprotective functions, such as Overload Protection (OLP), Over-Current Protection (OCP), Abnormal Over-Current Protection (AOCP), Over-Voltage Protection (OVP), and Thermal Shutdown (TSD). OLP, OCP, and OVP are auto-restart mode protections; while AOCP and TSD are latch-mode protections, as shown in Figure 24. Pulse Skipping: FAN7621 stops switching when the control pin voltage drops below 0.4V and resumes switching when the control pin voltage rises above 0.6V. To use pulse-skipping, the control pin should be connected to the opto-coupler collector pin. The frequency that causes pulse skipping is given as: SKIP = 5.2 k 4.16 k + R min R max © 2009 Fairchild Semiconductor Corporation FAN7621 • Rev. 1.0.1 x100 (kHz) Auto-Restart Mode Protection: Once a fault condition is detected, switching is terminated and the MOSFETs remain off. When LVCC falls to the LVCC stop voltage of 11.3V, the protection is reset. FAN7621 resumes normal operation when LVCC reaches the start voltage of 14.5V. (5) www.fairchildsemi.com 10 FAN7621 — PFM Controller for Half-Bridge Resonant Converters implemented by sweeping down the switching frequency ISS from an initial high frequency (f ) until the output voltage is established. The soft-start circuit is made by connecting R-C series network on the RT pin, as shown in Figure 19. FAN7621 also has an internal soft-start for 3ms to reduce the current overshoot during the initial cycles, which adds 40kHz to the initial frequency of the external soft-start circuit, as shown in Figure 20. The initial frequency of the soft-start is given as: LV CC 7 11 / 14 V VCr p − p = Internal Bias V REF - Latch protection Auto-restart protection OLP OVP LV CC good CON S Q R -Q S -Q R F/F F/F 20k Q (6) 2π f sCr To minimize power dissipation, a capacitive voltage divider is generally used for capacitor voltage sensing, as shown in Figure 27. Shutdown OCP I p p− p AOCP LVCC CDL TSD HV CC RT LV CC < 5V CON Figure 24. Protection Blocks Current Sensing Using Resistor: FAN7621 senses drain current as a negative voltage, as shown in Figure 25 and Figure 26. Half-wave sensing allows low power dissipation in the sensing resistor, while full-wave sensing has less switching noise in the sensing signal. FAN7621 LV CC good + CTR LO CS SG PG LV CC V CS FAN7621 CON 100 Cr Ip HV CC C DL CB Csense Vsense RT Ip HO HO CTR VCr I ds LO VCrp-p CS SG PG V CS R sense Vsense I ds Vsensepk CB = VCr p− p Csense+ C B Vsensepk = VCON 2 Vsensepk VCON Figure 25. Half-Wave Sensing Vsensepk I ds tDelay =R dCd Figure 27. Current Sensing Using Resonant Capacitor Voltage V CS LVCC C DL CON V CS FAN7621 HV CC RT 5.1 Over-Current Protection (OCP): When the sensing pin voltage drops below -0.6V, OCP is triggered and the MOSFETs remain off. This protection has a shutdown time delay of 1.5µs to prevent premature shutdown during startup. HO CTR LO CS SG 5.2 Abnormal Over-Current Protection: (AOCP): If the secondary rectifier diodes are shorted, large current with extremely high di/dt can flow through the MOSFET before OCP or OLP is triggered. AOCP is triggered without shutdown delay when the sensing pin voltage drops below -0.9V. This protection is latch mode and reset when LVCC is pulled down below 5V. PG I ds R sense Figure 26. Full-Wave Sensing Current Sensing Using Resonant Capacitor Voltage: For high-power applications, current sensing using a © 2009 Fairchild Semiconductor Corporation FAN7621 • Rev. 1.0.1 www.fairchildsemi.com 11 FAN7621 — PFM Controller for Half-Bridge Resonant Converters resistor may not be available due to the severe power dissipation in the resistor. In that case, indirect current sensing using the resonant capacitor voltage can be a good alternative because the amplitude of the resonant p-p capacitor voltage (Vcr ) is proportional to the resonant p-p current in the primary side (Ip ) as: Latch-Mode Protection: Once this protection is triggered, switching is terminated and the gate output signals remain off. The latch is reset only when LVCC is discharged below 5V. VCON = CB VCr p − p 2(CB + Csense ) where VCr voltage. p-p In addition, it is helpful to reduce the duty imbalance to make the loop configured between CON pin and optocoupler as small as possible, as shown in the red line in Figure 28. (7) is the amplitude of the resonant capacitor 5.4 Over-Voltage Protection: (OVP): When the LVCC reaches 23V, OVP is triggered. This protection is used when auxiliary winding of the transformer to supply VCC to the controller is utilized. 5.5 Thermal Shutdown (TSD): If the temperature of the junction exceeds approximately 130°C, the thermal shutdown triggers. 6. PCB Layout Guideline: Duty imbalance problems may occur due to the radiated noise from main transformer, the inequality of the secondary-side leakage inductances of main transformer, and so on. Among them, it is one of the dominant reasons that the control components in the vicinity of RT pin are enclosed by the primary current flow pattern on PCB layout. The direction of the magnetic field on the components caused by the primary current flow is changed when the high-and-low side MOSFET turns on by turns. The magnetic fields with opposite direction from each other induce a current through, into, or out of the RT pin, which makes the turnon duration of each MOSFET different. It is strongly recommended to separate the control components in the vicinity of RT pin from the primary current flow pattern on © 2009 Fairchild Semiconductor Corporation FAN7621 • Rev. 1.0.1 Figure 28. Example for Duty Balancing www.fairchildsemi.com 12 FAN7621 — PFM Controller for Half-Bridge Resonant Converters PCB layout. Figure 28 shows an example for the dutybalanced case. The yellow and blue lines show the primary current flows when the lower-side and higherside MOSFETs turns on, respectively. The primary current does not enclose any component of controller. 5.3 Overload Protection (OLP): Overload is defined as the load current exceeding its normal level due to an unexpected abnormal event. In this situation, the protection circuit should trigger to protect the power supply. However, even when the power supply is in the normal condition, the overload situation can occur during the load transition. To avoid premature triggering of protection, the overload protection circuit should be designed to trigger only after a specified time to determine whether it is a transient situation or a true overload situation. Figure 27 shows a typical overload protection circuit. By sensing the resonant capacitor voltage on the control pin, the overload protection can be implemented. Using RC time constant, shutdown delay can be also introduced. The voltage obtained on the control pin is given as: Application Device Input Voltage Range Rated Output Power Output Voltage (Rated Current) LCD TV FAN7621 390VDC (340~400VDC) 192W 24V-8A Features High efficiency ( >94% at 400VDC input) Reduced EMI noise through zero-voltage-switching (ZVS) Enhanced system reliability with various protection functions C110 ope n D 101 1N 4937 R 103 400k V CC =16~ 20V DC C102 22 nF EE R 3542 D 202 F Y P F 2010 D N C 201 C 202 2000 µF / 2000 µF / 35V 35V U5 R 108 10k F101 LVCC ZD 101 6.8V R 111 45k HVCC RT R 104 5.1k R 107 7.7k C 111 680 pF CON C 107 10µF C 101 220 µF / 450V V IN =340 ~400 V DC R 105 7.5k C 104 o pe n U2 VO C105 0.33 µF U4 R 110 1M 3.15A/250V JP 5 0 R 112 10k D102 1N4148 FAN7621 R 109 1M R113 3.3 CTR R 115 10k R 204 62k R 205 2k JP 2, 0 JP 3, 0 JP 4, 0 R114 3.3 SG C 204 12 nF U2 R 202 D 201 F Y P F 2010 D N 1k JP 1, 0 D102 1N4148 CS C 103 100 pF R 201 10k C 106 150 nF LO C 108 12 nF R 102 1k Q1 F C PF11N60F HO R 116 10k C 203 47nF Q2 F C PF11N60F R 203 33k C 301 R205 7k PG R101 0.2 Figure 29. Typical Application Circuit © 2009 Fairchild Semiconductor Corporation FAN7621 • Rev. 1.0.1 www.fairchildsemi.com 13 FAN7621 — PFM Controller for Half-Bridge Resonant Converters Typical Application Circuit (Half-Bridge LLC Resonant Converter) Usually, LLC resonant converters require large leakage inductance value. To obtain a large leakage inductance, sectional winding method is used. 2 Core: EER3542 (Ae=107 mm ) Bobbin: EER3542 (Horizontal) Figure 30. Transformer Construction Pin (S → F) Wire Turns Winding Method Np 8→1 0.12φ×30 (Litz Wire) 36 Section Winding Ns1 12 → 9 0.1φ×100 (Litz Wire) 4 Section Winding Ns2 16 → 13 0.1φ×100 (Litz Wire) 4 Section Winding Pin Specification Remark Primary-Side Inductance (Lp) 1－ 8 630μH ± 5% 100kHz, 1V Primary-Side Effective Leakage (Lr) 1－ 8 135μH ± 5%. Short one of the secondary windings For more detailed information regarding the transformer, visit http://www.santronics-usa.com/documents.html or contact [email protected] or +1-408-734-1878 (Sunnyvale, California USA). © 2009 Fairchild Semiconductor Corporation FAN7621 • Rev. 1.0.1 www.fairchildsemi.com 14 FAN7621 — PFM Controller for Half-Bridge Resonant Converters Typical Application Circuit (Continued) 19.68 18.66 16 A 9 6.60 6.09 1 8 (0.40) TOP VIEW 0.38 MIN 5.33 MAX 8.13 7.62 3.42 3.17 3.81 2.92 2.54 0.35 0.20 0.58 A 0.35 1.78 1.14 15 0 8.69 17.78 SIDE VIEW NOTES: UNLESS OTHERWISE SPECIFIED A THIS PACKAGE CONFORMS TO JEDEC MS-001 VARIATION BB B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR PROTRUSIONS D) CONFORMS TO ASME Y14.5M-1994 E) DRAWING FILE NAME: N16EREV1 Figure 31. 16-Lead Dual Inline Package (DIP) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2009 Fairchild Semiconductor Corporation FAN7621 • Rev. 1.0.1 www.fairchildsemi.com 15 FAN7621 — PFM Controller for Half-Bridge Resonant Converters Physical Dimensions FAN7621 — PFM Controller for Half-Bridge Resonant Converters Physical Dimensions Figure 32. 16-Lead Small Outline Package (SOP) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2009 Fairchild Semiconductor Corporation FAN7621 • Rev. 1.0.1 www.fairchildsemi.com 16 FAN7621 — PFM Controller for Half-Bridge Resonant Converters © 2009 Fairchild Semiconductor Corporation FAN7621 • Rev. 1.0.1 www.fairchildsemi.com 17