ON NLSV1T34AMX1TCG 1-bit dual-supply non-inverting level translator Datasheet

NLSV1T34
1-Bit Dual-Supply
Non-Inverting Level
Translator
The NLSV1T34 is a 1−bit configurable dual−supply voltage level
translator. The input An and output Bn ports are designed to track two
different power supply rails, VCCA and VCCB respectively. Both
supply rails are configurable from 0.9 V to 4.5 V allowing universal
low−voltage translation from the input An to the output Bn port.
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MARKING
DIAGRAMS
Features
•
Wide VCCA and VCCB Operating Range: 0.9 V to 4.5 V
High−Speed w/ Balanced Propagation Delay
Inputs and Outputs have OVT Protection to 4.5 V
Non−preferential VCCA and VCCB Sequencing
Power−Off Protection
Power−Off High Impedance Inputs and Outputs
Ultra−Small Packaging: 1.45 mm x 1.0 mm ULLGA6
2.0 mm x 2.1 mm SC−88A
1.2 mm x 1.0 mm UDFN6
1.45 mm x 1.0 mm UDFN6
These are Pb−Free Devices
1
QM
1
ULLGA6
MX1 SUFFIX
CASE 613AF
5
SC−88A
(SOT−353/SC−70)
DF SUFFIX
CASE 419A
W0 M G
G
1
W0 = Device Code
M
= Date Code*
G
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may vary
depending upon manufacturing location.
• ESD Protection for All Pins:
HBM (Human Body Model) > 3000 V
VCCB
B
A
= Specific Device Code
= Date Code
M
1
Important Information
VCCA
AM
1
5
• Mobile Phones, PDAs, Other Portable Devices
M
G
UDFN6
MU SUFFIX
CASE 517AQ
X
M
Typical Applications
Q
•
•
•
•
•
•
•
UDFN6
MU SUFFIX
CASE 517AA
PIN ASSIGNMENT
VCCA 1
Figure 1. Logic Diagram
A 2
GND 3
6 VCCB VCCA 1
5 NC
4 B
ULLGA6/UDFN6
(Top View)
5 VCCB
A 2
GND 3
4 B
SC−88A
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2010
April, 2010 − Rev. 5
1
Publication Order Number:
NLSV1T34/D
NLSV1T34
PIN ASSIGNMENT
TRUTH TABLE
PIN
FUNCTION
INPUTS
OUTPUTS
VCCA
Input Port DC Power Supply
A
B
VCCB
Output Port DC Power Supply
L
L
GND
Ground
H
H
A
Input Port
B
Output Port
MAXIMUM RATINGS
Symbol
VCCA, VCCB
Rating
Value
DC Supply Voltage
VI
DC Input Voltage
VO
DC Output Voltage
Condition
Unit
−0.5 to +5.5
V
A
−0.5 to +5.5
V
(Power Down)
B
−0.5 to +5.5
(Active Mode)
B
−0.5 to +5.5
VCCA = VCCB = 0
V
V
IIK
DC Input Diode Current
−20
VI < GND
mA
IOK
DC Output Diode Current
−50
VO < GND
mA
IO
DC Output Source/Sink Current
±50
mA
ICCA, ICCB
DC Supply Current Per Supply Pin
±100
mA
IGND
DC Ground Current per Ground Pin
±100
mA
TSTG
Storage Temperature
−65 to +150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
RECOMMENDED OPERATING CONDITIONS
Symbol
VCCA, VCCB
VI
VIO
TA
Dt / DV
Parameter
Positive DC Supply Voltage
Bus Input Voltage
Bus Output Voltage
Min
Max
Unit
0.9
4.5
V
GND
4.5
V
(Power Down Mode)
B
GND
4.5
V
(Active Mode)
B
GND
VCCB
V
−40
+85
°C
0
10
nS
Operating Temperature Range
Input Transition Rise or Rate
VI, from 30% to 70% of VCC; VCC = 3.3 V ±0.3 V
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2
NLSV1T34
DC ELECTRICAL CHARACTERISTICS
−405C to +855C
Symbol
VIH
VIL
VOH
Parameter
Test Conditions
Input HIGH Voltage
Input LOW Voltage
Output HIGH Voltage
Min
Max
Unit
3.6 – 4.5
0.9 – 4.5
V
2.2
−
2.7 – 3.6
2.0
−
2.3 – 2.7
1.6
−
1.4 − 2.3
0.65 * VCCA
−
0.9 – 1.4
0.9 * VCCA
−
0.9 – 4.5
−
0.8
2.7 – 3.6
−
0.8
2.3 – 2.7
−
0.7
1.4 − 2.3
−
0.35 * VCCA
0.9 – 1.4
−
0.1 * VCCA
IOH = −100 mA; VI = VIH
0.9 – 4.5
0.9 – 4.5
VCCB – 0.2
−
IOH = −0.5 mA; VI = VIH
0.9
0.9
0.75 * VCCB
−
IOH = −2 mA; VI = VIH
1.4
1.4
1.05
−
IOH = −6 mA; VI = VIH
1.65
1.65
1.25
−
2.3
2.3
2.0
−
2.3
2.3
1.8
−
2.7
2.7
2.2
−
2.3
2.3
1.7
−
IOH = −18 mA; VI = VIH
Output LOW Voltage
VCCB (V)
3.6 – 4.5
IOH = −12 mA; VI = VIH
VOL
VCCA (V)
3.0
3.0
2.4
−
IOH = −24 mA; VI = VIH
3.0
3.0
2.2
−
IOL = 100 mA; VI = VIL
0.9 – 4.5
0.9 – 4.5
−
0.2
IOL = 0.5 mA; VI = VIH
1.1
1.1
−
0.3
IOL = 2 mA; VI = VIH
1.4
1.4
−
0.35
IOL = 6 mA; VI = VIL
1.65
1.65
−
0.3
IOL = 12 mA; VI = VIL
2.3
2.3
−
0.4
2.7
2.7
−
0.4
2.3
2.3
−
0.6
3.0
3.0
−
0.4
IOL = 18 mA; VI = VIL
IOL = 24 mA; VI = VIL
V
V
V
3.0
3.0
−
0.55
Input Leakage Current
VI = VCCA or GND
0.9 – 4.5
0.9 – 4.5
−1.0
1.0
mA
ICCA
Quiescent Supply Current
VI = VCCA or GND;
IO = 0, VCCA = VCCB
0.9 – 4.5
0.9 − 4.5
−
2.0
mA
ICCB
Quiescent Supply Current
VI = VCCA or GND;
IO = 0, VCCA = VCCB
0.9 – 4.5
0.9 − 4.5
−
2.0
mA
ICCA + ICCB Quiescent Supply Current
VI = VCCA or GND;
IO = 0, VCCA = VCCB
0.9 – 4.5
0.9 – 4.5
−
4.0
mA
0
0
−
5.0
mA
II
IOFF
Power OFF Leakage Current
VI = 4.5 V
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3
NLSV1T34
TOTAL STATIC POWER CONSUMPTION (ICCA + ICCB)
−405C to +855C
VCCB (V)
4.5
VCCA (V)
Min
3.3
Max
Min
2.8
Max
Min
1.8
Max
Min
0.9
Max
Min
Max
Unit
4.5
2
2
2
2
< 1.5
μA
3.3
2
2
2
2
< 1.5
μA
2.8
<2
<1
<1
< 0.5
< 0.5
μA
1.8
<1
<1
< 0.5
< 0.5
< 0.5
μA
0.9
< 0.5
< 0.5
< 0.5
< 0.5
< 0.5
μA
NOTE: Connect ground before applying supply voltage VCCA or VCCB. This device is designed with the feature that the power−up sequence
of VCCA and VCCB will not damage the IC.
AC ELECTRICAL CHARACTERISTICS
−405C to +855C
VCCB (V)
4.5
Symbol
tPLH,
tPHL
(Note 1)
Min
3.3
Max
Min
2.8
Max
Min
1.8
Max
Max
Unit
2.1
2.3
nS
2.3
2.6
2.3
2.5
2.8
2.4
2.5
2.7
3.0
2.7
2.8
3.0
3.3
Parameter
VCCA (V)
Propagation
Delay,
4.5
1.6
1.8
2.0
3.3
1.7
1.9
2.1
A to B
2.8
1.9
2.1
1.8
2.1
1.2
2.4
Min
1.2
Max
Min
1. Propagation delays defined per Figure 2.
CAPACITANCE
Typ (Note 2)
Unit
CI/O
I/O Pin Input Capacitance
VCCA = VCCB = 3.3 V, VI = 0 V or VCCA/B
5.0
pF
CPD
Power Dissipation Capacitance
VCCA = VCCB = 3.3 V, VI = 0 V or VCCA, f = 10 MHz
5.0
pF
Symbol
Parameter
Test Conditions
2. Typical values are at TA = +25°C.
3. CPD is defined as the value of the IC’s equivalent capacitance from which the operating current can be calculated from:
ICC(operating) ^ CPD x VCC x fIN where ICC = ICCA + ICCB.
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4
NLSV1T34
VCC
Pulse
Generator
DUT
CL
RL
Figure 2. AC (Propagation Delay) Test Circuit
Test
Switch
CL = 15 pF or equivalent (includes probe and jig capacitance)
RL = 2 kW or equivalent
ZOUT of pulse generator = 50 W
Input (An)
VIH
Vm
Vm
tPLH
Output (Bn)
tPHL
Vm
0V
VOH
Vm
VOL
Waveform 1 − Propagation Delays
tR = tF = 2.0 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
Figure 3. AC (Propagation Delay) Test Circuit Waveforms
VCC
Symbol
0.9 V – 4.5 V
VmA
VCCA/2
VmB
VCCB/2
ORDERING INFORMATION
Package
Shipping†
NLSV1T34MUTCG
UDFN6
(Pb−Free)
3000 / Tape & Reel
NLSV1T34AMUTCG
UDFN6
(Pb−Free)
3000 / Tape & Reel
NLSV1T34AMX1TCG
ULLGA6
(Pb−Free)
3000 / Tape & Reel
NLSV1T34DFT2G
SC−88A
(Pb−Free)
3000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
NLSV1T34
PACKAGE DIMENSIONS
SC−88A, SOT−353, SC−70
CASE 419A−02
ISSUE J
A
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
G
5
4
−B−
S
1
2
DIM
A
B
C
D
G
H
J
K
N
S
3
D 5 PL
0.2 (0.008)
M
B
M
N
INCHES
MIN
MAX
0.071
0.087
0.045
0.053
0.031
0.043
0.004
0.012
0.026 BSC
--0.004
0.004
0.010
0.004
0.012
0.008 REF
0.079
0.087
J
C
K
H
SOLDERING FOOTPRINT*
0.50
0.0197
0.65
0.025
0.65
0.025
0.40
0.0157
1.9
0.0748
SCALE 20:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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6
mm Ǔ
ǒinches
MILLIMETERS
MIN
MAX
1.80
2.20
1.15
1.35
0.80
1.10
0.10
0.30
0.65 BSC
--0.10
0.10
0.25
0.10
0.30
0.20 REF
2.00
2.20
NLSV1T34
PACKAGE DIMENSIONS
UDFN6, 1.2x1.0, 0.4P
CASE 517AA−01
ISSUE C
EDGE OF PACKAGE
PIN ONE
REFERENCE
2X
0.10 C
L1
ÉÉ
ÉÉ
E
DETAIL A
Bottom View
(Optional)
TOP VIEW
2X
EXPOSED Cu
0.10 C
(A3)
0.10 C
A1
A
10X
0.08 C
ÉÉÉ
ÉÉÉ
A3
DETAIL B
Side View
(Optional)
5X
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.127 REF
0.15
0.25
1.20 BSC
1.00 BSC
0.40 BSC
0.30
0.40
0.00
0.15
0.40
0.50
MOUNTING FOOTPRINT*
6X
6X
0.42
C
A1
DIM
A
A1
A3
b
D
E
e
L
L1
L2
MOLD CMPD
SEATING
PLANE
SIDE VIEW
1
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.25 AND
0.30 mm FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
A
B
D
0.22
L
3
L2
6X
b
0.10 C A B
0.05 C
6
0.40
PITCH
4
e
NOTE 3
1.07
DIMENSIONS: MILLIMETERS
BOTTOM VIEW
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
7
NLSV1T34
PACKAGE DIMENSIONS
UDFN6, 1.45x1.0, 0.5P
CASE 517AQ−01
ISSUE O
A
B
D
PIN ONE
REFERENCE
0.10 C
L
L1
ÉÉÉ
ÉÉÉ
ÉÉÉ
DETAIL A
E
OPTIONAL
CONSTRUCTIONS
DETAIL B
A1
SIDE VIEW
MOLD CMPD
OPTIONAL
CONSTRUCTIONS
A
0.05 C
DIM
A
A1
A2
b
D
E
e
L
L1
DETAIL B
0.05 C
6X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30 mm FROM THE TERMINAL TIP.
ÉÉ
ÉÉ
EXPOSED Cu
TOP VIEW
0.10 C
L
MOUNTING FOOTPRINT
A2
C
SEATING
PLANE
6X
0.30
PACKAGE
OUTLINE
e
6X
L
1.24
3
1
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.07 REF
0.20
0.30
1.45 BSC
1.00 BSC
0.50 BSC
0.30
0.40
−−−
0.15
DETAIL A
6X
0.53
6
4
BOTTOM VIEW
6X
b
0.10 C A B
0.05 C
1
0.50
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
NOTE 3
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8
NLSV1T34
PACKAGE DIMENSIONS
ULLGA6 1.45x1.0, 0.5P
CASE 613AF−01
ISSUE A
PIN ONE
REFERENCE
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30 mm FROM THE TERMINAL TIP.
4. A MAXIMUM OF 0.05 PULL BACK OF THE
PLATED TERMINAL FROM THE EDGE OF THE
PACKAGE IS ALLOWED.
A
B
D
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
E
DIM
A
A1
b
D
E
e
L
L1
0.10 C
TOP VIEW
0.10 C
0.05 C
MILLIMETERS
MIN
MAX
−−−
0.40
0.00
0.05
0.15
0.25
1.45 BSC
1.00 BSC
0.50 BSC
0.25
0.35
0.30
0.40
A
6X
0.05 C
MOUNTING FOOTPRINT
SOLDERMASK DEFINED*
SEATING
PLANE
SIDE VIEW
C
A1
e
5X
L
5X
0.49
NOTE 4
3
1
1.24
L1
0.53
6
4
6X
0.30
6X
BOTTOM VIEW
b
0.10 C A B
0.05 C
NOTE 3
1
PKG
OUTLINE
0.50
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
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