ALPHA RF TRANSCEIVER • • • • • • • • • • • • • • • • • ALPHA-TRX433S ALPHA-TRX915S FM Transceiver Module Low cost, high performance Fast PLL lock time Wakeup timer 2.2V – 3.8V power supply Low power consumption 10MHz crystal for PLL timing Clock and reset signal output for external MCU use 16 bit RX Data FIFO SPI interface Internal data filtering and clock recover Digital signal strength indicator (DRSSI) Programmable TX frequency deviation (from 15 to 240 KHz) Programmable receiver bandwidth (from 67 to 400 kHz) Standby current less than 0.3uA Two 8 bit TX data registers High data rate (up to 115.2 kbps with internal demodulator， with external RC filter highest data rate is 256 kbps) O • Operates from -45 to +85 C Applications Wireless Security Systems Car Alarms Remote Gate Controls Remote Sensing Data Capture Sensor Reporting Introduction The Alpha Modules are extremely cost effective but high performance radio modules. Supplied in a miniature Surface mount package this Transceiver module can Transmit/Receive at upto 115Kbps at a maximum of 300m. Operating at 2-5V, the module monitors its battery voltage and can sleep with very low standby current. The module can wake intermittently and provide direct control outputs to a microcontroller making it ideally suited to battery applications. These Modules will suit one to one multi-node wireless links in applications including car and building security, POS and inventory tracking, remote process monitoring. Part Numbers Part Number ALPHA-TRX433S ALPHA-TRX868S ALPHA-TRX915S DSALPHA-TRX-6 Feb ‘11 Description FM Transceiver Module, preset to 433MHz FM Transceiver Module, preset to 868MHz FM Transceiver Module, preset to 915MHz 2009 RF Solutions Ltd. Page 1 ALPHA RF TRANSCEIVER ALPHA-TRX433S ALPHA-TRX915S Pin Description Pin definition Type Function 11 9 12 13 8 1 2 nINT/VDI VDD SDI SCK ANT SDO nIRQ DI/ DO S DI DI IN DO DO 3 FSK/DATA/nFFS DI/DO/DI 4 DCLK/CFIL/FFIT DO/AIO/DO CLK nRES GND nSEL DO DIO S DI Interrupt input (active low)/Valid data indicator Positive power supply SPI data input SPI clock input Antenna Connection Serial data output with bus hold Interrupts request output active low Transmit FSK data input/ Received data output (FIFO not used)/ FIFO select Clock output (no FIFO )/ external filter capacitor(analog mode)/ FIFO interrupts(active high)when FIFO level set to 1, FIFO empty interruption can be achieved Clock output for external microcontroller Reset Input (active low Power ground Chip select (active low) 5 6 7, 10 14 DSALPHA-TRX-6 Feb ‘11 2009 RF Solutions Ltd. （ ） ） Page 2 ALPHA RF TRANSCEIVER ALPHA-TRX433S ALPHA-TRX915S Mechanical Dimensions Electrical Parameters Maximum (not in working mode） symbol Vdd Vin Iin ESD Tst Tld parameter Positive power supply All pin input level Input current except power Human body model Storage temperature Soldering temperature(10s) minimum -0.5 -0.5 -25 -55 maximum 6.0 Vdd+0.5 25 1000 125 260 Unit V V mA V ℃ ℃ Recommended working range symbol Vdd Top DSALPHA-TRX-6 parameter Positive power supply Working temperature Feb ‘11 minimum 2.2 -40 2009 RF Solutions Ltd. maximum 3.8 85 Page 3 Unit V ℃ ALPHA-TRX433S ALPHA-TRX915S ALPHA RF TRANSCEIVER DC characteristic symbol Idd_TX_0 parameter Supply current (TX mode, Pout = 0dBm) Supply current (TX mode, Pout = Pmax) Supply current (RX mode) Stand by current Idd_TX_PMAX Idd_RX Ix Ipd Ilb Vlb Vlba Sleep mode current Low battery detection Low battery step Low battery detection accuracy Low level input High level input Leakage current Leakage current Low level output High level output Vil Vih Iil Iih Vol Voh Remark 433MHz band 915MHz band 433MHz band 915MHz band 433MHz band 915MHz band Crystal and base band on All blocks off minimum 0.1V per step 2.2 typical 13 17 21 25 10 13 3． 0 maximum mA mA 3． 5 0.3 0.5 5.3 75 0.3*Vdd Vil=0V Vih=Vdd, Vdd=5.4V Iol=2mA Ioh=-2mA 0.7*Vdd -1 -1 Unit mA 1 1 0.4 Vdd-0.4 mA uA uA V mV V V uA uA V V AC characteristic symbol fref fLO fLO fLO BW parameter PLL frequency frequency (10MHz crystal used) frequency (8MHZ crystal used) frequency (12MHZ crystal used) Receiver bandwidth tlock PLL lock time BR Data rate BRA Data rate remark 433 MHz band,2.5KHz step 915 MHz band,7.5KHz step min 8 430.24 900.72 433 MHz band,2.5KHz step 915 MHz band,7.5KHz step 344.19 720.57 351.80 743.41 MHz 433 MHz band,2.5KHz step 915 MHz band,7.5KHz step 3516.28 1080.8 527.71 1115.1 MHz 1 2 3 4 5 6 After 10MHz step hopping, frequency error <10 kHz With internal digital demodulator With external RC filter 60 120 180 240 300 360 BW=134KHz,BR=1.2kbps,433MHz band BW=134KHz,BR=1.2kbps,915MHz band AFCrange AFC working range RSA RSR CARSSI RSSTEP RSSI accuracy RSSI range ARSSI filter RSSI programmable step DRSSI response time RSRESP DSALPHA-TRX-6 Feb ‘11 dfFSK FSK deviation in the received signal RSSI output high after valid , CARRSI=5nF 2009 RF Solutions Ltd. typical 10 67 134 200 270 350 400 20 max 12 439.75 929.27 75 150 225 300 375 450 Unit MHz MHz KHz us 0.6 -106 -102 0.8* dfFSK 115.2 kbps 256 -100 -95 kbps ±5 46 1 6 dB dB nF dB 500 us Page 4 ALPHA-TRX433S ALPHA-TRX915S ALPHA RF TRANSCEIVER AC characteristic(Transmitter) symbol parameter Pout Typical output power Co Lout Output capacitance (set by the automatic antenna tuning circuit) Quality factor of the output capacitance Output phase noise BR dffsk FSK bit rate FSK frequency deviation Qo remark 433MHz band 915MHz band Selectable in 3 dB steps In low bands In high bands min 3 -2 Pmax-21 typical 5 0 max Unit Pmax dbm 2 2.1 2.6 2.7 3.2 3.3 pf In low bands In high bands 100 kHz from carrier 1 MHz from carrier 13 8 15 10 17 12 -75 -85 256 240 Programmable in 15 kHz steps 15 dbc/HZ kbps kHZ AC characteristic(Turn-on/Turnaround timings) symbol Tst parameter Crystal oscillator startup time Transmitter - Receiver turnover time Receiver - Transmitter turnover time remark Crystal ESR < 100 Synthesizer off, crystal oscillator on Synthesizer off, crystal oscillator on 450 us 350 us us 300 us tPOR Internal POR timeout tPBt Wake-up timer clock period Digital input apacitance Digital output rise/fall time Synthesizer on, crystal oscillator on Synthesizer on, crystal oscillator on Programmable in 0.5 pF steps, tolerance+/- 10% After Vdd has reached 90% of final value Calibrated every 30 seconds 425 Cxl Transmitter - Receiver turnover time Receiver - Transmitter turnover time Crystal load capacitance Ttx_rx_XTAL_ON Trx_tx_XTAL_ON Ttx_rx_SYNT_ON Trx_tx_SYNT_ON Cin, D tr, f min typical 8.5 0.96 15pF pure capacitive load max 5 Unit ms 16 pf 100 ms 1.05 ms 2 10 pf ns R F Solutions Ltd., Unit 21, Cliffe Industrial Estate, Lewes, E. Sussex. BN8 6JL. England. Email : [email protected] http://www.rfsolutions.co.uk Information contained in this document is believed to be accurate, however no representation or warranty is given and no liability is assumed by R.F. Solutions Ltd. with respect to the accuracy of such information. Use of products as critical components in life support systems is not authorised except with express written approval from R.F. Solutions Ltd. DSALPHA-TRX-6 Feb ‘11 2009 RF Solutions Ltd. Page 5 ALPHA-TRX433S ALPHA-TRX915S ALPHA RF TRANSCEIVER Programming guide Brief description ALPHA-TRX supports a command interface to setup frequency, deviation, output power and also data rate. There is no need to change any hardware when using frequency-hopping applications Commands Timing diagram Configuration Setting Command bit 15 1 14 0 13 0 12 0 11 0 10 0 9 0 8 0 7 el 6 ef 5 b1 4 b0 3 x3 2 x2 1 x1 e l: Enable TX register e f: Enable RX FIFO buffer b1..b0: select band b1 0 0 1 1 b0 0 1 0 1 band[MHz] Reserved 433 868 915 x3..x0: select crystal load capacitor x3 0 0 0 0 1 1 DSALPHA-TRX-6 Feb ‘11 x2 0 0 0 0 1 1 x1 0 0 1 1 1 1 x0 0 1 0 1 0 1 load capacitor [pF] 8.5 9.0 9.5 10.0 15.5 16.0 2009 RF Solutions Ltd. Page 6 0 x0 POR 8008h ALPHA-TRX433S ALPHA-TRX915S ALPHA RF TRANSCEIVER Power Management Command bit 15 1 14 0 13 0 12 0 11 0 10 0 9 1 8 0 7 er 6 ebb 5 et 4 es 3 ex 2 eb 1 ew 0 dc POR 8208h 8 f8 7 f7 6 f6 5 f5 4 f4 3 f3 2 f2 1 f1 0 f0 POR A680h 2 r2 1 r1 0 r0 POR C623h er： Enable receiver ebb： Enable base band block et： Enable transmitter es： Enable synthesizer ex： Enable crystal oscillator eb： Enable low battery detector ew： Enable wake-up timer dc： Disable clock output of CLK pin Frequency Setting Command bit 15 1 14 0 13 1 12 0 11 f11 10 f10 9 f9 f11..f0: Set operation frequency: 433band: Fc=430+F*0.0025 MHz 868band: Fc=860+F*0.0050 MHz 915band: Fc=900+F*0.0075 MHz Fc is carrier frequency and F is the frequency parameter. 36≤F≤3903 Data Rate Command bit 15 1 14 1 13 0 12 0 11 0 10 1 9 1 8 0 7 cs 6 r6 5 r5 4 r4 3 r3 r6..r0: Set data rate: BR=10000000/29/（ R+1） /（ 1+cs*7） Receiver Control Command bit 15 1 14 0 13 0 12 1 11 0 10 9 P16 d1 8 d0 7 i2 6 i1 5 i0 4 g1 3 g0 2 r2 1 r1 0 r0 P16: select function of pin16 P16 0 Interrupt input 1 VDI output i2..i0:select baseband bandwidth I2 i1 i0 Baseband Bandwidth [kHz] 0 0 0 reserved 0 0 1 0 1 0 340 0 1 1 270 1 0 0 200 1 0 1 134 1 1 0 67 1 1 1 reserved DSALPHA-TRX-6 Feb ‘11 400 2009 RF Solutions Ltd. Page 7 POR 9080h ALPHA-TRX433S ALPHA-TRX915S ALPHA RF TRANSCEIVER d1..d0: select VDI response time d1 0 0 1 1 d0 0 1 0 1 Response Fast Medium Slow Always on g1..g0: select LNA gain g1 0 0 1 1 g0 0 1 0 1 LNA gain (dBm) 0 -6 -14 -20 r2..r0: select DRSSI threshold r2 0 0 0 0 1 1 1 1 r1 0 0 1 1 0 0 1 0 r0 0 1 0 1 0 1 0 1 RSSIsetth [dBm] -103 -97 -91 -85 -79 -73 Reserved Reserved The actual DRSSI threshold is related to LNA setup: SSIth = RSSIsetth + GLNA. Data Filter Command bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR 1 1 0 0 0 0 1 0 al ml 1 s 1 f2 f1 f0 C22Ch al: Enable clock recovery auto-lock ml: Enable clock recovery fast mode s: select data filter type s Filter type Digital filter 0 Analog RC filter 1 f1..f0: Set DQD threshold DSALPHA-TRX-6 Feb ‘11 2009 RF Solutions Ltd. Page 8 ALPHA-TRX433S ALPHA-TRX915S ALPHA RF TRANSCEIVER FIFO and Reset Mode Command bit 15 14 13 12 11 10 9 8 7 1 1 0 0 1 0 1 0 f3 f3..f0: Set FIFO interrupt level sp: Select the length of the synchron pattern: sp 0 1 Byte1 2Dh Not used 6 f2 5 f1 Byte0 (POR) D4h D4h 4 f0 3 sp 2 al 1 ff 0 dr POR CA80h Synchron Pattern (Byte1+Byte0) 2DD4h D4h al: select FIFO fill start condition al condition 0 Sync-word 1 Always ff: Enable FIFO fill dr： Disable hi sensitivity reset mode Synchron pattern Command bit 15 1 14 1 13 0 12 0 11 1 10 1 9 1 8 0 7 b7 6 b6 5 b5 4 b4 3 b3 2 b2 1 b1 0 b0 POR CED4h This command is used to reprogram the synchronic pattern; Receiver FIFO Read Command bit 15 1 14 0 13 1 12 1 11 0 10 0 9 0 8 0 7 0 6 0 5 0 4 0 3 0 2 0 1 0 0 0 POR B000h This command is used to read FIFO data when FFIT interrupt generated. FIFO data output starts at 8th SCK period. AFC Command bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR 1 1 0 0 0 1 0 0 a1 a0 rl1 rl0 st fi oe en C4F7h a1..a0: select AFC auto-mode： a1 0 0 1 1 a0 0 1 0 1 Controlled by MCU Run once at power on Keep offset when VDI hi Keeps independently from VDI rl1..rl0: select range limit r1 0 0 1 1 r0 0 1 0 1 Range (fres) No restriction +15/-16 +7/-8 +3-4 freq 315， 433band: 2.5kHz 868band: 5kHz 915band: 7.5kHz st: st goes hi will store offset into output register fi: Enable AFC hi accuracy mode oe: Enable AFC output register en: Enable AFC function DSALPHA-TRX-6 Feb ‘11 2009 RF Solutions Ltd. Page 9 ALPHA-TRX433S ALPHA-TRX915S ALPHA RF TRANSCEIVER TX Configuration Control Command bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR 1 0 0 1 1 0 0 mp m3 m2 m1 m0 0 p2 p1 p0 9800h 1 1 0 bw0 m: select modulation polarity m2..m0: select frequency deviation: m3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 m2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 m1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 frequency deviation [kHz] m0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 15 30 45 60 75 90 105 120 135 150 165 180 195 210 225 240 p2..p0: select output power p2 p1 p0 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 0 0 1 0 1 0 1 0 1 Output power[dBm] 0 -3 -6 -9 -12 -15 -18 -21 PLL Setting Command bit 15 1 14 1 13 0 12 0 11 1 10 1 9 0 8 0 7 0 6 ob1 5 ob0 4 lpx 3 ddy 2 ddit ob1-ob0: Microcontroller output clock buffer rise and fall time control. ob1 0 0 1 ob0 0 1 X Selected uC CLK frequency 5 or 10 MHz (recommended) 3.3 MHz 2.5 MHz or less lpx: select low power mode of the crystal oscillator. lpx 0 1 Crystal start-up time (typ) 1 ms 2 ms Power consumption (typ) 620 uA 460 uA ddy: phase detector delay enable. ddi: disables the dithering in the PLL loop. bw1-bw0: select PLL bandwidth bw0 0 1 DSALPHA-TRX-6 Max bit rate [kbps] 86.2 256 Feb ‘11 Phase noise at 1MHz offset [dBc/Hz] -107 -102 2009 RF Solutions Ltd. Page 10 POR CC67h ALPHA-TRX433S ALPHA-TRX915S ALPHA RF TRANSCEIVER Transmitter Register Write Command bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 1 1 1 0 0 0 t7 t6 t5 t4 t3 t2 This command is use to write a data byte to RF12 and then RF12 transmit it 1 t1 0 t0 POR B8AAh 1 m1 0 m0 POR E196h Wake-Up Timer Command bit 15 1 14 1 13 1 12 r4 11 r3 10 r2 9 r1 8 r0 7 m7 6 m6 5 m5 4 m4 3 m3 2 m2 The wake-up period is determined by: R Twake-up = M * 2 [ms] For continual operation, bit ‘et’ must be cleared and set Low Duty-Cycle Command bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR 1 1 0 0 1 0 0 0 d6 d5 d4 d3 d2 d1 d0 en C8OEh d6..d0: Set duty cycle D.C.= (D * 2 +1) / M *100% En: Enable low duty cycle mode Low Battery Detector and Microcontroller Clock Divider Command bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR 1 1 0 0 0 0 0 0 d2 d1 d0 0 v3 v2 v1 v0 C000h d2..d0: select frequency of CLK pin d2 0 0 0 0 1 1 1 1 d1 0 0 1 1 0 0 1 1 d0 0 1 0 1 0 1 0 1 Clock frequency[MHz] 1 1.25 1.66 2 2.5 3.33 5 10 CLK signal is derive form crystal oscillator and it can be applied to MCU clock in to save a second crystal. If not used, please set bit “dc” to disable CLK output To integrate the load capacitor internal can not only save cost, but also adjust reference frequency by software v3..v0: Set threshold voltage of Low battery detector： Vlb=2.2+V*0.1 [V] DSALPHA-TRX-6 Feb ‘11 2009 RF Solutions Ltd. Page 11 ALPHA-TRX433S ALPHA-TRX915S ALPHA RF TRANSCEIVER Status Read Command bit Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 0 14 x 13 x 12 x 11 x 10 x 9 x 8 x 7 x 6 x 5 x 4 x 3 x 2 x 1 x 0 x POR - TX ready for next byte or FIFO received data status Power on reset status TX Register under run or RX FIFO Overflow status Wakeup timer overflow status Interrupt on external source status Low battery detect status FIFO empty status Antenna tuning signal strength Received signal strength indicator Data Quality Detector status Clock Recovery Locked status Toggling in each AFC cycle Measured Offset Frequency Sign Value 1='+', 0='-' Measured offset Frequency value (3 bits)) Measured offset Frequency value (3 bits)) Measured offset Frequency value (3 bits)) This command starts with a 0 and be used to read internal status register. Data output starts at 8th SCK period. DSALPHA-TRX-6 Feb ‘11 2009 RF Solutions Ltd. Page 12 ALPHA RF TRANSCEIVER Transmitter Operation Flow Start Initialise ALPHA Module Open Tx Send Data Close Tx Send Data Wait nIRQ Low Write a byte Package send Over? Return DSALPHA-TRX-6 Feb ‘11 2009 RF Solutions Ltd. Page 13 ALPHA-TRX433S ALPHA-TRX915S ALPHA RF TRANSCEIVER ALPHA-TRX433S ALPHA-TRX915S Receiver Operation Flow Start Initialise ALPHA Module Open Rx Receive Data N Check Pass? Y Indicate Receive Receive Data Wait nIRQ Low Read FIFO Data N Data Receive Over? Y Return After Initialisation, open FIFO receive mode and wait for nIRQ low, only then can the MCU read received and stored data in FIFO. For the next received package please reset FIFO DSALPHA-TRX-6 Feb ‘11 2009 RF Solutions Ltd. Page 14