PD - 97104
IRFI4321PbF
Applications
l Motion Control Applications
l High Efficiency Synchronous Rectification in SMPS
l Uninterruptible Power Supply
l Hard Switched and High Frequency Circuits
Benefits
l Low RDSON Reduces Losses
l Low Gate Charge Improves the Switching
Performance
l Improved Diode Recovery Improves Switching &
EMI Performance
l 30V Gate Voltage Rating Improves Robustness
l Fully Characterized Avalanche SOA
HEXFET® Power MOSFET
VDSS
RDS(on) typ.
max.
ID
150V
12.2m:
16m:
34A
D
D
G
G
S
D
S
TO-220AB Full-Pak
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Max.
Units
ID @ TC = 25°C
Symbol
Continuous Drain Current, VGS @ 10V
34
A
ID @ TC = 100°C
Continuous Drain Current, VGS @ 10V
21
IDM
Pulsed Drain Current c
140
PD @TC = 25°C
Maximum Power Dissipation
46
W
Linear Derating Factor
0.37
±30
W/°C
V
170
mJ
-55 to + 150
°C
VGS
Parameter
EAS (Thermally limited)
Gate-to-Source Voltage
Single Pulse Avalanche Energy d
TJ
Operating Junction and
TSTG
Storage Temperature Range
300
Soldering Temperature, for 10 seconds
(1.6mm from case)
10lbxin (1.1Nxm)
Mounting torque, 6-32 or M3 screw
Thermal Resistance
Parameter
Typ.
Max.
Units
RθJC
Junction-to-Case f
–––
2.73
°C/W
RθJA
Junction-to-Ambient f
–––
65
www.irf.com
1
6/23/06
IRFI4321PbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS
Parameter
Min. Typ. Max. Units
–––
–––
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
–––
190
––– mV/°C Reference to 25°C, ID = 1mAe
–––
12.2
16
VGS(th)
Gate Threshold Voltage
3.0
–––
5.0
IDSS
Drain-to-Source Leakage Current
RG(int)
V
Conditions
150
IGSS
Drain-to-Source Breakdown Voltage
VGS = 0V, ID = 250µA
mΩ VGS = 10V, ID = 20A e
V
VDS = VGS, ID = 250µA
VDS = 150V, VGS = 0V
–––
–––
20
µA
–––
–––
1.0
mA VDS = 150V, VGS = 0V, TJ = 125°C
nA
Gate-to-Source Forward Leakage
–––
–––
100
Gate-to-Source Reverse Leakage
–––
–––
-100
Internal Gate Resistance
–––
0.8
–––
VGS = 20V
VGS = -20V
Ω
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
gfs
Qg
Forward Transconductance
50
–––
–––
S
VDS = 50V, ID = 20A
Total Gate Charge
–––
73
110
nC
Qgs
Gate-to-Source Charge
–––
24
–––
Qgd
Gate-to-Drain ("Miller") Charge
–––
20
–––
td(on)
Turn-On Delay Time
–––
18
–––
tr
Rise Time
–––
29
–––
ID = 20A
td(off)
Turn-Off Delay Time
–––
27
–––
RG = 2.5Ω
tf
Fall Time
–––
20
–––
VGS = 10V e
Ciss
Input Capacitance
–––
4440
–––
Coss
Output Capacitance
–––
390
–––
VDS = 50V
Crss
Reverse Transfer Capacitance
–––
84
–––
ƒ = 1.0MHz
ID = 20A
VDS = 75V
VGS = 10V e
ns
pF
VDD = 75V
VGS = 0V
Diode Characteristics
Symbol
Parameter
Min. Typ. Max. Units
IS
Continuous Source Current
ISM
(Body Diode)
Pulsed Source Current
VSD
(Body Diode)c
Diode Forward Voltage
–––
–––
–––
–––
–––
34
140
–––
1.3
A
MOSFET symbol
A
showing the
integral reverse
V
trr
Reverse Recovery Time
–––
86
130
ns
Qrr
Reverse Recovery Charge
–––
310
470
nC
IRRM
Reverse Recovery Current
–––
6.7
–––
A
ton
Forward Turn-On Time
Notes:
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.85mH
RG = 25Ω, IAS = 20A, VGS =10V. Part not recommended for use
above this value.
2
Conditions
D
G
p-n junction diode.
TJ = 25°C, IS = 20A, VGS = 0V e
ID = 20A
S
VR = 128V,
di/dt = 100A/µs e
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Pulse width ≤ 400µs; duty cycle ≤ 2%.
Rθ is measured at TJ approximately 90°C
www.irf.com
IRFI4321PbF
1000
1000
100
BOTTOM
10
1
5.0V
≤ 60µs PULSE WIDTH
Tj = 25°C
0.1
100
BOTTOM
10
5.0V
≤ 60µs PULSE WIDTH
Tj = 150°C
1
0.1
1
10
100
0.1
VDS , Drain-to-Source Voltage (V)
10
100
Fig 2. Typical Output Characteristics
1000
3.0
≤ 60µs PULSE WIDTH
100
10
TJ = 25°C
1
0.1
4.0
5.0
6.0
VGS = 10V
2.5
2.0
(Normalized)
TJ = 150°C
3.0
ID = 20A
RDS(on) , Drain-to-Source On Resistance
VDS = 25V
ID, Drain-to-Source Current(Α)
1
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
1.5
1.0
0.5
0.0
7.0
-60 -40 -20
VGS, Gate-to-Source Voltage (V)
7000
VGS, Gate-to-Source Voltage (V)
Coss = Cds + Cgd
5000
Ciss
4000
3000
Coss
2000
1000
Crss
10
100
1000
VDS , Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
www.irf.com
40
60
80 100 120 140 160
ID= 20A
VDS = 120V
VDS= 75V
VDS= 30V
16
12
8
4
0
0
1
20
Fig 4. Normalized On-Resistance vs. Temperature
20
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
6000
0
TJ , Junction Temperature (°C)
Fig 3. Typical Transfer Characteristics
C, Capacitance (pF)
VGS
15V
10V
8.0V
7.0V
6.5V
6.0V
5.5V
5.0V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
8.0V
7.0V
6.5V
6.0V
5.5V
5.0V
0
20
40
60
80
100
120
QG Total Gate Charge (nC)
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
3
IRFI4321PbF
1000
ID, Drain-to-Source Current (A)
ISD , Reverse Drain Current (A)
1000
100
TJ = 150°C
10
1
TJ = 25°C
OPERATION IN THIS AREA
LIMITED BY R DS (on)
100
1msec
100µsec
10
10msec
1
Tc = 25°C
Tj = 150°C
Single Pulse
VGS = 0V
0.1
0.1
0.2
0.4
0.6
0.8
0.1
1.0
V(BR)DSS , Drain-to-Source Breakdown Voltage
35
ID , Drain Current (A)
30
25
20
15
10
5
0
50
75
100
125
100.0
1000.0
190
180
170
160
150
140
-60 -40 -20
150
0
20
40
60
80 100 120 140 160
TJ , Junction Temperature (°C)
TC , CaseTemperature (°C)
Fig 9. Maximum Drain Current vs.
Case Temperature
Fig 10. Drain-to-Source Breakdown Voltage
700
EAS, Single Pulse Avalanche Energy (mJ)
5.0
4.0
Energy (µJ)
10.0
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
25
1.0
VDS , Drain-toSource Voltage (V)
VSD , Source-to-Drain Voltage (V)
3.0
2.0
1.0
0.0
ID
4.6A
5.4A
BOTTOM 20A
600
TOP
500
400
300
200
100
0
40
60
80
100
120
140
VDS, Drain-to-Source Voltage (V)
Fig 11. Typical COSS Stored Energy
4
DC
160
25
50
75
100
125
150
Starting TJ, Junction Temperature (°C)
Fig 12. Maximum Avalanche Energy Vs. DrainCurrent
www.irf.com
IRFI4321PbF
Thermal Response ( Z thJC )
10
D = 0.50
1
0.20
0.10
0.05
0.1
τJ
0.02
0.01
R1
R1
τJ
τ1
R2
R2
R3
R3
Ri (°C/W)
τC
τ2
τ1
τ3
τ2
Ci= τi/Ri
Ci= τi/Ri
τ3
τ
τι (sec)
0.312941 0.000381
1.187255 0.219458
1.231176
2.895
0.01
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
t1 , Rectangular Pulse Duration (sec)
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
100
Avalanche Current (A)
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Tj = 150°C and
Tstart =25°C (Single Pulse)
10
0.01
0.05
0.10
1
0.1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Τ j = 25°C and
Tstart = 150°C.
0.01
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
180
EAR , Avalanche Energy (mJ)
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
TOP
Single Pulse
BOTTOM 1% Duty Cycle
ID = 20A
160
140
120
100
80
60
40
20
0
25
50
75
100
125
150
Starting TJ , Junction Temperature (°C)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Fig 15. Maximum Avalanche Energy vs. Temperature
www.irf.com
5
IRFI4321PbF
40
ID = 1.0A
ID = 1.0mA
ID = 250µA
5.0
30
4.0
IRRM - (A)
VGS(th), Gate threshold Voltage (V)
6.0
3.0
20
IF = 33A
VR = 128V
10
2.0
TJ = 125°C
TJ = 25°C
0
1.0
-75
-50 -25
0
25
50
75
100 200 300 400 500 600 700 800 900 1000
100 125 150 175
dif / dt - (A / µs)
TJ , Temperature ( °C )
Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage Vs. Temperature
40
3200
2800
2400
QRR - (nC)
IRRM - (A)
30
20
10
0
2000
1600
1200
IF = 50A
VR = 128V
IF = 33A
VR = 128V
800
TJ = 125°C
TJ = 25°C
TJ = 125°C
TJ = 25°C
400
0
100 200 300 400 500 600 700 800 900 1000
100 200 300 400 500 600 700 800 900 1000
dif / dt - (A / µs)
dif / dt - (A / µs)
Fig. 18 - Typical Recovery Current vs. dif/dt
Fig. 19 - Typical Stored Charge vs. dif/dt
3200
2800
QRR - (nC)
2400
2000
1600
1200
800
400
0
IF = 50A
VR = 128V
TJ = 125°C
TJ = 25°C
100 200 300 400 500 600 700 800 900 1000
dif / dt - (A / µs)
6
Fig. 20 - Typical Stored Charge vs. dif/dt
www.irf.com
IRFI4321PbF
D.U.T
Driver Gate Drive
-
-
-
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
VDD
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
D=
Period
P.W.
+
+
-
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor
Current
Inductor Curent
ISD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V(BR)DSS
15V
DRIVER
L
VDS
tp
D.U.T
RG
+
V
- DD
IAS
VGS
20V
tp
A
0.01Ω
I AS
Fig 22a. Unclamped Inductive Test Circuit
LD
Fig 22b. Unclamped Inductive Waveforms
VDS
VDS
+
90%
VDD -
10%
D.U.T
VGS
VGS
Pulse Width < 1µs
Duty Factor < 0.1%
td(on)
Fig 23a. Switching Time Test Circuit
tr
td(off)
tf
Fig 23b. Switching Time Waveforms
Id
Vds
Vgs
L
DUT
0
1K
VCC
Vgs(th)
Qgs1 Qgs2
Fig 24a. Gate Charge Test Circuit
www.irf.com
Qgd
Qgodr
Fig 24b. Gate Charge Waveform
7
IRFI4321PbF
TO-220AB Full-Pak Package Outline (Dimensions are shown in millimeters (inches))
TO-220AB Full-Pak Part Marking Information
EXAMPLE: T HIS IS AN IRFI840G
WIT H AS S EMBLY
LOT CODE 3432
AS S EMBLED ON WW 24, 2001
IN T HE AS S EMBLY LINE "K"
Note: "P" in as s embly line pos ition
indicates "Lead-Free"
INT ERNAT IONAL
RECT IFIER
LOGO
PART NUMBER
IRFI840G
124K
34
32
AS S EMBLY
LOT CODE
DAT E CODE
YEAR 1 = 2001
WEEK 24
LINE K
TO-220AB Full-Pak packages are not recommended for Surface Mount Application.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 06/06
8
www.irf.com
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/