PD - 95353A
IRFR12N25DPbF
IRFU12N25DPbF
SMPS MOSFET
HEXFET® Power MOSFET
Applications
High frequency DC-DC converters
l Lead-Free
l
VDSS
250V
Benefits
l Low Gate-to-Drain Charge to Reduce
Switching Losses
l Fully Characterized Capacitance Including
Effective COSS to Simplify Design, (See
App. Note AN1001)
l Fully Characterized Avalanche Voltage
and Current
RDS(on) max
ID
0.26Ω
14A
D-Pak
IRFR12N25D
I-Pak
IRFU12N25D
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
Units
14
9.7
56
144
0.96
± 30
9.3
-55 to + 175
A
W
W/°C
V
V/ns
°C
300 (1.6mm from case )
Thermal Resistance
Parameter
RθJC
RθJA
RθJA
Junction-to-Case
Junction-to-Ambient (PCB mount)*
Junction-to-Ambient
Notes through
www.irf.com
Typ.
Max.
Units
–––
–––
–––
1.04
50
110
°C/W
are on page 10
1
12/2/04
IRFR/U12N25DPbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
V(BR)DSS
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min.
250
–––
–––
3.0
–––
–––
–––
–––
Typ.
–––
0.29
–––
–––
–––
–––
–––
–––
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
0.26
Ω
VGS = 10V, ID = 8.4A
5.0
V
VDS = VGS, ID = 250µA
25
VDS = 200V, VGS = 0V
µA
250
VDS = 160V, VGS = 0V, TJ = 150°C
100
VGS = 30V
nA
-100
VGS = -30V
Dynamic @ TJ = 25°C (unless otherwise specified)
gfs
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
Min.
6.8
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
23
5.8
12
9.1
25
16
9.2
810
130
22
1100
50
130
Max. Units
Conditions
–––
S
VDS = 25V, ID = 8.4A
35
I D = 8.4A
8.7
nC
VDS = 200V
19
VGS = 10V,
–––
VDD = 125V
–––
I
D = 8.4A
ns
–––
RG = 6.8Ω
–––
VGS = 10V
–––
VGS = 0V
–––
VDS = 25V
–––
pF
ƒ = 1.0MHz
–––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 200V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 0V to 200V
Avalanche Characteristics
Parameter
EAS
IAR
EAR
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Typ.
Max.
Units
–––
–––
–––
250
8.4
14
mJ
A
mJ
Diode Characteristics
IS
ISM
VSD
trr
Qrr
ton
2
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
14
––– –––
showing the
A
G
integral reverse
––– –––
56
S
p-n junction diode.
––– ––– 1.5
V
TJ = 25°C, IS = 8.4A, VGS = 0V
––– 140 –––
ns
TJ = 25°C, IF = 8.4A
––– 710 –––
nC
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRFR/U12N25DPbF
100
100
VGS
15V
12V
10V
8.0V
7.0V
6.0V
5.5V
BOTTOM 5.0V
VGS
15V
12V
10V
8.0V
7.0V
6.0V
5.5V
BOTTOM 5.0V
10
TOP
ID , Drain-to-Source Current (A)
ID , Drain-to-Source Current (A)
TOP
1
0.1
5.0V
0.01
20µs PULSE WIDTH
Tj = 25°C
10
5.0V
1
20µs PULSE WIDTH
Tj = 175°C
0.001
0.1
1
10
0.1
100
0.1
VDS, Drain-to-Source Voltage (V)
1.00
T J = 25°C
0.10
VDS = 15V
20µs PULSE WIDTH
11.0
13.0
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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15.0
2.5
(Normalized)
10.00
9.0
I D = 14A
3.0
TJ = 175°C
RDS(on) , Drain-to-Source On Resistance
ID, Drain-to-Source Current (Α)
3.5
7.0
100
Fig 2. Typical Output Characteristics
100.00
5.0
10
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
0.01
1
2.0
1.5
1.0
0.5
V GS = 10V
0.0
-60
-40
-20
0
20
40
60
80
TJ , Junction Temperature
100 120 140 160 180
( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRFR/U12N25DPbF
10000
12
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
VGS , Gate-to-Source Voltage (V)
C, Capacitance(pF)
Ciss
100
Coss
VDS = 200V
VDS = 125V
VDS = 50V
10
Coss = Cds + Cgd
1000
ID = 8.4A
7
5
2
Crss
10
0
1
10
100
0
1000
VDS, Drain-to-Source Voltage (V)
100.00
15
20
25
1000
T J = 175°C
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
10
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
10.00
T J = 25°C
1.00
10
100µsec
1msec
1
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
10msec
0.1
0.10
0.0
1.0
2.0
VSD, Source-toDrain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
5
QG, Total Gate Charge (nC)
3.0
1
10
100
1000
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRFR/U12N25DPbF
15
VGS
12
I D , Drain Current (A)
RD
V DS
D.U.T.
RG
+
-VDD
VGS
9
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
6
Fig 10a. Switching Time Test Circuit
VDS
3
90%
0
25
50
75
100
TC , Case Temperature
125
150
175
( °C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
(Z thJC)
10
1
Thermal Response
D = 0.50
0.20
P DM
0.10
0.1
t1
0.05
0.02
0.01
t2
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D =
2. Peak T
0.01
0.00001
0.0001
0.001
0.01
t1/ t 2
J = P DM x Z thJC
+TC
0.1
1
t1, Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFR/U12N25DPbF
550
15V
ID
TOP
+
V
- DD
IAS
20V
A
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
EAS , Single Pulse Avalanche Energy (mJ)
D.U.T
RG
440
DRIVER
L
VDS
3.4A
5.9A
8.4A
BOTTOM
330
220
110
0
25
50
75
100
125
150
175
( °C)
Starting T , Junction
Temperature
J
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
QG
50KΩ
12V
.2µF
.3µF
QGS
QGD
D.U.T.
VG
+
V
- DS
VGS
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
6
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRFR/U12N25DPbF
Peak Diode Recovery dv/dt Test Circuit
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
D.U.T
+
-
-
+
RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Driver Gate Drive
P.W.
Period
D=
+
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® Power MOSFETs
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7
IRFR/U12N25DPbF
D-Pak (TO-252AA) Package Outline
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: THIS IS AN IRFR120
WITH AS S EMBLY
LOT CODE 1234
AS S EMBLED ON WW 16, 1999
IN T HE AS S EMBLY LINE "A"
PART NUMBER
INTE RNATIONAL
RECT IFIER
LOGO
Note: "P" in assembly line position
indicates "Lead-Free"
IRFU120
12
916A
34
AS S EMBLY
LOT CODE
DATE CODE
YEAR 9 = 1999
WEEK 16
LINE A
OR
PART NUMBER
INT ERNATIONAL
RECTIFIER
LOGO
IRFU120
12
AS S EMBLY
LOT CODE
8
34
DATE CODE
P = DES IGNATES LEAD-FREE
PRODUCT (OPTIONAL)
YEAR 9 = 1999
WEEK 16
A = AS S E MBLY S ITE CODE
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IRFR/U12N25DPbF
I-Pak (TO-251AA) Package Outline
I-Pak (TO-251AA) Part Marking Information
EXAMPLE: T HIS IS AN IRFU120
WIT H AS SEMBLY
LOT CODE 5678
AS SEMBLED ON WW 19, 1999
IN T HE AS SEMBLY LINE "A"
PART NUMBER
INT ERNATIONAL
RECT IFIER
LOGO
IRF U120
919A
56
78
ASS EMBLY
LOT CODE
Note: "P" in ass embly line
pos ition indicates "Lead-Free"
DAT E CODE
YEAR 9 = 1999
WEE K 19
LINE A
OR
INT ERNAT IONAL
RECT IF IER
LOGO
PART NUMBER
IRF U120
56
ASS EMBLY
LOT CODE
www.irf.com
78
DAT E CODE
P = DES IGNAT ES LEAD-FREE
PRODUCT (OPT IONAL)
YEAR 9 = 1999
WEEK 19
A = ASS EMBLY S ITE CODE
9
IRFR/U12N25DPbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRR
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
TRL
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Notes:
Repetitive rating; pulse width limited by
max. junction temperature.
Starting TJ = 25°C, L = 7.1mH
RG = 25Ω, IAS = 8.4A.
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
ISD ≤ 8.4A, di/dt ≤ 150A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
* When mounted on 1" square PCB (FR-4 or G-10 Material).
For recommended footprint and soldering techniques refer to application note #AN-994.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101] market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.12/04
10
www.irf.com
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/